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PAM3102

PAM3102

  • 厂商:

    PAM

  • 封装:

  • 描述:

    PAM3102 - Dual 150mA High PSRR Low-Dropout CMOS Regulator - Power Analog Micoelectronics

  • 数据手册
  • 价格&库存
PAM3102 数据手册
Dual 150mA High PSRR Low-Dropout CMOS Regulator K ey Features n n n n n n n n n PAM3102 General Description The dual LDO PAM3102 series of positive voltage linear regulators feature high output voltage accuracy, low quiescent current and low dropout voltage, making them ideal for battery powered applications. The line transient response and load transient response are excellent. Their high PSRR make them useful in applications where AC noise on the input power supply must be suppressed. Space-saving SOT23-6 package for 2-ch LDOs is attractive for portable and handheld applications. They have both thermal shutdown and a current limit feature to prevent device failure under extreme operating conditions. They are stable with an output capacitance of 2.2 μ F or greater. Output Accuracy: ± 2% Low Dropout Voltage: 180mV@150mA High PSRR: 70dB@100Hz Low Noise Output Current Limiting Short Circuit Protection Thermal Shutdown Space Saving Package SOT23-6 Pb-Free Package Applications n n n n n n Cellular Phone Portable Electronics, PDA Wireless Devices, Wireless LAN Computer Peripherals Camera Module GPS Receiver Typical Application Block Diagram IN 2 1 VIN VOUT1 VOUT2 GND 5 6 4 OUT1 OUT2 VIN Current Limit Thermal Protection Current Limit CE1 PAM3102 3 CE 2 C IN 2.2 μ F Co 2.2 μ F Co 2.2 μ F VOUT1 + V REF + VOUT2 GND CE1 Bias CE2 Power Analog Microelectronics , Inc www.poweranalog.com 09/2008 Rev 1.1 1 Dual 150mA High PSRR Low-Dropout CMOS Regulator P in Configuration & Marking Information Top View 6 SOT23-6 5 4 PAM3102 ABVYW AB: V: Y: W: 3 Product Code of PAM3102 Voltage Code Year Week 1 Pin Number 1 2 3 4 5 6 2 Name CE1 VIN CE2 VOUT2 GND VOUT1 Function Output 1 Enable Input Output 2 Enable Output 2 Ground Output 1 Absolute Maximum Ratings These are stress ratings only and functional operation is not implied . Exposure to absolute maximum ratings for prolonged time periods may affect device reliability . All voltages are with respect to ground . Input Voltage...............................................6.6V Output Current..................................150/150mA Output Pin Voltage ............. GND-0.3V to V IN+0.3V Storage Temperature..................-40 OC to 125 OC ESD Rating(HBM)........................................2kV O Lead Soldering Temperature ( 5sec ) ...........300 C Recommended Operating Conditions Supply Input Voltage.................................... 5.5V Max. Supply Voltage (for Max. duration of 30 minutes)................................................6.4V Enable Input Voltage...............................0V to V IN Junction Temperature..................-40 C to 125 C O O Ambient Temperature....................-40 C to 85 C O O Thermal Information Parameter Thermal Resistance (Junction to Case) Thermal Resistance (Junction to Ambient) Internal Power Dissipation Symbol θJC θJA PD Package SOT-23-6 SOT-23-6 SOT-23-6 Maximum 130 250 400 Unit °C/W mW Power Analog Microelectronics , Inc www.poweranalog.com 09/2008 Rev 1.1 2 Dual 150mA High PSRR Low-Dropout CMOS Regulator E lectrical Characteristic V CE1=V CE2=V IN=V O+1V, T A=25 OC, C IN =2.2 μ F, C O =2.2 μ F, unless otherwise noted. PARAMETER Input Voltage Output Voltage Accuracy Dropout Voltage Output Current Current Limit Quiescent Current Ground Pin Current Shutdown Current Short Circuit Current SYMBOL V IN Vo Vdrop IO ILIM IQ Ignd ISD Isc Vo≥1.2V Io=0mA Io=1mA to 150mA VCE1=V CE2=0V Vo=0V Io=50mA VIN=3.0V to 4.0V Line Regulation LNR Io=50mA, VIN=3.5V to 4.5V Io=50mA, VIN=3.8V to 4.8V Load Regulation LDR VIN=3.3V Io=1mA to 150mA f=100Hz Power Supply Ripple Rejection Output Noise CE Input High Threshold CE Input Low Threshold CE Pull-Up Resistance Temperature Coefficient Over Temperature Shutdown Over Temperature Hysteresis PSRR Vn VTH VTL RCE Tc OTS OTH Io=1mA Io=1mA 1.7 5 40 155 40 Io=50mA,Vo=1.8V f=10Hz to 100kHz 1.5 0.3 15 f=1kHz f=10kHz Vo=1.8V Vo=2.5V Vo=2.8V -2 1.0 70 63 45 35 2 % dB dB dB μVrms V V MΩ ppm/ C O O O PAM3102 Test Conditions Io=1mA Vo=1.8V, Io=150mA Vo=2.5V, Io=150mA Vo=2.8V, Io=150mA MIN Note 1 -2.0 TYP MAX 5.5 2.0 UNITS V % mV mV mV 950 350 180 150 200 175 200 0.1 150 250 250 1 Note 2 mA mA μA μA μA mA -0.15 0.1 0.15 %/V C C Note1: The minimum input voltage ( V IN(MIN)) of the PAM3102 is determined by output voltage and dropout voltage. The minimum input voltage is defined as : V IN(MIN)=V O+V drop Note 2: Output current is limited by P D, maximum I O=P D/( V IN(MAX)-V O). Power Analog Microelectronics , Inc www.poweranalog.com 09/2008 Rev 1.1 3 Dual 150mA High PSRR Low-Dropout CMOS Regulator Typical Performance Characteristics T A=25 OC, C IN =2.2 μ F, C O =2.2 μ F, unless otherwise noted. 1. Output Voltage vs Input Voltage Vo=1.8V Vo=1.8V PAM3102 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 Io=1mA Io=50mA Io=150mA 2 3 4 Input Voltage(V) 5 6 1.804 1.803 1.802 1.801 1.8 1.799 1.798 1.797 1.796 1.795 1.794 2.5 3 Output Voltage(V) Output Voltage(V) Io=50mA,TA=85℃ Io=50mA,TA=25℃ 3.5 4 4.5 5 5.5 6 Input Voltage(V) 2.55 2.5 3 2.5 Vo=2.5V Vo=2.5V Output Voltage (V) 2 1.5 1 0.5 0 2 3 Io=1mA Io=50mA Output Voltage(V) 2.45 2.4 2.35 2.3 2.25 Io=50mA,TA=85℃ Io=50mA,TA=25℃ 2.5 3 3.5 4 4.5 5 5.5 6 Io=150mA 4 Input Voltage(V) 5 6 Input Voltage(V) 3 2.5 Vo=2.8V Io=1mA Io=50mA 2 1.5 1 0.5 0 2 Io=150mA 3 4 Input Voltage(V) 5 6 2.85 2.8 2.75 2.7 2.65 2.6 2.55 2.5 2.45 2.4 2.35 2.5 Vo=2.8V Output Voltage(V) Output Voltage(V) Io=50mA,TA=85℃ Io=50mA,TA=25℃ 3 3.5 4 4.5 5 5.5 6 Input Voltage(V) Power Analog Microelectronics , Inc www.poweranalog.com 09/2008 Rev 1.1 4 Dual 150mA High PSRR Low-Dropout CMOS Regulator Typical Performance Characteristics (continued) 2. Output Voltage vs Output Current Vo=1.8V 3. Output Voltage vs Temperature Vo=1.8V PAM3102 1.81 1.805 1.81 1.808 1.806 Output Voltage(V) V IN==5.0V Output Voltage(V) V IN=3.3V 1.8 1.795 1.79 1.785 1.78 0 50 100 V IN=2.8V 1.804 1.802 1.8 1.798 1.796 1.794 1.792 1.79 V IN=3.3V,Io=150mA V IN=3.3V,Io=30mA 150 25 45 65 85 105 125 Output Current(mA) Temperature(℃) 2.51 2.5 Vo=2.5V 2.51 Vo=2.5V VIN=5.0V 2.505 Output Voltage(V) 2.49 2.48 2.47 2.46 2.45 2.44 0 50 100 150 V IN=2.8V Output Voltage(V) 2.5 2.495 V IN=3.3V,Io=30mA V IN=3.3V,Io=150mA VIN=3.3V 2.49 2.485 2.48 25 45 65 85 105 125 Output Current(mA) Temperature(℃) 2.81 2.8 2.815 2.81 Vo=2.8V Vo=2.8V V IN=3.3V,Io=30mA Output Voltage(V) Output Voltage(V) 2.805 2.8 2.795 2.79 2.785 2.78 2.775 0 50 VIN=3.3V VIN=2.8V 2.79 2.78 2.77 2.76 2.75 2.74 V IN=3.3V,Io=150mA VIN=5.0V 100 150 25 45 65 85 105 125 Output Current(mA) Temperature(℃) Power Analog Microelectronics , Inc www.poweranalog.com 09/2008 Rev 1.1 5 Dual 150mA High PSRR Low-Dropout CMOS Regulator Typical Performance Characteristics (continued) 4. Ground Current vs Input Voltage 300 Io=300mA (note 1) 250 250 300 PAM3102 5. Ground Current vs Output Current V IN=5V Ground Current(uA) Ground Current(uA) 200 150 Io=100mA 100 50 0 2 3 4 Input Voltage(V) 5 6 Io=2mA 200 150 100 50 0 0 50 100 150 200 250 300 Output Current(mA) V IN=4V V IN=3.3V 250 6. Quiescent Current vs Input Voltage Quiescent Current(uA) 260 240 7. Quiescent Current vs Temperature Quiescent Current(uA) 200 150 100 50 0 TA=25℃,Io=0mA TA=85℃,Io=0mA 220 200 180 160 140 120 100 25 45 65 85 105 125 V IN=3.3V V IN=5V 2 3 4 Input Voltage(V) 5 6 Temperature(℃) 1000 900 800 700 600 500 400 300 200 100 0 Vo=2.8V 25 45 65 85 105 125 Vo=2.5V Vo=1.8V 8. Dropout Voltage vs Output Current Dropout Voltage(mV) 1000 900 800 700 600 500 400 300 200 100 0 0 30 9. Dropout Voltage vs Temperature Vo=1.8V Vo=2.5V Vo=2.8V 60 90 120 150 Dropout Voltage(mV) Output Current (mA) Temperature(℃) note 1: 2 channels total output current Io=150mA Power Analog Microelectronics , Inc www.poweranalog.com 09/2008 Rev 1.1 6 Dual 150mA High PSRR Low-Dropout CMOS Regulator Typical Performance Characteristics (continued) 1 0. Power Supply Ripple Rejection +0 -10 -20 -30 -40 d B -50 -60 -70 -80 PAM3102 11. Load Transient Response Vo AC Coupling Io=150mA Io=1mA Io DC Coupling Io=50mA -90 -100 10 20 50 100 200 500 1k Hz 2k 5k 10k 20k 50k 100k V O=1.8V, V IN=3.3V , Vpp=1V +0 -10 -20 -30 -40 d B -50 Io=150mA Io=1mA V IN=4.0V, V O=2.8V, I O=1mA to 150mA Vo AC Coupling -60 -70 -80 -90 -100 10 Io=50mA Io DC Coupling 20 50 100 200 500 1k Hz 2k 5k 10k 20k 50k 100k V O=2.5V, V IN=3.3V , Vpp=1V +0 -10 -20 -30 -40 d B -50 -60 Io=150mA Io=1mA V IN=4.0V, V O=2.8V, I O=1mA to 50mA T Vo AC Coupling -70 -80 Io=50mA Io DC Coupling -90 -100 10 20 50 100 200 500 1k Hz 2k 5k 10k 20k 50k 100k V O=2.8V, V IN=3.3V , Vpp=1V V IN=4.0V, V O=2.8V, I O=50mA to 150mA Power Analog Microelectronics , Inc www.poweranalog.com 09/2008 Rev 1.1 7 Dual 150mA High PSRR Low-Dropout CMOS Regulator Typical Performance Characteristics (continued) 12. Line Transient Response 13. Turn-on Response PAM3102 V IN DC Coupling VO AC Coupling V IN DC Coupling VO DC Coupling Vo=2.5V, V IN=3V to 5V, Io=1mA V IN=0 to 5V Power Analog Microelectronics , Inc www.poweranalog.com 09/2008 Rev 1.1 8 Dual 150mA High PSRR Low-Dropout CMOS Regulator A pplication Information Capacitor Selection and Regulator Stability Similar to any low dropout regulator, the external capacitors used with the PAM3102 must be carefully selected for regulator stability and performance. A capacitor C IN of more than 1μF can be employed in the input pin, while there is no upper limit for the capacitance of C IN. Please note that the distance between C IN and the input pin of the PAM3102 should not exceed 0.5 inch. Ceramic capacitors are suitable for the PAM3102. Capacitors with larger values and lower ESR (equivalent series resistance) provide better PSRR and line-transient response. The PAM3102 is designed specifically to work with low ESR ceramic output capacitors in order to save space and improve performance. Using an output ceramic capacitor whose value is > 2.2μF with ESR>5mΩ ensures stability. Shutdown Input Operation The PAM3102 is shutdown by pulling the CE input low, and turned on by tying the CE input to VIN or leaving the CE input floating. Input-Output ( Dropout ) Voltage A regulator's minimum input-output voltage differential (or dropout voltage) determines the lowest usable supply voltage. The PAM3102 has a typical 180mV dropout voltage. In batterypowered systems, this will determine the useful end-of-life battery voltage. Current Limit and Short Circuit Protection The PAM3102 features a current limit, which monitors and controls the gate voltage of the pass transistor. The output current can be limited to 300mA by regulating the gate voltage. The PAM3102 also has a built-in short circuit current limit. Thermal considerations Thermal protection limits power dissipation in the PAM3102. When the junction temperature exceeds 150°C, the OTP (Over Temperature Protection) starts the thermal shutdown and turns the pass transistor off. The pass transistor resumes operation after the junction temperature drops below 120°C. For continuous operation, the junction temperature should be maintained below 125°C. The power dissipation is defined as: P D= (V IN-V O)*I O+Vin*Ignd The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surrounding airflow and temperature difference between junction and ambient. The maximum power dissipation can be calculated by the following formula: P D(MAX) = (T J(MAX)-T A)/θ JA Where T J(MAX) is the maximum allowable junction temperature 125°C,TA is the ambient temperature and θ JA is the thermal resistance from the junction to the ambient. For example, as θ JA is 250°C/W for the SOT-23 package based on the standard JEDEC 51-3 for a single-layer thermal test board, the maximum power dissipation at TA =25°C can be calculated by following formula: P D(MAX)=(125°C-25°C)/250=0.4W SOT-23 It is also useful to calculate the junction temperature of the PAM3102 under a set of specific conditions. Suppose the input voltage V IN=3.3V, the output current I O=300mA and the case temperature T A =40°C measured by a thermalcouple during operation, the our power dissipation is defined as: P D=(3.3V-2.8V)*150mA+(3.3V-1.8V) *150mA+3.3V*200 μ A≌300mW And the junction temperature TJ can be calculated as follows: T J = T A+P D*θ JA T J = 40°C+0.3W*250°C/W =40°C+75°C =115°C
PAM3102 价格&库存

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