2SK2340

Power F-MOS FETs 2SK2340 Silicon N-Channel Power F-MOS FET s Features q Avalanche energy capacity guaranteed q High-speed switching q Low ON-resistance q No secondary breakdown unit: mm 4.6±0.2 φ3.2±0.1 9.9±0.3 2.9±0.2 s Applications q Contactless relay q Diving circuit for a solenoid q Driving circuit for a motor q Control equipment q Switching power supply 15.0±0.3 4.1±0.2 8.0±0.2 Solder Dip 3.0±0.2 s Absolute Maximum Ratings (TC = 25°C) Parameter Drain to Source breakdown voltage Gate to Source voltage Drain current DC Pulse Symbol VDSS VGSS ID IDP EAS* PD Tch Tstg Ratings 900 ±30 ±5 ±10 45 50 2 150 −55 to +150 Unit V 13.7–0.2 +0.5 1.2±0.15 1.45±0.15 0.75±0.1 2.54±0.2 5.08±0.4 123 2.6±0.1 0.7±0.1 7 V A A mJ W °C °C 1: Gate 2: Drain 3: Source TO-220E Package Avalanche energy capacity Allowable power dissipation Channel temperature Storage temperature * TC = 25°C Ta = 25°C L = 3.6mH, IL = 5A, 1 pulse s Electrical Characteristics (TC = 25°C) Parameter Drain to Source cut-off current Gate to Source leakage current Drain to Source breakdown voltage Gate threshold voltage Drain to Source ON-resistance Forward transfer admittance Diode forward voltage Symbol IDSS IGSS VDSS Vth RDS(on) | Yfs | VDSF Coss td(on) tr tf td(off) Rth(ch-c) Rth(ch-a) VDD = 200V, ID = 3A VGS = 10V, RL = 66.6Ω Conditions VDS = 720V, VGS = 0 VGS = ±30V, VDS = 0 ID = 1mA, VGS = 0 VDS = 25V, ID = 1mA VGS = 10V, ID = 3A VDS = 25V, ID = 3A IDR = 5A, VGS = 0 1400 VDS = 20V, VGS = 0, f = 1MHz 140 60 30 60 60 170 2.5 62.5 1.5 900 2 2 3.5 −1.6 5 2.8 min typ max 100 ±1 Unit µA µA V V Ω S V pF pF pF ns ns ns ns °C/W °C/W Input capacitance (Common Source) Ciss Output capacitance (Common Source) Reverse transfer capacitance (Common Source) Crss Turn-on time (delay time) Rise time Fall time Turn-off time (delay time) Thermal resistance between channel and case Thermal resistance between channel and atmosphere 1 Power F-MOS FETs Area of safe operation (ASO) 100 60 2SK2340 P D  Ta Allowable power dissipation PD (W) (1) TC=Ta (2) Without heat sink (PD=2W) 100 IAS  L-load TC=25˚C Non repetitive pulse TC=25˚C IDP ID 1ms 1 10ms t=100ms Drain current ID (A) 10 40 Avalanche current IAS (A) 50 30 10 30 (1) 3 45mJ 20 1 0.1 DC 10 (2) 0.3 0.01 1 10 100 1000 0 0 20 40 60 80 100 120 140 160 0.1 0.1 0.3 1 3 10 Drain to source voltage VDS (V) Ambient temperature Ta (˚C) L-load (mH) ID  VGS 10 VDS=25V TC=25˚C 8 6 Vth  TC 50 VDS=25V ID=1mA 5 VDS  VGS TC=25˚C Drain to source voltage VDS (V) Gate threshold voltage Vth (V) 40 ID=10A 30 Drain current ID (A) 4 6 3 4 20 2 2 1 10 5A 2.5A 0 0 1 2 3 4 5 6 7 0 0 25 50 75 100 125 150 0 0 5 10 15 20 25 30 Gate to source voltage VGS (V) Case temperature TC (˚C) Gate to source voltage VGS (V) RDS(on)  ID Drain to source ON-resistance RDS(on) (Ω) 6 6 | Yfs |  ID Input capacitance (Common source), Output capacitance (Common source), Reverse transfer capacitance (Common source) Ciss,Coss,Crss (pF) 10000 Ciss, Coss, Crss  VDS VDS=25V TC=25˚C f=1MHz TC=25˚C 5 Forward transfer admittance |Yfs| (S) TC=25˚C 5 1000 Ciss 4 4 3 VGS=10V 2 15V 1 3 100 Coss Crss 10 2 1 0 0 2 4 6 8 10 0 0 1 2 3 4 5 6 7 8 1 0 40 80 120 160 200 Drain current ID (A) Drain current ID (A) Drain to source voltage VDS (V) 2 Power F-MOS FETs VDS, VGS  Qg 600 12 100 2SK2340 Rth(t)  t Notes: Rth was measured at Ta=25˚C and under natural convection. (1) without heat sink (2) with a 50 × 50 × 2mm Al heat sink 10 (1) 500 VDS 400 VGS 300 10 Thermal resistance Rth(t) (˚C/W) Drain to source voltage VDS (V) Gate to source voltage VGS (V) (2) 8 6 1 200 4 0.1 100 2 0 0 10 20 30 40 50 0 60 0.01 10–4 10–3 10–2 10–1 1 10 102 103 Gate charge amount Qg (nC) Time t (s) 3