Silicon MOS FETs (Small Signal)
2SK657
Silicon N-Channel MOS FET
For switching
unit: mm
s Features
q High-speed switching q M type package, allowing easy automatic and manual insertion as well as stand-alone fixing to the printed circuit board.
1.5
0.4
6.9±0.1 1.5 R0.9 R0.9
2.4±0.2 2.0±0.2 3.5±0.1
2.5±0.1 1.0
1.0
1.0±0.1
R
0. 7
0.85
Parameter Drain to Source breakdown voltage Gate to Source voltage Drain current Max drain current Allowable power dissipation Channel temperature Storage temperature
Symbol VDSS VGSO ID IDP PD Tch Tstg
Ratings 50 8 ±100 ±200 400 150 −55 to +150
Unit V V mA mA mW °C °C
3
2
1
2.5
2.5
1: Gate 2: Drain 3: Source EIAJ: SC-71 M Type Mold Package
Internal Connection
D
G
1.25±0.05
s Absolute Maximum Ratings (Ta = 25°C)
0.55±0.1
0.45±0.05
S
s Electrical Characteristics (Ta = 25°C)
Parameter Drain to Source cut-off current Gate to Source leakage current Drain to Source breakdown voltage Gate threshold voltage Drain to Source ON-resistance Forward transfer admittance Input capacitance (Common Source) Output capacitance (Common Source) Reverse transfer capacitance (Common Source) Turn-on time Turn-off time
*
Symbol IDSS IGSS VDSS Vth RDS(on) | Yfs | Ciss Coss Crss ton* toff*
Conditions VDS = 10V, VGS = 0 VGS = 8V, VDS = 0 ID = 100µA, VGS = 0 ID = 100µA, VDS = VGS ID = 20mA, VGS = 5V ID = 20mA, VDS = 5V, f = 1kHz VDS = 5V, VGS = 0, f = 1MHz VDD = 5V, VGS = 0 to 5V, RL = 200Ω VDD = 5V, VGS = 5 to 0V, RL = 200Ω
min
typ
max 10 50 3.5 50 15 6 1.2
50 1.5 20
10 20
ton, toff measurement circuit
Vout 200Ω Vin VDD = 5V Vout 10% 10% 90% ton toff 90%
50Ω
100µF
VGS = 5V
4.1±0.2
4.5±0.1
Unit µA µA V V Ω mS pF pF pF ns ns
1
Silicon MOS FETs (Small Signal)
PD Ta
0.7 120
2SK657
ID VDS
60
| Yfs | VGS
Forward transfer admittance |Yfs| (mS)
Ta=25˚C VDS=5V Ta=25˚C 50
Allowable power dissipation PD (W)
0.6
100
0.5
Drain current ID (mA)
VGS=6.0V 80 5.5V 5.0V 60
40
0.4
0.3
4.5V
30
40
0.2
4.0V 3.5V 3.0V 2.5V 0 2 4 6 8 10 12
20
0.1
20
10
0 0 20 40 60 80 100 120 140 160
0
0 0 2 4 6 8 10 12
Ambient temperature Ta (˚C)
Drain to source voltage VDS (V)
Gate to source voltage VGS (V)
Ciss, Coss, Crss VDS
Input capacitance (Common source), Output capacitance (Common source), Reverse transfer capacitance (Common source) Ciss,Coss,Crss (pF)
12 VGS=0 f=1MHz Ta=25˚C 120
ID VGS
Drain to source ON-resistance RDS(on) (Ω)
120 VDS=5V Ta=25˚C 100
RDS(on) VGS
ID=20mA 100
10 Ciss 8
Drain current ID (mA)
80
Ta=–25˚C 25˚C
80
6
60
75˚C
60
Ta=75˚C 25˚C –25˚C
4 Coss 2 Crss 1 3 10 30 100
40
40
20
20
0
0 0 2 4 6 8 10 12
0 0 2 4 6 8 10 12
Drain to source voltage VDS (V)
Gate to source voltage VGS (V)
Gate to source voltage VGS (V)
VIN IO
100 30 VO=5V Ta=25˚C
Input voltage VIN (V)
10 3 1 0.3 0.1 0.03 0.01 0.1
0.3
1
3
10
30
100
Output current IO (mA)
2
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