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AN18207A

AN18207A

  • 厂商:

    PANASONIC

  • 封装:

  • 描述:

    AN18207A - Tuner IC for home-audio stereo set - Panasonic Semiconductor

  • 数据手册
  • 价格&库存
AN18207A 数据手册
DATA SHEET Part No. Package Code No. AN18207A LQFP048-P-0707A Publication date: July 2009 SDC00078AEB 1 AN18207A Contents Overview …………………………………………………….……………………………………………………… 3 Features ………………………………………………….………………………………………………………… 3 Applications ………………………………………………….……………………………………………………… 3 Package ………………………………………………….…………………………………………………………. 3 Type ……………………………………………………….…………………………………………………………. 3 Application Circuit Example ……………………………………………………………………………………… 4 Pin Descriptions ………………………………………….………………………………………………………… 5 Absolute Maximum Ratings ……………………………….……………………………………………………… 7 Operating Supply Voltage Range …………………….…………………………………………………………… 7 Allowable Voltage Range …………………………………………………………………………...................... 8 Electrical Characteristics …………….…………………………………………………………………………… 9 Electrical Characteristics (Reference values for design) ……………………………………………………… 11 Electrical Characteristics Test Procedures …………………………………………………………………….. 14 Technical Data …………………………………………………………………………………………………….. 16 I2C-bus interface …………………………………………………………………………………………………. 16 I/O block circuit diagrams and pin function descriptions ……………………………………………………… 27 PD ⎯ Ta diagram ………………………………………………………………………………………………… 36 Usage Notes ………………………………………….……………………………………………………………. 37 Special attention and precaution in using ……………………………………………………………………… 37 SDC00078AEB 2 AN18207A AN18207A Tuner IC for home-audio stereo set Overview AN18207A is all-in-one IC for a radio of home-audio use. As for FM portion, FM MIX to FM MPX are integrated. As for AM portion, AM-RF to AM detector are integrated. FM/AM PLL synthesizer with pre-scale function is also integrated. Therefore, AN18207A can achieve the most function of radio. Features AM : RF + MIX + L-OSC, FM : MIX + L-OSC, FM/AM : IF + DET, FM-MPX, PLL I2C-bus control FM detector coil less Separation adjustment free Applications Tuner, radio Package 48 pin Plastic Low Profile Quad Flat Package (QFP type) Type Silicon Monolithic Bipolar IC SDC00078AEB 3 AN18207A Application Circuit Example SDC00078AEB 1 AN18207A Pin Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Pin name FM MIXIN1 FM MIXIN2 FILTER FM LOSC2 FM LOSC1 RF-GND VCC (Logic) GND (Logic) CPOUT VCC2 (CP) XOSC1 N.C. VDD selector SCL SDA ZAP N.C. N.C. N.C. N.C. TUNED/Test/FM SMeter Lch OUT ST IND Rch OUT FM MPX IN FM/AM DET AM AF IN PD MPXVCO PD ST IND N.C. Type Input Input Input / Output Output Input Ground Power supply Ground Output Power supply Input — Input Input Input / Output — — — — — Output Output Output Output Input Output Input Input / Output Input / Output — FM mixer input 1 FM mixer input 2 FILTER FM local oscillator load 2 (Emitter side) FM local oscillator load 1 (Base side) RF-GND Logic-VCC Logic-GND Charge pump output Charge pump-VCC Crystal oscillator N.C. (Open in IC) VDD selector Serial clock input (SCL) Serial data input / output (SDA) Pulse input for ZAP (Must be open) N.C. (Open in IC) N.C. (Open in IC) N.C. (Open in IC) N.C. (Open in IC) TUNED / Test monitor output / FM S-Meter L-ch. de-emphasis output (External capacitor 0.0056 μF : Time constant = 50 μs) Stereo indicator R-ch. de-emphasis output (External capacitor 0.0056 μF : Time constant = 50 μs) FM MPX input FM/AM detector output AM AF input Phase detector for MPX-VCO Phase detector for MPX stereo detector N.C. (Open in IC) Description SDC00078AEB 5 AN18207A Pin Descriptions (continued) Pin No. 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 VCC GND AM IF IN AM AGC AM MIX FMNUL/VCO AM RF IN AM RF BIAS AM LOSC FM SMADJ FMDETPASS2 N.C. N.C. N.C. FM 2IF IN GND RF-VCC FM MIXOUT Pin name Type Power supply Ground Input Input / Output Output Input / Output Input Input / Output Input / Output Input / Output Input / Output — — — Input Ground Power supply Output VCC GND AM IF amp. input AM-AGC level detector AM mixer output MPX-VCO frequency adjustment / FM detector center adjustment AM RF input AM RF input reference bias AM local oscillator load FM signal meter adjustment FM detector bypass 2 N.C. (Open in IC) N.C. (Open in IC) N.C. (Open in IC) FM 2nd IF amp. input GND for IF amp. RF-VCC FM mixer output Description SDC00078AEB 6 AN18207A Absolute Maximum Ratings Note) Absolute maximum ratings are limit values which are not destructed, and are not the values to which operation is guaranteed. A No. 1 2 3 4 5 Parameter Supply voltage Supply current Power dissipation Operating ambient temperature Storage temperature VCC2 is VCC for charge pump. Symbol VCC1 VCC2 ICC PD Topr Tstg Rating 10.5 11.5 60 294 –20 to +85 –55 to +150 Unit V mA mW °C °C Notes *1 — *2 *3 *3 Notes) *1 : The values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *2 : The power dissipation shown is the value at Ta = 85°C for the independent (unmounted) IC package without a heat sink. When using this IC, refer to the • PD-Ta diagram in the Technical Data and design the heat radiation with sufficient margin so that the allowable value might not be exceeded based on the conditions of power supply voltage, load, and ambient temperature. *3 : Except for the power dissipation, operating ambient temperature, and storage temperature, all ratings are for Ta = 25°C. Operating supply voltage range Parameter Supply voltage range Symbol VCC1 VCC2 Range 8.0 to 10.0 8.0 to 11.0 Unit V Notes * Note) * : The values under the condition not exceeding the above absolute maximum ratings and the power dissipation. VCC2 is VCC for charge pump. SDC00078AEB 7 AN18207A Allowable Voltage Range Notes) Voltage values, unless otherwise specified, are with respect to GND. GND is voltage for RF-GND, GND(Logic), GND(IF), GND(IF AMP). RF-GND = GND(Logic) = GND(IF) = GND(IF AMP) Do not apply external currents or voltages to any pin not specifically mentioned. Please make Pin16 open. For the circuit currents, "+" denotes current flowing into the IC, and "−" denotes current flowing out of the IC. Pin No. 1 2 3 5 11 13 14 15 25 27 28 29 33 34 36 37 38 39 40 41 45 Pin name FM MIXIN1 FM MIXIN2 FILTER FM LOSC1 XOSC1 VDD selector SCL SDA FM MPX IN AM AF IN PD MPXVCO PD ST IND AM IF IN AM AGC FMNUL/VCO AM RF IN AM RF BIAS AM LOSC FM SMADJ FMDETPASS2 FM 2IF IN Rating – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) − 0.3 to 5.3 − 0.3 to 5.3 – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) – 0.3 to (VCC1 + 0.3) Unit V V V V V V V V V V V V V V V V V V V V V Notes — — — — — — — — — — — — — — — — — — — — — SDC00078AEB 8 AN18207A Electrical Characteristics at VCC1 = 9.0 V, VCC2 = 10 V Note) Ta = 25°C±2°C unless otherwise specified. B No. AM 1 2 3 4 5 6 7 8 Parameter fc = 999 kHz AM-quiescent current AM output 1 AM output 2 AM-S/N ratio 1 AM-S/N ratio 2 AM THD 1 AM THD 2 AM-SD sensitivity fc = 10.7 MHz Symbol Conditions Limits Min Typ Max Unit Notes amIt amVo1 amVo2 amSN1 amSN2 amT1 amT2 amSDS No input, Current from VCC1 VIN3 = 30 dBμ, 1 kHz, 30% AM output VIN3 = 74 dBμ, 1 kHz, 30% AM output VIN3 = 30 dBμ, 1 kHz, 30% AM output S/N VIN3 = 74 dBμ, 1 kHz, 30% AM output S/N VIN3 = 74 dBμ, 1 kHz, 30% output distortion factor VIN3 = 103 dBμ, 1 kHz, 30% output distortion factor 0% mod Sens set (I2C) = X'C' 14 52 128 17 47 — — 33 28 92 208 23 53 0.4 0.5 43 42 172 288 — — 1.1 2.0 53 mA mV[rms] mV[rms] *1 — — — — — — — dB dB % % dBμ FM mono 9 10 11 12 13 14 15 16 FM-RDS output FM-quiescent current 1 FM-quiescent current 2 FM output FM-S/N ratio FM-mono THD FM-SD sensitivity FM-mute ratio fmRDS fmIt1 fmIt2 fmVo fmSN fmTm1 fmSDS fmMUTE VIN2 = 80 dBμ, 1 kHz, 100% No input, Current supplied from VCC1 No input, Current supplied from VCC2 VIN2 = 80 dBμ, 1 kHz, 100% output VIN2 = 100 dBμ, 1 kHz, 100% FM output S/N VIN2 = 80 dBμ, 1 kHz, 100% output distortion factor 0% mod Sens set (I2C) = X'5' VIN2 = 80 dBμ, 1 kHz, 100% output ratio to fmVo (mute on) 320 36 53 600 68 — 31 54 480 47 105 800 72 0.2 41 74 640 58 160 mV[rms] — *1 *1 — — — — — mA μA 1 000 mV[rms] — 1.3 51 — dB % dBμ dB Note) *1 : No input = –10 dBμ or less. SDC00078AEB 9 AN18207A Electrical Characteristics (continued) at VCC1 = 9.0 V, VCC2 = 10 V Note) Ta = 25°C±2°C unless otherwise specified. B No. FM stereo 17 18 Parameter fc = 10.7 MHz Symbol Conditions Limits Min Typ Max Unit Notes FM-L-ch. separation FM-R-ch. separation fmSepL fmSepR VIN2 = 80 dBμ, 1 kHz, 90% L-ch. output separation VIN2 = 80 dBμ, 1 kHz, 90% R-ch. output separation VIN2 = 80 dBμ, 1 kHz, stereo (L + R) 90% output distortion factor pilot = 10% output level VIN2 = 80 dBμ, fp = 19 kHz VIN1 = 12 dBμ, 1 kHz, 100% mod VODET 30 30 40 40 — — dB dB — — 19 FM-stereo THD fmTs1 — 0.35 1.5 % — 20 21 FM-carrier-leak FM-stereo detect sensitivity fc = 98 MHz fmCL fmSTON 20 1.3 — 3.0 — 5.0 dB % — — FM FE 22 23 24 FM-FE S/N ratio FM-Mixer output level FM-LOSC level fc = 10.7 MHz fmSN 28 6.4 215 39 8.2 280 — dB — — — fmMIXout VIN1 = 64 dBμ, IFOUT fmOSCout No input, 108.7 MHz 10.0 mV[rms] 345 mV[rms] FM mono 25 FM limiting sensitivity fmVlim 1 kHz, 100% of output –3 dB (Ref. input level VIN2 = 80 dBμ) VIN2 = 100 dBμ, fm = 1 kHz AM : 30% mod FM : 100% mod — 26 37 dBμ dB — 26 AM suppression ratio AMR 54 68 — — SDC00078AEB 10 AN18207A Electrical Characteristics (Reference values for design) at VCC1 = 9.0 V , VCC2 = 10 V Notes) Ta = 25°C±2°C unless otherwise specified. The characteristics listed below are reference values derived from the design of the IC and are not guaranteed by inspection. If a problem does occur related to these characteristics, we will respond in good faith to user concerns. B No. PLL 27 28 Parameter Symbol Conditions Reference values Min Typ Max Unit Notes Charge pump output pull-up current Charge pump output pull-down current Icpup Icpdown 120 μA mode Pin 9 output current 120 μA mode Pin 9 input current 90 –170 129 –120 170 –72 μA μA — — I2C interface 29 30 ACK Low-level output voltage Low-level output voltage 1 VACK VOL1 VIHI_5 ACK Pin 15 voltage I = 3 mA VDD > 2 V IP50 = 3 mA Voltage which recognized that SDA and SCL are High-level 5 V mode Pin 13 : GND Voltage which recognized that SDA and SCL are Low-level 5 V mode Pin 13 : GND Voltage which recognized that SDA and SCL are High-level 3 V mode Pin 13 : OPEN Voltage which recognized that SDA and SCL are Low-level 3 V mode Pin 13 : OPEN 0 0 — — 0.4 0.4 V V — — 31 High-level input voltage 1 3.5 — 5.5 V — 32 Low-level input voltage 1 VILO_5 – 0.5 — 1.5 V — 33 High-level input voltage 2 VIHI_3 2.1 — 3.5 V — 34 Low-level input voltage 2 VILO_3 – 0.5 — 0.9 V — SDC00078AEB 11 AN18207A Electrical Characteristics (Reference values for design) (continued) at VCC1 = 9.0 V , VCC2 = 10 V Notes) Ta = 25°C±2°C unless otherwise specified. The characteristics listed below are reference values derived from the design of the IC and are not guaranteed by inspection. If a problem does occur related to these characteristics, we will respond in good faith to user concerns. B No. Parameter Symbol Conditions Reference values Min Typ Max Unit Notes I2C Interface (Fast-mode) 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 SCL maximum frequency Hysteresis of Schmitt trigger inputs 1 Hysteresis of Schmitt trigger inputs 1 Output fall time from VIHmin to VILmax Pulse width of spikes which must be suppressed by the input filter Capacitance for each I/O pin Hold time (repeated) Low period of the SCL clock High period of the SCL clock Set-up time for a repeat START condition Data hold time Data set-up time Rise time of both SDA and SCL signals Fall time of both SDA and SCL signals Set-up time of STOP condition Bus free time between a STOP and START condition Capacitive load for each bus line fSCL Vhys1 Vhys2 Tof tSP Ci tHD:STA tLOW tHIGH tSU:STA tHD:DAT tSU:DAT tr tf tSU:STO tBUF Cb — 5 V mode Pin 13 : GND 3 V mode Pin 13 : OPEN Bus capacitance : 10 pF to 400 pF Ip < 6 mA — Bus capacitance : 10 pF to 400 pF The first clock pulse is generated after tHD:STA ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ — 0.25 0.15 20 + 0.1Cb 0 — 0.6 1.3 0.6 0.6 0 100 20 + 0.1Cb 20 + 0.1Cb 0.6 1.3 ⎯ — — — ⎯ — — — ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 400 — — 250 50 10 — ⎯ ⎯ ⎯ 0.9 ⎯ 300 300 ⎯ ⎯ 400 kHz V V ns ns pF μs μs μs μs μs ns ns ns μs μs pF *2 *2 *2 *2 *2 *2 *2 *2 *2 *2 *2 *2 *2 *2 *2 *2 *2 SDC00078AEB 12 AN18207A Electrical Characteristics(Reference values for design)(continued)at VCC1 = 9 V, VCC2 = 10 V Notes) Ta = 25°C±2°C unless otherwise specified. The characteristics listed below are reference values derived from the design of the IC and are not guaranteed by inspection. If a problem does occur related to these characteristics, we will respond in good faith to user concerns. B No. Parameter Symbol Conditions Reference values Min Typ Max Unit Notes I2C Interface (Fast-mode) (continued) 52 53 54 55 56 57 Noise margin at the Low-level for each connected device Noise margin at the High-level for each connected device Noise margin at the Low-level for each connected device Noise margin at the High-level for each connected device Input current each I/O pin at 5V mode Input current each I/O pin at 3V mode VaL1 VaH1 VaL2 VaH2 Ii5 Ii3 5 V mode Pin 13 : GND 5 V mode Pin 13 : GND 3 V mode Pin 13 : OPEN 3 V mode Pin 13 : OPEN VIN = 0.5 V to 4.5 V VIN = 0.3 V to 2.7 V 0.5 1.0 0.3 0.6 –10 –10 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 10 10 V V V V μA μA *2 *2 *2 *2 *2 *2 SDA tf tLOW tr tSU:DAT tf tHD:STA tSP tr tBUF SCL tHD:STA tHD:DAT tHIGH tSU:STA Sr tSU:STO P S S : START condition Sr : Repeat START condition P : STOP condition Notes) *2 : The timing of Fast-mode devices in I2C-bus is specified as above. SDC00078AEB 13 AN18207A Electrical Characteristics Test Procedures C No. AM 1 2 3 4 5 6 7 8 AM-quiescent current AM output 1 AM output 2 AM-S/N ratio 1 AM-S/N ratio 2 AM THD 1 AM THD 2 AM-SD sensitivity — 37 37 37 37 37 37 37 No signal f = 999 kHz, VIN3 = 30 dBμ fs = 1 kHz, AM : 30% mod f = 999 kHz, VIN3 = 74 dBμ fs= 1 kHz, AM : 30% mod f = 999 kHz, VIN3 = 30 dBμ fs = 1 kHz, AM : 30% S/N f = 999 kHz, VIN3 = 74 dBμ fs = 1 kHz, AM : 30% S/N f = 999 kHz, VIN3 = 74 dBμ fs = 1 kHz, AM : 30% mod f = 999 kHz, VIN3 = 110 dBμ, fs= 1 kHz, AM : 30% mod f = 999 kHz, AM : 0% mod Input Parameter Pin No. Conditions Pin No. Output Conditions VCC1 VCC2 Pin settings SW1 SW2 SW3 SW4 — 22 22 22 22 22 22 21 — 9V 9V 9V 9V 9V 9V 9V 9V 10 V 10 V 10 V 10 V 10 V 10 V 10 V 10 V 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 30 kHz LPF 30 kHz LPF 30 kHz LPF 30 kHz LPF 30 kHz LPF 30 kHz LPF 27 kΩ pull-up FM mono 9 FM-RDS output 2 — — 2 2 2 2 2 VIN2 = 80 dBμ, fs = 1 kHz FM : 100% mod No signal No signal f = 10.7 MHz, VIN2 = 80 dBμ, fs = 1 kHz, FM : 100% mod f = 10.7 MHz, VIN2 = 100 dBμ, FM : 100% L-ch S/N f = 10.7 MHz, VIN2 = 80 dBμ, fs = 1 kHz, FM : 100% mod f = 10.7 MHz, 0 % mod f = 10.7 MHz, VIN2 = 80 dBμ fs = 1 kHz, FM : 100% mod 26 — — 24 24 24 21 22 24 30 kHz LPF — — 30 kHz LPF 30 kHz LPF 30 kHz LPF 27 kΩ pull-up 30 kHz LPF 9V 9V 9V 9V 9V 9V 9V 9V 10 V 10 V 10 V 10 V 10 V 10 V 10 V 10 V 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 10 FM-quiescent current 1 11 FM-quiescent current 2 12 FM output 13 FM-S/N ratio 14 FM-mono THD 15 FM-SD sensitivity 16 FM-mute ratio SDC00078AEB 14 AN18207A Electrical Characteristics Test Procedures (continued) C No. FM stereo 17 FM-L-ch. separation 2 f = 10.7 MHz, VIN2 = 80 dBμ, 1 kHz, (L = 90%, pilot = 10%) f = 10.7 MHz, VIN2 = 80 dBμ, 1 kHz (R = 90%, pilot = 10%) f = 10.7 MHz, VIN2 = 80 dBμ, 1 kHz (L + R = 90%, pilot = 10%) f = 10.7 MHz, VIN2 = 80 dBμ, fs = 19 kHz (pilot = 10%) 22 15 kHz LPF 9V 10 V 2 1 1 1 Input Parameter Pin No. Conditions Pin No. Output Conditions VCC1 VCC2 Pin settings SW1 SW2 SW3 SW4 18 FM-R-ch. separation 2 24 15 kHz LPF 9V 10 V 2 1 1 1 19 FM-stereo THD 2 22 24 15 kHz LPF 9V 10 V 2 1 1 1 20 FM-carrier-leak VIN2 VOL ― 9V 10 V 2 1 2 2 21 FM-stereo detect sensitivity FM FE fc = 98 MHz f = 10.7 MHz, VIN2 VIN2 = 80 dBμ, fs = 19 kHz 12 27 kΩ pull-up 9V 10 V 2 1 2 2 22 FM-FE S/N ratio f = 98 MHz, VIN1 VIN1 = 12 dBμ, 1 kHz, 100% mod VIN1 — f = 98 MHz, VIN3 = 64 dBμ, 0% mod No input, f = 108.7 MHz VO DET 30 kHz LPF 9V 10 V 1 1 2 2 23 FM-IF output level 24 FM-LOSC level FM mono fc = 10.7 MHz IF OUT VF MOS — — 9V 9V 10 V 10 V 2 2 1 1 2 2 2 2 25 FM limiting sensitivity VIN2 1 kHz, 100% of output –3 dB (Ref. input level VIN2 = 80 dBμ) VIN2 = 100 dBμ, fm = 1 kHz, AM : 30% mod FM : 100% mod VOL 30 kHz LPF 9V 10 V 2 1 2 2 26 AM suppression ratio VIN2 VOL 30 kHz LPF 9V 10 V 2 1 2 2 SDC00078AEB 15 AN18207A Technical Data I2C-bus interface 1. Basic Rules This IC, I2C-bus, is designed to correspond to the Standard-mode (100 kbps) and Fast-mode (400 kbps) devices in the version 2.1 of Philips Co.'s specification. However, it does not correspond to the HS-mode (to 3.4 Mbps). This IC will be operated as a slave device in the I2C-bus system. The program operation check of this IC has not been conducted on the multi-master bus system and the mix-speed bus system, yet. The connected confirmation of this IC to the CBUS receiver also has not been checked. Please confirm our company if it will be used in these mode systems. Purchase of Panasonic I2C Components conveys a license under the Philips I2C patent right to use these components in an I2C systems, provided that the system conforms to the I2C standard specifications as defined by Philips. 2. START and STOP conditions A High to Low transition on the SDA line while SCL is High is one such unique case. This situation indicates a START condition. A Low to High transition on the SDA line while SCL is High defines a STOP condition. START and STOP conditions are always generated by the master. The bus is considered to be free again a certain time after the STOP condition. START condition SDA STOP condition SCL 3. Transferring Data Every byte put on the SDA line must be 8-bits long. The number of bytes that can be transmitted per transfer is unrestricted. Each byte has to be followed by an acknowledge bit. Data is transferred with the most significant bit (MSB) first. If a slave can't receive or transmit another complete byte of data until it has performed some other function, for example servicing an internal interrupt, it can hold the clock line SCL Low to force the master into a wait state. Data transfer then continues when the slave is ready for another byte of data and releases clock line SCL. P SDA MSB acknowledgement signal from slave acknowledgement signal from receiver Sr SCL S or Sr START or repeated START condition 1 2 7 8 9 ACK 1 2 3–8 9 ACK Sr or P STOP or repeated START condition SDC00078AEB 16 AN18207A Technical Data (continued) I2C-bus interface (continued) 4. DATA format 1) Write mode 1.1) Slave address : 1011 0110 (B6H) 1.2) Format Data update mode S START condition Slave address WA Ack Write Mode : 0 Sub address A Data byte AP STOP condition Auto-increment mode S Slave address WA Sub address A Data 1 A Data 2 A Data n AP 2) Read mode 2.1) Subaddress : None 2.2) Slave address : 1011 0111 (B7H) 2.3) Format S START condition Slave address RA Ack Read Mode : 1 Data byte AP STOP condition Ex.) In case data is read from Address 01h after data is written to Address 01h. Write S Slave address 0A Sub address 01h A Data byte AP Read S Slave address 1A Data byte AP SDC00078AEB 17 AN18207A Technical Data (continued) I2C-bus interface (continued) 5. Register Map Sub Address MSB D7 PLL-CP Current Select (ICO) AM SD Hysteresis Control (AMHIS) D6 D5 DATA BYTE D4 D3 D2 D1 LSB D0 00 — — FM and SD Tuned Level Adjust (DSS4 - DSS0) Mute ON/OFFMA TX (MUS) Stereo Tuning Selector (TUS) 01 PLL-Ref Frequency Select (RO) CP Select (FCPS) Force Monaural (FOM) SD Mode Switch (SDS) FM/AM Switch (DSS0) 02 PLL-N Divider (N7 - N0) 03 — FM IF AMP STOP (LIMSTOP) — PLL-N Divider (N13 - N8) Charge Pump Control (PHD1 - PHD0) Analog/Logic Signal Monitor (DS3 - DS0) Read / Write Mode (ZRW) Adjustment Mode (EMU) 04 L-OSC Stop (VMOS3) 05 Adjustment Mode: FM Detector Adjustment / Write Mode (DE5 - DE0) 06 — — — — — Adjustment Mode: MPX Separation Adjustment / Write Mode (SE2 - SE1) Mixer AGC (MXAGC) CIS selection (CIS) AM IF AMP Stop (D070) 07 — — — — — SDC00078AEB 18 AN18207A Technical Data (continued) I2C-bus interface (continued) 6. Sub address byte and data byte format (Write mode) Tuner-control (Group 1) SUB-ADD 00H (Write) Bit LSB : D0 D1 D2 D3 D4 D5 D6 Name DSS0 DSS1 DSS2 DSS3 DSS4 — — Function FM and AM-SD tuned level adjust Be sure to set it when you change FM / AM. High : Sensitivity low Low : Sensitivity high This sensitivity is affected by an external RF amp. gain. Ex.) FM : X'5' AM : X'C' It is recommended to set "0" for DSS4. Don't care (0/1) PLL-charge pump current select 120 μA → Fast lock up time 30 μA → S/N improvement MSB : D7 ICO ICO 0 1 Normal : 120 μA Icp [μA] 120 30 SDC00078AEB 19 AN18207A Technical Data (continued) I2C-bus interface (continued) 6. Sub address byte and data byte format (Write mode) (continued) Tuner-control (Group 2) SUB-ADD 01H (Write) Bit LSB : D0 Name FAS FM / AM switch 0 : FM 1 : AM SD mode switch (FM / AM IF counter) 1 : SD mode (IF counter : ON) AM AGC-time-constant select 0 : 500 kΩ 1 : 10 kΩ IF counter is activated by setting this bit to "1" at I2C stop condition. And an inside impedance of AM-AGC is changed at AM. A time constant becomes 1/50 in the case of "1". *1) Force monaural 1 : monaural SUB detection and VCO stop. So IC is changed to monaural mode Selector to force monaural when stereo indicator is off. 0 : ON 1 : OFF Mute switch 1 : ON Output AF buffer amp. mute FM mode & SDS OFF 0 : CP 30 μA fixed 1 : CP selectable (SUB-ADD 00H D7) PLL-reference frequency selector RO D6 RO 0 1 MSB : D7 AMHIS AM-SD hysteresis control 1 : AM-SD hysteresis ON FM 25 kHz 50 kHz AM 10 kHz 9 kHz Function D1 SDS D2 FOM D3 TUS D4 MUS D5 FCPS Note) *1 : When SDS mode is ON and stop condition of I2C comes, IF count is carried out . After 70 ms of Stop condition, a result is ready to read. SDC00078AEB 20 AN18207A Technical Data (continued) I2C-bus interface (continued) 6. Sub address byte and data byte format (Write mode) (continued) Tuner-control (Group 2) SUB-ADD 02H (Write) Bit LSB : D0 D1 D2 D3 D4 D5 D6 MSB : D7 Name N0 N1 N2 N3 N4 N5 N6 N7 PLL-N divider N-divider FM : N = 213 × N13 + 212 × N12 + 211 × N11 + ··· + 20 × N0 AM : N = 29 × N13 + 28 × N12 + 27 × N11 + ··· + 20 × N4 (Not use N0 to N3 at AM mode.) Function Tuner-control (Group 2) SUB-ADD 03H (Write) Bit LSB : D0 D1 D2 D3 D4 D5 D6 MSB : D7 Name N8 N9 N10 N11 N12 N13 — — PLL-N divider N-divider FM : N = 213 × N13 + 212 × N12 + 211 × N11 + ··· + 20 × N0 AM : N = 29 × N13 + 28 × N12 + 27 × N11 + ··· + 20 × N4 (Not use N0 to N3 at AM mode.) Function SDC00078AEB 21 AN18207A Technical Data (continued) I2C-bus interface (continued) 6. Sub address byte and data byte format (Write mode) (continued) Tuner-control (Group 3) SUB-ADD 04H (Write) Bit Name Analog / logic signal monitor DS0 LSB : D0 DS0 0 1 0 1 D1 DS1 0 1 0 D2 DS2 1 0 1 0 1 0 D3 DS3 1 0 1 DS1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 DS2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 DS3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Monitor OFF Monitor of FM detector reference voltage Monitor of FM detector adjustment DAC output Monitor of FM separation adjustment DAC output Monitor of the hysteresis DC voltage of FM-SD indicator Monitor of the hysteresis DC voltage of stereo indicator Monitor of SD-ON level adjustment DAC output FM S-Meter AM S-Meter Monitor of MPX-VCO PS output ANC output RED output F450 NIFC Monitor of the hysteresis DC voltage of AM-SD indicator Monitor point Function Charge pump control D4 PHD0 PHD0 0 1 D5 PHD1 0 1 D6 MSB : D7 VMOS3 LIMSTOP 1 : L-OSC stop 0 : FM IF amp. stop (Pin 10 Low) PHD1 0 0 1 1 Charge pump control Normal mode Force up Force down Hi-Z mode SDC00078AEB 22 AN18207A Technical Data (continued) I2C-bus interface (continued) 6. Sub address byte and data byte format (Write mode) (continued) Tuner-control (Group 3) SUB-ADD 05H (Write) Bit LSB : D0 D1 D2 D3 D4 D5 D6 MSB : D7 Name EMU ZRW DE0 DE1 DE2 DE3 DE4 DE5 At adjustment mode : FM detector adjustment At write mode : 1 : Writing bit Adjustment mode Read / write mode 1 : ON 0 : Read 1 : Write Function Tuner-control (Group 3) SUB-ADD 06H (Write) Bit LSB : D0 D1 D2 D3 D4 D5 D6 MSB : D7 Name SE0 SE1 SE2 — — — — — Set them "0" all. At write mode : 1 : Writing bit Function At adjustment mode : MPX separation adjustment SDC00078AEB 23 AN18207A Technical Data (continued) I2C-bus interface (continued) 6. Sub address byte and data byte format (Write mode) (continued) Tuner-control (Group 3) SUB-ADD 07H (Write) Bit LSB : D0 D1 D2 D3 D4 D5 D6 MSB : D7 Name D070 CIS MXAGC — — — — — Set them "0" all. 1 : AM IF amp. stop 0 : FM IF counter band width = 40 kHz, 1 : FM IF counter band width = 10 kHz 0 : Mixer AGC off, 1 : Mixer AGC on Function SDC00078AEB 24 AN18207A Technical Data (continued) I2C-bus interface (continued) 7. Data byte format (Read mode) Tuner-control (Group 4) SUB-ADD none (Read) Bit LSB : D0 D1 D2 D3 D4 D5 D6 MSB : D7 Name IFC — — — — — — — D1 to D7 = 1 Function IF counter output 0 : No signal AM IF C band width = 4 kHz, FM IFC band width = 40 kHz, or 10 kHz SDC00078AEB 25 AN18207A Technical Data (continued) I2C-bus interface (continued) 8. Precaution in setup of I2C-bus data 1) Power on a) All data must be set on IC when the power supply is tuned on. (SUB ADD : 00H to 07H) b) IF limit amplifier must be ON at the time of the initial data transfer of I2C. (SUB ADD : 04H, D7 = "1") c) The power supply transition time (VCC1, 2 = 0 → 9 V) must be more than 10 ms. d) Electric current flows in the power supply off condition when a power supply is connected to the TUNED terminal (Pin 21). Therefore, be careful in the case of the backup mode such as a microcomputer. 2) Pin 16 Don't use Pin 16 (ZAP). It must be open. 3) Monitor function a) Pin 21 of this IC has a function to monitor internal circuit terminals of this IC. The monitor point of analog signal or digital signal is set by SUBADD : 04H, D0 to D3. The choice of monitor point of logic signal is SUBADD : 0AH .It is chosen by D0 to D2 of 0AH. b) Don't choose more than one monitor point (analog, logic) at the same time. c) It is prohibited choosing the monitor point when IF limit amplifier is compulsory off (SUBADD : 04H, D7 = "0"). Be sure to turn on IF limit amplifier when you use monitor function. d) Monitor function is a function for the test purpose only in our company, and its function is not guaranteed. When it is needed to send data, all data must be "0". Don't use it with the actual tuner set. 4) Charge pump test function a) SUBADD : 04H D4 to D5 are the bits for the function check of charge pump. For a normal use, they must be set to "0". 5) Handling unused bits a) All unused bits must be set to "0". When it is necessary to input Subaddress data, all unused bits must be set to "0". 6) Set number of N divider Don't establish N value about settlement of N divider in 271 or less. 7) The timing of IF counter IF counter starts to count when it detects Stop condition of write mode at SDS mode (SUB ADD : 01H, D1 = "1"). The result of the IF count can get it when it begins to read it after the progress about more than 70 ms and it is made the mode and begins to read it. To prevent IF counter’s abnormal function, so that stop condition may not come between about 70 ms of the following. (see the figure below.) Even if this timing isn't kept, IC doesn't become uncontrollable. But the following condition are occurred by the transmitting data. a) When there are data which turn off SDS : Counter stops, and it is reset. The judgment result of IF counter isn't right. Ignore data and erase it. b) In the case of the dummy data: Stop condition is ignored, and IF counter works as it is. (It isn't reset.) If an original access prohibition time passes, the proper result of IF counter is obtained. Wait time Gate time reset Start (stop condition) Access prohibition time : More than 70 ms. (Reference value) SDC00078AEB 26 AN18207A Technical Data (continued) I/O block circuit diagrams and pin function descriptions Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. Pin No. Waveform and voltage Internal circuit Impedance Description VCC 100 μA 41 1.9 V 41 1k GND 3k 4 kΩ FM detector bypass 2 External capacitor = 0.1 μF 42 to 44 — OPEN — N.C. 4.2 V VCC 14.6k 45 GND 12k GND 330 45 10.7 MHz 2.3 V 20.4k 330 Ω (AC input) FM IF amp. input 46 — — — GND (IF amp) 47 VCC 47 — GND 12k GND — RF-VCC SDC00078AEB 27 AN18207A Technical Data (continued) I/O block circuit diagrams and pin function descriptions (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. Pin No. Waveform and voltage f = fOSC – fRF Internal circuit Impedance Description 48 or f = fRF – fOSC GND 1 12k GND 48 500 Ω to High FM mixer output 1 f = fmRF 2 2.2k VCC 2.2k 2.3 V VCC 400 Ω (f = 100 MHz) FM mixer input 2 GND 12k GND GND 12k GND SDC00078AEB 28 AN18207A Technical Data (continued) I/O block circuit diagrams and pin function descriptions (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. Pin No. Waveform and voltage Internal circuit VCC Impedance Description 3 3 1.9 V GND 1k 1 kΩ FM AGC FILTER External capacitor = 0.1 μF VCC 4 DC 4 VCC 3.9k 300 μA 3.9 V GND 5 Low FM L-OSC2 FM local oscillator load 2 (Emitter side) 5 GND 12k GND 12k GND 3.9 kΩ FM L-OSC1 FM local oscillator load 1 (Base side) RF-GND 6 — — — SDC00078AEB 29 AN18207A Technical Data (continued) I/O block circuit diagrams and pin function descriptions (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. Pin No. Waveform and voltage Internal circuit Impedance Description 7 7 DC GND 12k GND — VCC for Logic 8 — — — GND for Logic and Charge pump VCC Phase DET 9 9 DC GND 12k GND 10 VCC2 High CPOUT Charge pump output 10 DC GND 12k GND — VCC2 Charge pump-VCC VCC 11 DC 11 GND 50 400 μA 120 Ω Crystal oscillator 12k GND 12 — OPEN — N.C. SDC00078AEB 30 AN18207A Technical Data (continued) I/O block circuit diagrams and pin function descriptions (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. Pin No. Waveform and voltage Internal circuit 3V 102k Impedance Description 13 — 13 1.05k GND 103 kΩ VDD selector 14 14 1k High GND 12k GND 15 102k 102k SCL Serial clock input GND 15 12k GND 16 12k GND 1k High 102k 102k SDA Serial data input / output 16 — GND 12k GND — ZAP (Must be open.) 17 to 20 — OPEN — N.C. SDC00078AEB 31 AN18207A Technical Data (continued) I/O block circuit diagrams and pin function descriptions (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. Pin No. Waveform and voltage Internal circuit Impedance Description 21 — 1k 12k GND VCC 21 GND 1 kΩ TUNED/Test SD-OUT FM/AM tuning indicator Test monitor output 22 DC bias = 3.5 V 7.35k 22 1.05k GND 1k GND 23 8.4 kΩ L-ch. de-emphasis output (External capacitor 0.0056 μF Time constant = 50 μs) 23 — 12k GND GND 1 kΩ ST-OUT FM stereo indicator VCC 24 DC bias = 3.5 V 7.35k 24 1.05k GND 8.4 kΩ R-ch. de-emphasis output (External capacitor 0.0056 μF Time constant = 50 μs) GND 25 1.05k 498k GND 3.5 V AM-DET 205 25 Composite signal 500 kΩ FM MPX input 26 26 — FM-DET GND 12k GND 27 1.05k 10k GND 200 Ω FM/AM detector output (Please make it to OPEN when unused.) 27 AM-AF 11 kΩ AM AF input 3.5 V SDC00078AEB 32 AN18207A Technical Data (continued) I/O block circuit diagrams and pin function descriptions (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. Pin No. Waveform and voltage Internal circuit Impedance Description 28 DC ≅ VCC1 – 1.4 V 1k 46k 46k 46 kΩ 1.05k 28 Phase detector for MPX-VCO GND 29 DC ≅ VCC1 – 1.4 V 214k 1k 214k 214 kΩ 1.05k 29 Stereo DET of MPX GND SDC00078AEB 33 AN18207A Technical Data (continued) I/O block circuit diagrams and pin function descriptions (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. Pin No. 30 Waveform and voltage — Internal circuit OPEN Impedance — N.C. Description 31 31 — GND 12k GND 12k GND 12k GND — VCC 32 — ― — GND 33 f = 450 kHz 2V 33 GND GND 205 3.1k 12k 2V 3.3 kΩ AM IF amp. input 50k at SDS ON 34 DC AM DET 500k 1.05k 1.05k 34 GND 51 kΩ / 501 kΩ AM-AGC level detector 35 20 GND GND RFin 35 f = fOSC – fRF OSCin High AM mixer output 1 mA SDC00078AEB 34 AN18207A Technical Data (continued) I/O block circuit diagrams and pin function descriptions (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. Pin No. Waveform and voltage 2V Internal circuit Impedance Description 36 — 1k 36 1 kΩ FM DET-NULL and MPXVCO adjustment GND 1k VCC 37 522 kHz – 1 720 kHz 38 250 37 VCC 250 1 mA 1k GND 12k GND 39 9k GND 12k GND High AM RF input 38 — 1 kΩ AM RF reference GND 39 DC 30 mA 12k GND 480 mA — AM L-OSC AM local oscillator load 5V 22k 1.05k 40 GND 40 — 23 kΩ FM signal meter adjustment SDC00078AEB 35 AN18207A Technical Data (continued) PD ⎯ Ta diagram SDC00078AEB 36 AN18207A Usage Notes Special attention and precaution in using 1. This IC is intended to be used for general electronic equipment [Home audio tuner]. Consult our sales staff in advance for information on the following applications: Special applications in which exceptional quality and reliability are required, or if the failure or malfunction of this IC may directly jeopardize life or harm the human body. Any applications other than the standard applications intended. (1) Space appliance (such as artificial satellite, and rocket) (2) Traffic control equipment (such as for automobile, airplane, train, and ship) (3) Medical equipment for life support (4) Submarine transponder (5) Control equipment for power plant (6) Disaster prevention and security device (7) Weapon (8) Others : Applications of which reliability equivalent to (1) to (7) is required 2. Pay attention to the direction of LSI. When mounting it in the wrong direction onto the PCB (printed-circuit-board), it might smoke or ignite. 3. Pay attention in the PCB (printed-circuit-board) pattern layout in order to prevent damage due to short circuit between pins. In addition, refer to the Pin Description for the pin configuration. 4. Perform a visual inspection on the PCB before applying power, otherwise damage might happen due to problems such as a solderbridge between the pins of the semiconductor device. Also, perform a full technical verification on the assembly quality, because the same damage possibly can happen due to conductive substances, such as solder ball, that adhere to the LSI during transportation. 5. Take notice in the use of this product that it might break or occasionally smoke when an abnormal state occurs such as output pinVCC short (Power supply fault), output pin-GND short (Ground fault), or output-to-output-pin short (load short) . And, safety measures such as an installation of fuses are recommended because the extent of the above-mentioned damage and smoke emission will depend on the current capability of the power supply. And IC is destroyed under the conditions listed below, (1) VCC2 and Pin5 are shorted. (2) VCC2 and Pin22 are shorted. (3) VCC2 and Pin45 are shorted. 6. When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. 7. When using the LSI for new models, verify the safety including the long-term reliability for each product. 8. When the application system is designed by using this LSI, be sure to confirm notes in this book. Be sure to read the notes to descriptions and the usage notes in the book. SDC00078AEB 37 Request for your special attention and precautions in using the technical information and semiconductors described in this book (1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) The technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. No license is granted in and to any intellectual property right or other right owned by Panasonic Corporation or any other company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information described in this book. (3) The products described in this book are intended to be used for standard applications or general electronic equipment (such as office equipment, communications equipment, measuring instruments and household appliances). Consult our sales staff in advance for information on the following applications: – Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. – Any applications other than the standard applications intended. (4) The products and product specifications described in this book are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your requirements. (5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company. 20080805
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