AN7809R

AN7800R/AN78M00R Series Positive Output Voltage Regulators with Reset pin (1A/500mA Type) s Overview The AN7800R and the AN78M00R series are the fixed positive output voltage regulators with reset pin. Stabilized fixed output voltage is obtained from unstable DC input voltage without using any external components. Three types of output voltage, 5V, 9V and 12V, are available for the AN7800R series, and four types, 5V, 8V, 9V and 12V, are available for the AN78M00R series. They can be used in power circuits with current capacitance 1A/500mA. ON/OFF of output voltage can be controlled by the reset pin. 9.6 – 0.1 ø 3.1 4.0 + 0.5 Unit:mm 12.5max. 0.7±0.2 2.3 2.3 2.3 3.3max. 9.0min. 3–1.0 1.8 2.0 0.5±0.1 1.5 1.3 s Features • No external components • Maximum output current :1A (AN7800R) 500mA (AN78M00R) • Output voltage :5V, 9V, 12V (AN7800R) :8V (AN78M08R) • Short-circuit current limiting built-in • Thermal overload protection built-in • Output transistor safe area compensation • ON/OFF of output voltage can be controlled by reset pin. 4-pin SIL Plastic Package with Fin (SSIP004-P-0000) s Block Diagram 1 Pass Tr Q1 Current Source Current Limiter Input RSC 3 Output Reset Starter Voltage Reference + Error Amp. – 4 Thermal Protection R2 R1 2 Common s Absolute Maximum Ratings (Ta=25˚C) Parameter Input voltage Power dissipation Operating ambient temperature Storage temperature Symbol VI PD Topr Tstg Rating 35 10 *1 –20 to + 80 –55 to + 150 Unit V W ˚C ˚C *1 Follow the derating curve. When Tj exceeds 150˚C, the internal circuit cuts off the output. s Electrical Characteristics (Ta=25˚C) AN7800R Series · AN7805R (1A, 5V Type) Parameter Output voltage Output voltage tolerance Line regulation Load regulation Bias current Input bias current fluctuation Load bias current fluctuation Output noise voltage Ripple rejection ratio Minimum input/output voltage difference Output impedance Output short circuit current Peak output current Output voltage temperature coefficient Output voltage at reset Reset input current Symbol VO VO REGIN REGL Ibias ∆Ibias (IN) ∆Ibias (L) Vno RR VDIF (min.) ZO IO (Short) IO (Peak) ∆VO/Ta VO (Reset) II (Reset) Condition Tj=25˚C VI=8 to 20V, IO=5mA to 1A, Tj=0 to 125˚C, PD < 15W = VI=7.5 to 25V, Tj=25˚C VI=8 to 12V, Tj=25˚C IO=5mA to 1.5A, Tj=25˚C IO=250 to 750mA, Tj=25˚C Tj=25˚C VI=7.5 to 25V, Tj=25˚C IO=5mA to 1A, Tj=25˚C f=10Hz to 100kHz VI=8 to 18V, IO=100mA, f=120Hz IO=1A, Tj=25˚C f=1kHz VI=35V, Tj=25˚C Tj=25˚C IO=5mA, Tj=0 to 125˚C Tj=25˚C, II (Reset)=1mA Tj=25˚C 62 2 17 700 2 – 0.3 1 1 40 min 4.8 4.75 3 1 15 5 3.9 typ 5 max 5.2 5.25 100 50 100 50 8 1.3 0.5 Unit V V mV mV mV mV mA mA mA µV dB V mΩ mA A mV/˚C V mA Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction temperature can be ignored. Note 2) When not specified, VI=10V, IO=100mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C s Electrical Characteristics (Ta=25˚C) · AN7809R (1A, 9V Type) Parameter Output voltage Output voltage tolerance Line regulation Load regulation Bias current Symbol VO VO REGIN REGL Ibias ∆Ibias (IN) ∆Ibias (L) Vno RR VDIF (min.) ZO IO (Short) IO (Peak) ∆VO/Ta VO (Reset) II (Reset) Condition Tj=25˚C VI=12 to 24V, IO=5mA to 1A, Tj=0 to 125˚C, PD < 15W = VI=11.5 to 26V, Tj=25˚C VI=12 to 18V, Tj=25˚C IO=5mA to 1.5A, Tj=25˚C IO=250 to 750mA, Tj=25˚C Tj=25˚C VI=11.5 to 26V, Tj=25˚C IO=5mA to 1A, Tj=25˚C f=10Hz to 100kHz VI=12 to 22V, IO=100mA, f=120Hz IO=1A, Tj=25˚C f=1kHz VI=26V, Tj=25˚C Tj=25˚C IO=5mA, Tj=0 to 125˚C Tj=25˚C, II (Reset)=1mA Tj=25˚C min 8.65 8.55 typ 9 max 9.35 9.45 7 2 180 90 180 90 8 1 0.5 Unit V V mV mV mV mV mA mA mA µV dB V mΩ mA A mV/˚C 12 4 3.9 Input bias current fluctuation Load bias current fluctuation Output noise voltage Ripple rejection ratio Minimum input/output voltage difference Output impedance Output short circuit current Peak output current Output voltage temperature coefficient Output voltage at reset Reset input current 57 56 2 16 700 2 – 0.5 1 1 V mA Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction temperature can be ignored. Note 2) When not specified, VI=15V, IO=100mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C · AN7812R (1A, 12V Type) Parameter Output voltage Output voltage tolerance Line regulation Load regulation Bias current Input bias current fluctuation Load bias current fluctuation Output noise voltage Ripple rejection ratio Minimum input/output voltage difference Output impedance Output short circuit current Peak output current Output voltage temperature coefficient Output voltage at reset Reset input current Symbol VO VO REGIN REGL Ibias ∆Ibias (IN) ∆Ibias (L) Vno RR VDIF (min.) ZO IO (Short) IO (Peak) ∆VO/Ta VO (Reset) II (Reset) Condition Tj=25˚C VI=15 to 27V, IO=5mA to 1A, Tj=0 to 125˚C, PD < 15W = VI=14.5 to 30V, Tj=25˚C VI=16 to 22V, Tj=25˚C IO=5mA to 1.5A, Tj=25˚C IO=250 to 750mA, Tj=25˚C Tj=25˚C VI=14.5 to 30V, Tj=25˚C IO=5mA to 1A, Tj=25˚C f=10Hz to 100kHz VI=15 to 25V, IO=100mA, f=120Hz IO=1A, Tj=25˚C f=1kHz VI=35V, Tj=25˚C Tj=25˚C IO=5mA, Tj=0 to 125˚C Tj=25˚C, II (Reset)=1mA Tj=25˚C 55 2 18 700 2 – 0.8 1 1 75 min 11.5 11.4 10 3 12 4 4 typ 12 max 12.5 12.6 240 120 240 120 8 1 0.5 Unit V V mV mV mV mV mA mA mA µV dB V mΩ mA A mV/˚C V mA Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction temperature can be ignored. Note 2) When not specified, VI=19V, IO=100mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C s Electrical Characteristics (Ta=25˚C) AN78M00R Series · AN78M05R (500mA, 5V Type) Parameter Output voltage Output voltage tolerance Line regulation Load regulation Bias current Input bias current fluctuation Load bias current fluctuation Output noise voltage Ripple rejection ratio Minimum input/output voltage difference Output short circuit current Peak output current Output voltage temperature coefficient Output voltage at reset Reset input current Symbol VO VO REGIN REGL Ibias ∆Ibias (IN) ∆Ibias (L) Vno RR VDIF (min.) IO (Short) IO (Peak) ∆VO/Ta VO (Reset) II (Reset) Condition Tj=25˚C VI=7.5 to 20V, IO=5 to 350mA, Tj=0 to 125˚C, PD < 15W = VI=7.5 to 25V, Tj=25˚C VI=8 to 25V, Tj=25˚C IO=5 to 500mA, Tj=25˚C IO=5 to 200mA, Tj=25˚C Tj=25˚C VI=8 to 25V, Tj=25˚C IO=5 to 350mA, Tj=25˚C f=10Hz to 100kHz VI=8 to 18V, IO=100mA, f=120Hz IO=500mA, Tj=25˚C VI=35V, Tj=25˚C Tj=25˚C IO=5mA, Tj=0 to 125˚C Tj=25˚C, II (Reset)=1mA Tj=25˚C 62 2 300 700 – 0.5 1 1 40 min 4.8 4.75 3 1 20 10 4.6 typ 5 max 5.2 5.25 100 50 100 50 6 0.8 0.5 Unit V V mV mV mV mV mA mA mA µV dB V mA mA mV/˚C V mA Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction temperature can be ignored. Note 2) When not specified, VI=10V, IO=350mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C · AN78M08R (500mA, 8V Type) Parameter Output voltage Output voltage tolerance Line regulation Load regulation Bias current Input bias current fluctuation Load bias current fluctuation Output noise voltage Ripple rejection ratio Minimum input/output voltage difference Output short circuit current Peak output current Output voltage temperature coefficient Output voltage at reset Reset input current Symbol VO VO REGIN REGL Ibias ∆Ibias (IN) ∆Ibias (L) Vno RR VDIF (min.) IO (Short) IO (Peak) ∆VO/Ta VO (Reset) II (Reset) Condition Tj=25˚C VI=10.5 to 23V, IO=5 to 350mA, Tj=0 to 125˚C, PD < 15W = VI=10.5 to 25V, Tj=25˚C VI=11 to 25V, Tj=25˚C IO=5 to 500mA, Tj=25˚C IO=5 to 200mA, Tj=25˚C Tj=25˚C VI=10.5 to 25V, Tj=25˚C IO=5 to 350mA, Tj=25˚C f=10Hz to 100kHz VI=11.5 to 21.5V, IO=100mA, f=120Hz IO=500mA, Tj=25˚C VI=35V, Tj=25˚C Tj=25˚C IO=5mA, Tj=0 to 125˚C Tj=25˚C, II (Reset)=1mA Tj=25˚C 56 2 300 0.7 – 0.5 1 1 52 min 7.7 7.6 6 2 25 10 4.1 typ 8 max 8.3 8.4 100 50 160 80 6 0.8 0.5 Unit V V mV mV mV mV mA mA mA µV dB V mA A mV/˚C V mA Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction temperature can be ignored. Note 2) When not specified, VI=14V, IO=350mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C s Electrical Characteristics (Ta=25˚C) · AN78M09R (500mA, 9V Type) Parameter Output voltage Output voltage tolerance Line regulation Load regulation Bias current Input bias current fluctuation Load bias current fluctuation Output noise voltage Ripple rejection ratio Symbol VO VO REGIN REGL Ibias ∆Ibias (IN) ∆Ibias (L) Vno RR VDIF (min.) IO (Short) IO (Peak) ∆VO/Ta VO (Reset) II (Reset) Condition Tj=25˚C VI=11.5 to 24V, IO=5 to 350mA, Tj=0 to 125˚C, PD < 15W = VI=11.5 to 25V, Tj=25˚C VI=12 to 25V, Tj=25˚C IO=5 to 500mA, Tj=25˚C IO=5 to 200mA, Tj=25˚C Tj=25˚C VI=12 to 25V, Tj=25˚C IO=5 to 350mA, Tj=25˚C f=10Hz to 100kHz VI=12 to 22V, IO=100mA, f=120Hz IO=500mA, Tj=25˚C VI=35V, Tj=25˚C Tj=25˚C IO=5mA, Tj=0 to 125˚C Tj=25˚C, II (Reset)=1mA Tj=25˚C min 8.65 8.55 typ 9 max 9.35 9.45 7 2 100 50 180 90 6.0 0.8 0.5 Unit V V mV mV mV mV mA mA mA µV dB V mA A mV/˚C 25 10 4.1 60 56 2 300 0.7 – 0.5 1 1 Minimum input/output voltage difference Output short circuit current Peak output current Output voltage temperature coefficient Output voltage at reset Reset input current V mA Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction temperature can be ignored. Note 2) When not specified, VI=15V, IO=350mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C · AN78M12R (500mA, 12V Type) Parameter Output voltage Output voltage tolerance Line regulation Load regulation Bias current Input bias current fluctuation Load bias current fluctuation Output noise voltage Ripple rejection ratio Minimum input/output voltage difference Output short circuit current Peak output current Output voltage remperature coefficient Output voltage at reset Reset input current Symbol VO VO REGIN REGL Ibias ∆Ibias (IN) ∆Ibias (L) Vno RR VDIF (min.) IO (Short) IO (Peak) ∆VO/Ta VO (Reset) II (Reset) Condition Tj=25˚C VI=14.5 to 27V, IO=5 to 350mA, Tj=0 to 125˚C, PD < 15W = VI=14.5 to 30V, Tj=25˚C VI=16 to 30V, Tj=25˚C IO=5 to 500mA, Tj=25˚C IO=5 to 200mA, Tj=25˚C Tj=25˚C VI=14.5 to 30V, Tj=25˚C IO=5 to 350mA, Tj=25˚C f=10Hz to 100kHz VI=15 to 25V, IO=100mA, f=120Hz IO=500mA, Tj=25˚C VI=35V, Tj=25˚C Tj=25˚C, VI=35V IO=5mA, Tj=0 to 125˚C Tj=25˚C, II (Reset)=1mA Tj=25˚C 55 2 300 700 – 0.5 1 1 75 min 11.5 11.4 8 2 25 10 4.3 typ 12 max 12.5 12.6 100 50 240 120 6 0.8 0.5 Unit V V mV mV mV mV mA mA mA µV dB V mA mA mV/˚C V mA Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction temperature can be ignored. Note 2) When not specified, VI=19V, IO=350mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C s Characteristic Curve PD –Ta 16 14 1000 VO (Reset) – IO Output Voltage at Reset VO (Reset) (mV) CI=0.33µF CO=0.1µF Tj=25˚C VI=20V 1.0 II (Reset) – Tj Power Dissipation PD (W) 12 10 8 6 (3) 4 (4) 2 0 (1) 600 VI=10V 400 VI=30V 200 Reset Current II (Reset) (mA) (1) Infinite Heat Sink (2) 5˚C/W Heat Sink (3) 15˚C/W Heat Sink (4) Without Heat Sink 800 0.8 0.6 (2) 0.4 0.2 VI=7V 0 40 80 120 160 0 0.1 1 10 100 1000 0 –40 0 40 80 120 160 Ambient Temperature Ta (˚C) Output Current IO (mA) Junction Temperature Tj (˚C) s Basic Regulator Circuit Input 1 3 Output * For TTL, an open collector type inverter, buffer, gate etc. can be used. Beware of the breakdown of TTL, as the reset pin bears voltage higher than the output voltage VO by 1—2V. CI is set when the input line is long. CO improves the temperature response. AN7800R AN78M00R CI 4 2 * 7406etc. CO Reset s Application Circuit (1) Soft Start Circuit Input 1 3 Output (2) Several Output Reset Circuits Input 1 3 Output AN7800R AN78M00R 0.33µF 4 2 1kΩ C 0.1µF 0.33µF AN7800R AN78M00R 2 4 1kΩ R Q 0.1µF U Control of Output Voltage Rise Time Output Voltage Rise Time tr (s) Input 1 10 1 0.1 3 AN7800R AN78M00R 0.33µF 2 4 SW 1kΩ R 0.1µF 1 10 100 Capacity C (µF)