0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
AN8025

AN8025

  • 厂商:

    PANASONIC

  • 封装:

  • 描述:

    AN8025 - 3-pin Positive Output Low Dropout Voltage Regulator 50mA Type - Panasonic Semiconductor

  • 详情介绍
  • 数据手册
  • 价格&库存
AN8025 数据手册
AN8000/AN8000M Series 3-pin Positive Output Low Dropout Voltage Regulator (50mA Type) s Overview The AN8000 series is 3-pin low-dropout fixed positive output monolithic voltage regulators. Since thier power consumption can be minimized, they are suitable for battery stabilizing power supply and reference voltage. Thirteen types of output voltage are available ; 2V, 2.5V, 3V, 3.5V (TO-92 only) , 4V, 4.5V, 5V, 6V, 7V, 8V, 8.5V, 9V, and 10V. 2.54 AN8000 Series Unit:mm 4.0±0.2 5.1±0.2 0.45 – 0.1 + 0.2 5.0±0.2 13.5±0.5 2.3±0.2 1 : Input 2 : Output 3 : GND s Features 231 • Input/output voltage difference : 0.3V (max.) • Output current of up to 50mA • Low bias current ; 0.6mA (typ.) • Output voltage ; 2V, 2.5V, 3V, 3.5V (TO-92 only) , 4V, 4.5V, 5V, 6V, 7V, 8V, 8.5V, 9V, and 10V. • Over-voltage protective circuit built-in. (Bottom View) TO-92 Plastic Package (SSIP003-P-0000) AN8000M Series 4.6max. 1.8max. Unit:mm 1.6max. 0.48max. 1.5 3.0 0.8min. 4.25max. 0.44max. 1 : Output 2 : GND 3 : Input 0.58max. 1 2 3 3-pin Mini Power type Plastic Package (TO-243) (HSIP003-P-0000B) s Block Diagram Starter Voltage Reference + Error Amp. – Current Limiter R2 R1 : TO-92 : TO-243 R1=5kΩ CIN=0.33µF COUT=10µF 1 3 VI 2 3 – + 1 2 VO COUT 2.6max. 2.6 45˚ s Absolute Maximum Ratings (Ta=25˚C) Parameter Supply voltage Supply current Power dissipation Operating ambient temperature Storage temperature AN8000 Series AN8000M Series Symbol VI ICC PD Topr Tstg Rating 20 100 650 * –30 to+80 –55 to+150 –55 to+125 Unit V mA mW ˚C ˚C * Mounting onto the PCB (20 × 20 × 1.7mm glass epoxy copper foil 1 cm2 or more), for AN8000M Series. s Electrical Characteristics (Ta=25˚C) · AN8002/AN8002M (2V Type) Parameter Output voltage Line regulation Load regulation Symbol VO REGIN REGL VDIF (min.) Ibias RR Vno ∆VO/Ta Tj=25˚C Condition VI=2.5 to 8V, Tj=25˚C IO=1 to 40mA, Tj=25˚C IO=1 to 50mA, Tj=25˚C VI=1.9V, IO=20mA, Tj=25˚C VI=1.9V, IO=50mA, Tj=25˚C IO=0mA, Tj=25˚C VI=3 to 5V, f=120Hz f=10Hz to 100kHz Tj=–30 to+125˚C min 1.92 typ 2 2 7 10 0.06 0.12 0.6 max 2.08 40 20 25 0.2 0.3 1 Unit V mV mV mV V V mA dB µV mV/˚C Minimum I/O voltage difference Bias current Ripple rejection ratio Output noise voltage Output voltage temperature coefficient 62 74 60 0.1 Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that the drift in characteristic value due to a temperature rise at chip junction can be ignored. Note2) Unless otherwise specified, VI=3V, IO=20mA, CO=10µF · AN8025/AN8025M (2.5V Type) Parameter Output voltage Line regulation Load regulation Minimum I/O voltage difference Bias current Ripple rejection ratio Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL VDIF (min.) Ibias RR Vno ∆VO/Ta Tj=25˚C VI=3 to 8.5V, Tj=25˚C IO=1 to 40mA, Tj=25˚C IO=1 to 50mA, Tj=25˚C VI=2.4V, IO=20mA, Tj=25˚C VI=2.4V, IO=50mA, Tj=25˚C IO=0mA, Tj=25˚C VI=3.5 to 5.5V, f=120Hz f=10Hz to 100kHz Tj=–30 to+125˚C 60 Condition min 2.4 typ 2.5 2.5 8 12.5 0.07 0.12 0.6 72 65 0.13 max 2.6 50 20 25 0.2 0.3 1 Unit V mV mV mV V V mA dB µV mV/˚C Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that the drift in characteristic value due to a temperature rise at chip junction can be ignored. Note2) Unless otherwise specified, VI=3.5V, IO=20mA, CO=10µF s Electrical Characteristics (Ta=25˚C) · AN8003/AN8003M (3V Type) Parameter Output voltage Line regulation Load regulation Symbol VO REGIN REGL VDIF (min.) Ibias RR Vno ∆VO/Ta Tj=25˚C Condition VI=3.5 to 9V, Tj=25˚C IO=1 to 40mA, Tj=25˚C IO=1 to 50mA, Tj=25˚C VI=2.9V, IO=20mA, Tj=25˚C VI=2.9V, IO=50mA, Tj=25˚C IO=0mA, Tj=25˚C VI=4 to 6V, f=120Hz f=10Hz to 100kHz Tj=–30 to+125˚C min 2.88 typ 3 3 9 15 0.07 0.12 0.6 max 3.12 50 25 30 0.2 0.3 1 Unit V mV mV mV V V mA dB µV mV/˚C Minimum I/O voltage difference Bias current Ripple rejection ratio Output noise voltage Output voltage temperature coefficient 58 70 70 0.15 Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that the drift in characteristic value due to a temperature rise at chip junction can be ignored. Note2) Unless otherwise specified, VI=4V, IO=20mA, CO=10µF · AN8035/AN8035M (3.5V Type) Parameter Output voltage Line regulation Load regulation Minimum I/O voltage difference Bias current Ripple rejection ratio Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL VDIF (min.) Ibias RR Vno ∆VO/Ta Tj=25˚C VI=4 to 9.5V, Tj=25˚C IO=1 to 40mA, Tj=25˚C IO=1 to 50mA, Tj=25˚C VI=3.4V, IO=20mA, Tj=25˚C VI=3.4V, IO=50mA, Tj=25˚C IO=0mA, Tj=25˚C VI=4.5 to 6.5V, f=120Hz f=10Hz to 100kHz Tj=–30 to+125˚C 57 Condition min 3.36 typ 3.5 3.5 10 20 0.07 0.12 0.6 69 75 0.2 max 3.64 50 30 40 0.2 0.3 1 Unit V mV mV mV V V mA dB µV mV/˚C Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that the drift in characteristic value due to a temperature rise at chip junction can be ignored. Note2) Unless otherwise specified, VI=4.5V, IO=20mA, CO=10µF · AN8004/AN8004M (4V Type) Parameter Output voltage Line regulation Load regulation Minimum I/O voltage difference Bias current Ripple rejection ratio Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL VDIF (min.) Ibias RR Vno ∆VO/Ta Tj=25˚C VI=4.5 to 10V, Tj=25˚C IO=1 to 40mA, Tj=25˚C IO=1 to 50mA, Tj=25˚C VI=3.8V, IO=20mA, Tj=25˚C VI=3.8V, IO=50mA, Tj=25˚C IO=0mA, Tj=25˚C VI=5 to 7V, f=120Hz f=10Hz to 100kHz Tj=–30 to+125˚C 56 Condition min 3.84 typ 4 3.5 10 20 0.07 0.12 0.6 67 80 0.2 max 4.16 50 30 40 0.2 0.3 1 Unit V mV mV mV V V mA dB µV mV/˚C Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that the drift in characteristic value due to a temperature rise at chip junction can be ignored. Note2) Unless otherwise specified, VI=5V, IO=20mA, CO=10µF s Electrical Characteristics (Ta=25˚C) · AN8045/AN8045M (4.5V Type) Parameter Output voltage Line regulation Load regulation Symbol VO REGIN REGL VDIF (min.) Ibias RR Vno ∆VO/Ta Tj=25˚C Condition VI=5 to 10.5V, Tj=25˚C IO=1 to 40mA, Tj=25˚C IO=1 to 50mA, Tj=25˚C VI=4.3V, IO=20mA, Tj=25˚C VI=4.3V, IO=50mA, Tj=25˚C IO=0mA, Tj=25˚C VI=5.5 to 7.5V, f=120Hz f=10Hz to 100kHz Tj=–30 to+125˚C min 4.32 typ 4.5 4 11 23 0.07 0.12 0.7 max 4.68 50 35 45 0.2 0.3 1 Unit V mV mV mV V V mA dB µV mV/˚C Minimum I/O voltage difference Bias current Ripple rejection ratio Output noise voltage Output voltage temperature coefficient 54 66 85 0.23 Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that the drift in characteristic value due to a temperature rise at chip junction can be ignored. Note2) Unless otherwise specified, VI=5.5V, IO=20mA, CO=10µF · AN8005/AN8005M (5V Type) Parameter Output voltage Line regulation Load regulation Minimum I/O voltage difference Bias current Ripple rejection ratio Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL VDIF (min.) Ibias RR Vno ∆VO/Ta Tj=25˚C VI=5.5 to 11V, Tj=25˚C IO=1 to 40mA, Tj=25˚C IO=1 to 50mA, Tj=25˚C VI=4.8V, IO=20mA, Tj=25˚C VI=4.8V, IO=50mA, Tj=25˚C IO=0mA, Tj=25˚C VI=6 to 8V, f=120Hz f=10Hz to 100kHz Tj=–30 to+125˚C 52 Condition min 4.8 typ 5 4.5 12 25 0.07 0.12 0.7 64 95 0.25 max 5.2 50 40 50 0.2 0.3 1 Unit V mV mV mV V V mA dB µV mV/˚C Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that the drift in characteristic value due to a temperature rise at chip junction can be ignored. Note2) Unless otherwise specified, VI=6V, IO=20mA, CO=10µF · AN8006/AN8006M (6V Type) Parameter Output voltage Line regulation Load regulation Minimum I/O voltage difference Bias current Ripple rejection ratio Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL VDIF (min.) Ibias RR Vno ∆VO/Ta Tj=25˚C VI=6.5 to 12V, Tj=25˚C IO=1 to 40mA, Tj=25˚C IO=1 to 50mA, Tj=25˚C VI=5.8V, IO=20mA, Tj=25˚C VI=5.8V, IO=50mA, Tj=25˚C IO=0mA, Tj=25˚C VI=7 to 9V, f=120Hz f=10Hz to 100kHz Tj=–30 to+125˚C 51 Condition min 5.76 typ 6 5.5 13 28 0.07 0.13 0.7 63 105 0.3 max 6.24 60 45 55 0.2 0.3 1.2 Unit V mV mV mV V V mA dB µV mV/˚C Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that the drift in characteristic value due to a temperature rise at chip junction can be ignored. Note2) Unless otherwise specified, VI=7V, IO=20mA, CO=10µF s Electrical Characteristics (Ta=25˚C) · AN8007/AN8007M (7V Type) Parameter Output voltage Line regulation Load regulation Symbol VO REGIN REGL VDIF (min.) Ibias RR Vno ∆VO/Ta Tj=25˚C Condition VI=7.5 to 13V, Tj=25˚C IO=1 to 40mA, Tj=25˚C IO=1 to 50mA, Tj=25˚C VI=6.8V, IO=20mA, Tj=25˚C VI=6.8V, IO=50mA, Tj=25˚C IO=0mA, Tj=25˚C VI=8 to 10V, f=120Hz f=10Hz to 100kHz Tj=–30 to+125˚C min 6.72 typ 7 6.5 14 31 0.07 0.13 0.7 max 7.28 70 50 60 0.2 0.3 1.3 Unit V mV mV mV V V mA dB µV mV/˚C Minimum I/O voltage difference Bias current Ripple rejection ratio Output noise voltage Output voltage temperature coefficient 50 62 120 0.35 Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that the drift in characteristic value due to a temperature rise at chip junction can be ignored. Note2) Unless otherwise specified, VI=8V, IO=20mA, CO=10µF · AN8008/AN8008M (8V Type) Parameter Output voltage Line regulation Load regulation Minimum I/O voltage difference Bias current Ripple rejection ratio Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL VDIF (min.) Ibias RR Vno ∆VO/Ta Tj=25˚C VI=8.5 to 14V, Tj=25˚C IO=1 to 40mA, Tj=25˚C IO=1 to 50mA, Tj=25˚C VI=7.8V, IO=20mA, Tj=25˚C VI=7.8V, IO=50mA, Tj=25˚C IO=0mA, Tj=25˚C VI=9 to 11V, f=120Hz f=10Hz to 100kHz Tj=–30 to+125˚C 49 Condition min 7.68 typ 8 7.5 15 34 0.07 0.14 0.7 61 135 0.4 max 8.32 80 55 65 0.2 0.3 1.3 Unit V mV mV mV V V mA dB µV mV/˚C Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that the drift in characteristic value due to a temperature rise at chip junction can be ignored. Note2) Unless otherwise specified, VI=9V, IO=20mA, CO=10µF · AN8085/AN8085M (8.5V Type) Parameter Output voltage Line regulation Load regulation Minimum I/O voltage difference Bias current Ripple rejection ratio Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL VDIF (min.) Ibias RR Vno ∆VO/Ta Tj=25˚C VI=9 to 14.5V, Tj=25˚C IO=1 to 40mA, Tj=25˚C IO=1 to 50mA, Tj=25˚C VI=8.3V, IO=20mA, Tj=25˚C VI=8.3V, IO=50mA, Tj=25˚C IO=0mA, Tj=25˚C VI=9.5 to 11.5V, f=120Hz f=10Hz to 100kHz Tj=–30 to+125˚C 48 Condition min 8.16 typ 8.50 8.3 16 36 0.07 0.14 0.8 60 140 0.43 max 8.84 90 60 70 0.2 0.3 1.4 Unit V mV mV mV V V mA dB µV mV/˚C Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that the drift in characteristic value due to a temperature rise at chip junction can be ignored. Note2) Unless otherwise specified, VI=9.5V, IO=20mA, CO=10µF s Electrical Characteristics (Ta=25˚C) · AN8009/AN8009M (9V Type) Parameter Output voltage Line regulation Load regulation Symbol VO REGIN REGL VDIF (min.) Ibias RR Vno ∆VO/Ta Tj=25˚C Condition VI=9.5 to 15V, Tj=25˚C IO=1 to 40mA, Tj=25˚C IO=1 to 50mA, Tj=25˚C VI=8.8V, IO=20mA, Tj=25˚C VI=8.8V, IO=50mA, Tj=25˚C IO=0mA, Tj=25˚C VI=10 to 12V, f=120Hz f=10Hz to 100kHz Tj=–30 to+125˚C min 8.64 typ 9 9 17 37 0.07 0.14 0.8 max 9.36 100 70 75 0.2 0.3 1.4 Unit V mV mV mV V V mA dB µV mV/˚C Minimum I/O voltage difference Bias current Ripple rejection ratio Output noise voltage Output voltage temperature coefficient 47 59 150 0.45 Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that the drift in characteristic value due to a temperature rise at chip junction can be ignored. Note2) Unless otherwise specified, VI=10V, IO=20mA, CO=10µF · AN8010/AN8010M (10V Type) Parameter Output voltage Line regulation Load regulation Minimum I/O voltage difference Bias current Ripple rejection ratio Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL VDIF (min.) Ibias RR Vno ∆VO/Ta Tj=25˚C VI=10.5 to 16V, Tj=25˚C IO=1 to 40mA, Tj=25˚C IO=1 to 50mA, Tj=25˚C VI=9.8V, IO=20mA, Tj=25˚C VI=9.8V, IO=50mA, Tj=25˚C IO=0mA, Tj=25˚C VI=11 to 13V, f=120Hz f=10Hz to 100kHz Tj=–30 to+125˚C 46 Condition min 9.6 typ 10 10 18 40 0.07 0.14 0.8 58 165 0.5 max 10.4 100 75 85 0.2 0.3 1.4 Unit V mV mV mV V V mA dB µV mV/˚C Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that the drift in characteristic value due to a temperature rise at chip junction can be ignored. Note2) Unless otherwise specified, VI=11V, IO=20mA, CO=10µF s Application Circuit Vin Vout AN8000 AN8000M 0.33µF + – 10µF The AN8000/AN8000M series has IC internal gain increased in order to improve performance. When the power line on the output side is long, use a capacitor of 10µF. For the capacitor on the output side, attach it as close to the IC as possible. When using at a low temperature, it is recommended to use the capacitors with low internal impedance (for example, tantalum capacitor) for output capacitors. s Characteristic Curve PD –Ta (AN8000 Series) 800 800 PD –Ta (AN8000M Series) Power Dissipation PD (mW) 700 600 500 400 300 200 100 0 0 20 40 60 80 100 120 140 160 Power Dissipation PD (mW) 700 600 500 400 300 200 100 0 0 20 40 60 80 100 120 140 160 ( Mounting onto PCB 20 × 20 × 7mm Glass Epoxy PCB, Copper foil 1cm2 or more ) Ambient Temperature Ta (˚C) Ambient Temperature Ta (˚C) RR– f Ripple Rejection Ratio RR (dB) 80 70 60 50 40 30 0 50 100 300 500 1k 3k 5k 10k 30k 50k 100k 0 5 AN8005 12 VO –VI Output Voltage VO (V) 10 8 6 4 2 AN8002/M CO=10µF IO=0mA AN8010/M AN8005/M 10 15 20 Frequency f (Hz) Input Voltage VI (V) VO – IO 5.3 5.3 VO –Ta Output Voltage VO (V) AN8005 VI=6V CO=10µF 5.2 5.1 5.0 4.9 4.8 4.7 –40 AN8005 VI=6V CO=10µF IO=0mA Output Voltage VO (V) 5.2 5.1 5.0 4.9 4.8 4.7 0 10 20 30 40 50 60 70 80 90 100 –20 0 20 40 60 80 100 120 140 160 Output Current VO (mA) Ambient Temperature Ta (˚C)
AN8025
### 物料型号 - AN8000系列:3端子正输出低dropout电压调节器,提供13种输出电压。 - AN8000M系列:3端子Mini Power型塑料封装(TO-243)。

### 器件简介 - AN8000系列是3端子低dropout固定正输出电压调节器,适合电池稳定电源和参考电压使用,最大输出电流为50mA。

### 引脚分配 - TO-92封装:1. 输入(Input),2. 输出(Output),3. 地(GND)。 - TO-243封装:与TO-92封装相同。

### 参数特性 - 输入/输出电压差:最大0.3V。 - 输出电流:高达50mA。 - 偏置电流:典型值0.6mA。 - 过电压保护电路:内置。

### 功能详解 - 提供了不同输出电压版本的详细电气特性,包括最小I/O电压差、偏置电流、纹波抑制比、输出电压、线路调节、负载调节等。

### 应用信息 - 在输出侧的电源线上,如果线较长,建议使用10μF的电容。 - 对于输出侧的电容,应尽可能靠近IC安装。 - 在低温下使用时,推荐使用内阻较低的电容器(例如钽电容)作为输出电容器。

### 封装信息 - 提供了TO-92和TO-243两种封装类型的详细信息和尺寸图。
AN8025 价格&库存

很抱歉,暂时无法提供与“AN8025”相匹配的价格&库存,您可以联系我们找货

免费人工找货