MN102H75K

MN102H75K Type Internal ROM type ROM (byte) RAM (byte) Package (Lead-free) Minimum Instruction Execution Time MN102H75K Mask ROM 256K 8K QFP084-P-1818E 83 ns (at 3.0 V to 3.6 V, 12 MHz) MN102HF75K FLASH  Interrupts External (6 lines) Internal (30 lines) : Timer × 11, A/D × 1, Undefined command × 1, RESET × 1, OSD × 2, Serial × 4, I²C × 1, Caption × 4, Remote control × 1, Address coincidence × 4 8-bit timer × 4 16-bit timer × 2 Watchdog timer : 17-bit × 1  Timer Counter  Serial interface I²C × 1 : for multimaster mode, bus line (output) has 2 systems Sync serial / I²C (master) / UART × 2  Caption / Teletext Decoder Built-in sync separator × 2  I/O Pins I/O 66 Common use  A/D converter  D/A converter  PWM 8-bit × 12-ch. (with S/H) 4-bit × 4-ch. (analog R, G, B, YM output) 8-bit × 7-ch. Remote control reception 3-layer display (graphics, characters, splits) Remote control input discriminant circuit built-in  Special Ports  CRTC  Notes MAE00015FEM MN102H75K  Electrical Charactreistics (D/A converter characteristics) Parameter D/A full-scale output current D/A output voltage setting range D/A non-linear error D/A differential non-linear error D/A channel interval error Symbol IFS VO NLE DNLE IFS RL = 200 Ω, VREF = 1.2 V, RIREF = 1.2 kΩ Condition Limit min 4.5 0.9 typ 5.0 max 5.5 1.1 ±0.5 ±0.5 Unit mA V LSB LSB VREF = 1.2 V, RIREF = 1.2 kΩ, Error from 4-channel % ±5 average IFS (Ta = 25°C , VDD = AVDD = 3.3 V , VSS = 0 V , fosc = 4 MHz)  Development tools In-circuit Emulator PX-ICE102H75-QFP084-P-1818E  Pin Assignment NC P71 P10, ADIN5, IRQ1 P11, ADIN6, IRQ2 P12, ADIN7, IRQ3 P72 P13, ADIN8, MDOUT P14, ADIN9, STOP P73 P15, ADIN10, PWM0 P16, ADIN11, PWM1 P17, PWM2 P20, PWM3 P21, PWM4 P22, PWM5 P23, PWM6 P24, TM4IC, SBT1 P25, TM4IOB, SBI1, SBD1 P26, TM4IOA, SBO1 P27, TMO1O P74 P70 P07, ADIN4 P06, ADIN3 P05, ADIN2 P04, ADIN1 P03, ADIN0 P02, SCL1 *1 P01, SDA1 *1 P00, RMIN, IRQ0 P87 VSS OSC2 OSC1 VDD P61, SCL0 *1 P86 P60, SDA0 *1 P57, SBT0 P56, SBI0, SBD0 NC P85 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 MN102H75K MAE00015FEM P55, SB00 P54, IRQ5, /VSYNC P84 NC P53, /RST P52, IRQ4 /TEST P51, YS P83 P50, SYSCLK P82 P47, /HSYNC P81 P46, OSDXI P45, OSDXO P44, TM5IC *1 P43, TM5IOB *1 1 P42, TM5IOA * 1 P41, TM1IO * VCOI PDO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 P75 VDD(VPP) *2 P30, CLH VREFHS P31, CVBSO VSS NC P32, CVBS1 VREFLS P33, CLL AVDD COMP IREF P76 VREF, P34 P35, DAROUT, R P36, DAGOUT, G P77 P37, DABOUT, B P40, DAYMOUT, YM P80 QFP084-P-1818E Note) *1: 5 V dielectric N-ch. open drain output pin *2: MN102H75K (VDD), MN102HF75K (VPP) Request for your special attention and precautions in using the technical information and semiconductors described in this book (1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. 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