MN102L59D

MN102L59D Type Internal ROM type ROM (byte) RAM (byte) Package (Lead-free) Minimum Instruction Execution Time LQFP064-P-1414 MN102L59D Mask ROM 64K 2K LQFP064-P-1414 (ES (Engineering Sample) available) [With main clock operated] 100 ns (at 4.5 V to 5.5 V, 5 MHz externally, multiplied by 4 internally) MN102LF59D FLASH  Interrupts RESET, Watchdog, Timer counter 0 to 11, External 0 to 5, Serial ch.0 tra nsfer finish, Serial ch.1 tra nsfer finish, /NMI pin, A/D conversion finish Timer counter 0 : 8-bit × 1 (timer output, event count) Clock source................ 1/1, 1/64, 1/128 of system clock frequency; external clock Interrupt source ........... underflow of timer counter 0 Timer counter 1 : 8-bit × 1 (timer output, event count, A/D conversion start up) Clock source................ 1/1, 1/64 of system clock frequency; external clock; timer counter 0 output Interrupt source ........... underflow of timer counter 1 Timer counter 2 : 8-bit × 1 (timer output, event count) Clock source................ system clock; external clock; timer counter 0, 1 output Interrupt source ........... underflow of timer counter 2 Timer counter 3 : 8-bit × 1 (interval timer, UART baud rate generator) Clock source................ 1/1, 1/2, 1/64 of system clock frequency; timer counter 0 output Interrupt source ........... underflow of timer counter 3 Timer counter 4 : 8-bit × 1 (interval timer) Clock source................ 1/1, 1/64, 1/128 of system clock frequency; timer counter 0 output Interrupt source ........... underflow of timer counter 4 Timer counter 5 : 8-bit × 1 (interval timer) Clock source................ 1/1, 1/64 of system clock frequency; timer counter 0, 4 output Interrupt source ........... underflow of timer counter 5 Timer counter 6 : 16-bit × 1 (timer output, event count) Clock source................ 1/1, 1/128 of system clock frequency; external clock; timer counter 0 output Interrupt source ........... underflow of timer counter 6 Timer counter 7 : 16-bit × 1 (timer output, event count) Clock source................ 1/1, 1/128 of system clock frequency; external clock; timer counter 0 output Interrupt source ........... underflow of timer counter 7 Timer counter 8 : 8-bit × 1 (timer output, event count, simple PWM output) Clock source................ 1/2, 1/8 of system clock frequency; external clock; timer counter 0 output Interrupt source ........... underflow of timer counter 8 Timer counter 9 : 8-bit × 1 (timer output, event count, simple PWM output) Clock source................ 1/2, 1/8 of system clock frequency; external clock; timer counter 0 output Interrupt source ........... underflow of timer counter 9 Timer counter 10 : 8-bit × 1 (timer output, simple inverter control [simple 6-phase PWM output]) Clock source................ high-speed clock (after multiplication); 1/1, 1/2, 1/8 of system clock frequency Interrupt source ........... overflow of timer counter 10 Timer counter 11 : 16-bit updown counter × 1 (highly functional inverter control [simple 6-phase PWM output], A/D conversion start) Clock source................ high-speed clock (after multiplication); 1/1 of system clock frequency Interrupt source ........... overflow of timer counter 11; underflow of timer counter 11 Connectable timer counter 0, 1, 2 timer counter 0, 4, 5 MAE00001GEM  Timer Counter MN102L59D  Serial interface Serial 0, 1 : 1 to 8-bit × 1 (common use with half-duplex UART, transfer direction of MSB/LSB selectable) Clock source................ 1/2, 1/4, 1/16 of system clock, 1/2 of timer counter 3, external clock Half-duplex UART × 2 (common use with serial 0, 1)  I/O Pins I/O 52 Common use : 52 (by bit)  A/D converter  PWM 10-bit × 12-ch. (with S/H) : 4 channels for common use 16-bit × 2-ch. (commen use with timer counter 6,7) simple 6-phase PWM output 8-bit × 1-ch.(common use with timer counter 10) 6-phase PWM output 16-bit × 1ch. (timer counter 11) 6-phase PWM output support  Notes  Electrical Charactreistics (Supply current) Parameter Operating supply current Supply current at STOP Supply current at HALT0 Symbol IDDopr IDDS IDDH Condition Limit min typ max Unit VI = VDD or VSS, output open 75 mA f = 5 MHz , VDD = 5.0 V Pin with pull-up resistor is open all other input pins and 50 µA Hi-Z state input/output pins are simultaneously applied VDD or VSS level 30 mA f = 5 MHz , VDD = 5.0 V, output open (Ta = –20°C to +85°C, VDD = 5.0V, VSS = 0V)  Development tools In-circuit Emulator PX-ICE102L00 + PX-PRB102L59-LQFP064-P-1414  Pin Assignment P25, /IRQ5 P24, /IRQ4 P23, /IRQ3 P22, /IRQ2 P21, /IRQ1 P20, /IRQ0 P16, TMIO6 P15, TMIO5 P14, TMIO4 P13, TMIO3 P12, TMIO2 P11, TMIO1 P10, TMIO0 P02, SBO0 P01, SBI0 P00, SBT0 P40, PWM0, TMIO0 P41, /PWM0, TMIO1 P42, PWM1, TMIO2 P43, /PWM1, TMIO6 P44, PWM2, TMIO7 P45, /PWM2, STOP P60, TPWM0, SBT0 P61, TPWM1, SBI0 P62, TPWM2, SBO0 P63, TPWM3, SBT1 P64, TPWM4, SBI1 P65, TPWM5, SBO1 VDD /NMI 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 MN102L59D Note) The MN102LF59D is manufactured and sold under license agreement with BULL CP8 Inc. Note that MN102LF59D cannot be used as the IC card. MAE00001GEM P70, BUZZ P71 P72 P73 P74 P75 P76 P77, WDOUT VSS /RST VSS SYSCLK VDD OSCI OSCO VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 P37, AN0 P36, AN1 P35, AN2 P34, AN3 P33, AN4 P32, AN5 P31, AN6 P30, AN7 P57, AN8 P56, AN9 P55, AN10 P54, AN11 P53 P52 P51 P50 LQFP064-P-1414 Request for your special attention and precautions in using the technical information and semiconductors described in this book (1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) The technical information described in this book is intended only to show the main characteristics and application circuit examples of the products, and no license is granted under any intellectual property right or other right owned by our company or any other company. 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