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2N7002W

2N7002W

  • 厂商:

    PANJIT(强茂)

  • 封装:

  • 描述:

    2N7002W - 60V N-Channel Enhancement Mode MOSFET - Pan Jit International Inc.

  • 详情介绍
  • 数据手册
  • 价格&库存
2N7002W 数据手册
2N7002W 60V N-Channel Enhancement Mode MOSFET FEATURES • RDS(ON), VGS@10V,IDS@500mA=5Ω • RDS(ON), VGS@4.5V,IDS@75mA=7.5Ω • Advanced Trench Process Technology • High Density Cell Design For Ultra Low On-Resistance • Specially Designed for Battery Operated Systems, Solid-State Relays Drivers : Relays, Displays, Lamps, Solenoids, Memories, etc. • In compliance with EU RoHS 2002/95/EC directives MECHANICALDATA • Case: SOT-323 Package • Terminals : Solderable per MIL-STD-750,Method 2026 • Marking : 72W Drain Gate Source Maximum RATINGS and Thermal Characteristics (TA=25OC unless otherwise noted ) PA RA M E TE R D r a i n- S o ur c e Vo l t a g e G a t e - S o ur c e Vo l t a g e C o nt i nuo us D r a i n C ur r e nt P ul s e d D r a i n C ur r e nt 1) S ym b o l VD S VGS ID ID M TA = 2 5 C TA = 7 5 O C O Li mi t 60 +20 11 5 800 200 120 -5 5 to + 1 5 0 625 U ni t s V V mA mA mW O M a xi m um P o w e r D i s s i p a t i o n O p e r a t i n g J u n c t i o n a n d S t o r a g e Te m p e r a t u r e R a n g e Juncti on-to Ambi ent Thermal Resi stance(PC B mounted)2 PD TJ , TS T G RθJ A C O C /W Note: 1. Maximum DC current limited by the package 2. Surface mounted on FR4 board, t < 10 sec PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE STAD-JUL.26.2007 PAGE . 1 2N7002W ELECTRICALCHARACTERISTICS P a ra me te r S ta ti c D r a i n- S o ur c e B r e a k d o w n Vo l t a g e G a t e Thr e s ho l d Vo l t a g e D r a i n- S o ur c e O n- S t a t e R e s i s t a nc e D r a i n- S o ur c e O n- S t a t e R e s i s t a nc e Ze r o G a t e Vo l t a g e D r a i n C ur r e nt Gate Body Leakage Forward Transconductance Dynamic To t a l G a t e C h a r g e G a t e - S o ur c e C ha r g e G a t e - D r a i n C ha r g e Tu r n - O n D e l a y Ti m e Tu r n - O f f D e l a y Ti m e In p u t C a p a c i t a n c e O ut p ut C a p a c i t a nc e R e v e r s e Tr a n s f e r C a p a c i t a n c e S o ur c e - D r a i n D i o d e M a x. D i o d e F o r w a r d C ur r e nt D i o d e F o rwa rd Vo lta g e Is VSD IS = 2 5 0 m A , V G S = 0 V 0 .9 3 250 1 .2 mA V Qg Qg s Qg d to n to ff Ciss Coss C rs s V D S =2 5 V, V G S =0 V f=1 .0 MHZ VD D =10V , RL =20Ω ID =500mA , VG E N =10V RG =10Ω V D S = 1 5 V , ID = 5 0 0 m A VG S =4.5V 0 .6 0 .1 0 .0 8 9 21 0 .7 15 ns 26 50 25 5 pF nC BVD SS V G S (th) RD S (o n) RD S (o n) ID S S IG S S g fS V G S = 0 V , ID = 1 0 u A V D S = V G S , ID = 2 5 0 u A VG S =4.5V, I D =75mA VG S =10V, I D =500mA VD S =60V, VG S =0V V G S =+ 2 0 V , V D S = 0 V V D S = 1 5 V , ID = 2 5 0 m A 60 1 200 2 .5 7 .5 Ω 5 1 +100 uA nA mS V V S ym b o l Te s t C o n d i t i o n M i n. Ty p . M a x. U ni t s Switching Test Circuit V IN V DD RL V OUT Gate Charge Test Circuit V GS V DD RL RG 1mA RG STAD-JUL.26.2007 PAGE . 2 2N7002W Typical Characteristics Curves (TA=25 C,unless otherwise noted) O I D - Drain Source Current (A) 1.2 ID - Drain-to-Source Current (A) 1.2 1 0.8 0.6 0.4 0.2 0 0 V GS = 10V ~ 6.0V 5.0V 4.0V V DS=10V 1 0.8 0.6 0.4 0.2 0 0 1 2 3 3.0V T J=25 OC 4 5 1 2 3 4 5 6 VDS - Drain-to-Source Voltage (V) VGS - Gate-to-Source Voltage (V) Fig. 1-TYPICAL FORWARD CHARACTERISTIC FIG.1- Output Characteristic FIG.2- Transfer Characteristic 10 5 I D=500mA R DS(ON) - On-Resistance ( W ) R DS(ON) - On-Resistance ( W ) 4 3 2 8 6 V GS=4.5V V GS=10V 4 2 T J=125 OC 1 0 T J=25 OC 2 3 4 5 6 7 8 9 10 0 0 0.2 0.4 0.6 0.8 1 1.2 ID - Drain Current (A) V GS - Gate-to-Source Voltage (V) FIG.3- On Resistance vs Drain Current FIG.4- On Resistance vs Gate to Source Voltage RDS(ON) - On-Resistance(Normalized) 2 1.8 1.6 1.4 1.2 1 0.8 0.6 V GS=10V I D=500mA 0.4 -50 -25 0 25 50 75 100 o 125 150 TJ - Junction Temperature ( C) FIG.5- On Resistance vs Junction Temperature STAD-JUL.26.2007 PAGE . 3 2N7002W 10 Vgs Qg V GS - Gate-to-Source Voltage (V) 8 6 4 2 0 V DS=15V I D=500mA Vgs(th) Qg(th) Qgs Qsw 0 0.2 0.4 0.6 0.8 1 Qgd Qg Qg - Gate Charge (nC) Fig.6 - Gate Charge Waveform Vth - G-S Threshold Voltage (NORMALIZED) Fig.7 - Gate Charge BVDSS - Breakdown Voltage (V) 1.2 1.1 1 0.9 0.8 0.7 0.6 -50 I D=250uA 73 72 71 70 69 68 67 66 65 I D=250uA -25 0 25 50 75 100 125 150 64 -50 -25 0 25 50 75 100 125 150 TJ - Junction Temperature (o C) TJ - Junction Temperature (o C) Fig.8 - Threshold Voltage vs Temperature 10 IS - Source Current (A) Fig.9 - Breakdown Voltage vs Junction Temperature V GS=0V 1 T J=25 OC T J=125 OC T J=-55 OC 0.1 0.01 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 VSD - Source-to-Drain Voltage (V) Fig.10 - Source-Drain Diode Forward Voltage STAD-JUL.26.2007 PAGE . 4 2N7002W MOUNTING PAD LAYOUT ORDER INFORMATION • Packing information T/R - 12K per 13" plastic Reel T/R - 3K per 7” plastic Reel LEGAL STATEMENT Copyright PanJit International, Inc 2007 The information presented in this document is believed to be accurate and reliable. The specifications and information herein are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any license under its patent rights or rights of others. STAD-JUL.26.2007 PAGE . 5
2N7002W
1. 物料型号:2N7002W,这是一个60V N-Channel Enhancement Mode MOSFET。

2. 器件简介:2N7002W采用先进的沟槽工艺技术,具有高密度单元设计,用于超低导通电阻。特别适用于电池操作系统、固态继电器驱动器,如继电器、显示器、灯具、电磁铁、存储器等,并符合欧盟RoHS 2002/95/EC指令。

3. 引脚分配:器件采用SOT-323封装,引脚可焊性符合MIL-STD-750, Method 2026标准,标记为72W。

4. 参数特性: - 漏源电压(Vos):60V - 栅源电压(Vos):+20V - 连续漏电流(I):115mA - 脉冲漏电流(I_M):800mA - 最大功率耗散(TA-75°C):200mW(25°C时)/ 120mW(75°C时) - 工作结温和存储温度范围(TTT):-55至+150°C - 结到环境热阻(PCB安装):625°C/W

5. 功能详解:2N7002W具有低导通电阻和高密度单元设计,适用于需要低功耗和高效率的应用场合。它的低内阻有助于减少功率损耗,而增强模式操作使其适用于广泛的电子设备。

6. 应用信息:适用于电池操作系统、固态继电器、继电器驱动器、显示器、灯具、电磁铁、存储器等。

7. 封装信息:SOT-323封装,具体尺寸和引脚布局图在文档中有详细描述。
2N7002W 价格&库存

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