PJSMDA12C

PJSMDA05C SERIES QUAD TVS/ZENER ARRAY FOR ESD AND LATCH-UP PROTECTION This Quad TVS/Zener Array family have been designed to Protect Sensitive Equipment against ESD and to prevent Latch-Up events in CMOS circuity operating at 5V,12V,15V and 24V. This TVS array offers an integrated sloution to protect up to 4 data lines where the board space is a premium. FEATURES • 350W Power Dissipation (8/20μs Waveform) • Low Leakage Current, Maximum of 5μA at rated voltage • Very Low Clamping Voltage • IEC61000-4-2 ESD 20kV air,15kV Contact Compliance • In compliance with EU RoHS 2002/95/EC directives MECHANICAL DATA • Case: SOIC-08,Molded plastic over passivated junction • Terminals: Solderable per MIL-STD-750, Method 2026 • Approx. Weight: 0.079 grams • Mounting Position : Any APPLICATIONS • RS-232C or RS-422 Communication ports • GPIB/IEEE 485 Ports • Portable Instrumentation 8 7 6 5 1 2 3 4 MAXIMUM RATINGS (Per Device) Ra t i ng P e a k P uls e P o we r ( 8 /2 0 μ s Wa ve fo rm ) E S D Vo lta g e ( HB M ) P e r M IL -S TD - 8 8 3 C O p e r a t i ng Te m p e r a t ure Ra ng e S to r a g e Te m p e r a t ur e Ra ng e S ym b o l P PP V ESD TJ T S TG Va lue 350 >2 5 - 5 0 t o +1 5 0 - 5 0 t o +1 5 0 Uni ts W kV O C C O REV.0.4-SEP.7.2009 PAGE . 1 PJSMDA05C SERIES ELECTRICAL CHARACTERISTICS (PER DEVICE) TJ = 25°C PJSMDA05C Marking DC5 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage (8/20 μs) Clamping Voltage (8/20 μs) Off State Junction Capacitance Off State Junction Capacitance PJSMDA12C Marking DC2 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage (8/20 μs) Clamping Voltage (8/20 μs) Off State Junction Capacitance PJSMDA15C Marking DCC Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage (8/20 μs) Clamping Voltage (8/20 μs) Off State Junction Capacitance PJSMDA24C Marking DC4 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage (8/20 μs) Clamping Voltage (8/20 μs) Off State Junction Capacitance Symbol VRWM VBR IR VC VC CJ I BR=1mA VR=5V I PP=5A I PP=8A 0 Vdc Bias f=1MHZ Condition Min. 26.7 Typ. Max. 24 5 40 44 60 Units V V μA V V pF Symbol VRWM VBR IR VC VC CJ I BR=1mA VR=5V I PP=5A I PP=12A 0 Vdc Bias f=1MHZ Condition Min. 16.7 Typ. Max. 15 5 24 29 100 Units V V μA V V pF Symbol VRWM VBR IR VC VC CJ I BR=1mA VR=5V I PP=5A I PP=15A 0 Vdc Bias f=1MHZ Condition Min. 13.3 Typ. Max. 12 5 20 25 150 Units V V μA V V pF Symbol VRWM VBR IR VC VC CJ CJ I BR=1mA VR=5V I PP=5A I PP=24A 0 Vdc Bias f=1MHZ 5 Vdc Bias f=1MHZ Condition Min. 6 Typ. 270 200 Max. 5 5 9.8 13 300 230 Units V V μA V V pF pF REV.0.4-SEP.7.2009 PAGE . 2 PJSMDA05C SERIES TYPICAL CHARACTERISTICS TJ = 25°C unless otherwise noted 300 250 200 150 100 50 0 PJSMDA05C PJSMDA12C PJSMDA15C PJSMDA24C 0 5 10 15 20 25 REV.0.4-SEP.7.2009 PAGE . 3 PJSMDA05C SERIES MOUNTING PAD LAYOUT ORDER INFORMATION • Packing information T/R - 3K per 13" plastic Reel LEGAL STATEMENT Copyright PanJit International, Inc 2009 The information presented in this document is believed to be accurate and reliable. The specifications and information herein are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any license under its patent rights or rights of others. REV.0.4-SEP.7.2009 PAGE . 4