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PJSMS05_09

PJSMS05_09

  • 厂商:

    PANJIT(强茂)

  • 封装:

  • 描述:

    PJSMS05_09 - QUAD TVS/ZENER ARRAY FOR ESD AND LATCH-UP PROTECTION - Pan Jit International Inc.

  • 详情介绍
  • 数据手册
  • 价格&库存
PJSMS05_09 数据手册
PJSMS05 PJSMS05 SERIES QUAD TVS/ZENER ARRAY FOR ESD AND LATCH-UP PROTECTION This Quad TVS/Zener Array family have been designed to Protect Sensitive Equipment against ESD and to prevent Latch-Up events in CMOS circuitry operating at 5V, 12V, 15V and 24V. This TVS array offers an integrated solution to protect up to 4 data lines where the board space is a premium. SPECIFICATION FEATURES 350W Power Dissipation (8/20µs Waveform) Low Leakage Current, Maximum of 5µA at rated voltage Very Low Clamping Voltage IEC61000-4-2 ESD 20kV air, 15kV Contact Compliance Industry Standard Surface Mount Package SOT23-6L 100% Tin Matte Finish (RoHS Compliance) 1 6 5 4 APPLICATIONS 1 2 3 Personal Digital Assistant (PDA) SIM Card Port Protection (Mobile Phone) Portable Instrumentation Mobile Phones and Accessories Memory Card Port Protection TVS PJSMS05 PJSMS12 PJSMS15 PJSMS24 Symbol P pp V ESD TJ Tstg Value 350 >25 SOT23-6L MAXIMUM RATINGS (Per Device) Rating Peak Pulse Power (8/20µs Waveform) ESD Voltage (HBM) Operating Temperature Range Storage Temperature Range Marking Code M05 M12 M15 M24 Units W kV °C °C -50 to +125 -50 to +150 ELECTRICAL CHARACTERISTICS (Per Device) Tj = 25°C PJSMS05 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage (8/20µs) Clamping Voltage (8/20µs) Off State Junction Capacitance Off State Junction Capacitance Symbol VWRM VBR IR Vc Vc Cj Cj I BR = 1mA VR = 5V I pp = 5A I pp = 24A 0 Vdc Bias f = 1MHz Between I/O pins and pin 2, 5 5 Vdc Bias f = 1MHz Between I/O pins and pin 2, 5 Conditions Min Typical Max 5 Units V V 6 5 9.8 13 225 125 µA V V pF pF 1/13/2009 Page 1 www.panjit.com PJSMS05 SERIES ELECTRICAL CHARACTERISTICS (Per Device) Tj = 25°C PJSMS12 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage (8/20µs) Clamping Voltage (8/20µs) Off State Junction Capacitance Symbol VWRM VBR IR Vc Vc Cj I BR = 1mA VR = 12V I pp = 5A I pp = 15A 0 Vdc Bias f = 1MHz Between I/O pins and pin 2, 5 Conditions Min Typical Max 12 Units V V 13.3 1 20 25 100 µA V V pF PJSMS15 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage (8/20µs) Clamping Voltage (8/20µs) Off State Junction Capacitance Symbol VWRM VBR IR Vc Vc Cj I BR = 1mA VR = 15V I pp = 5A I pp = 12A 0 Vdc Bias f = 1MHz Between I/O pins and pin 2, 5 Conditions Min Typical Max 15 Units V V 16.7 1 24 29 80 µA V V pF PJSMS24 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage (8/20µs) Clamping Voltage (8/20µs) Off State Junction Capacitance Symbol VWRM VBR IR Vc Vc Cj I BR = 1mA VR = 24V I pp = 5A I pp = 8A 0 Vdc Bias f = 1MHz Between I/O pins and pin 2, 5 Conditions Min Typical Max 24 Units V V 26.7 1 40 44 60 µA V V pF 1/13/2009 Page 2 www.panjit.com PJSMS05 SERIES TYPICAL CHARACTERISTICS TJ = 25°C unless otherwise noted Surge Pulse Waveform Definition N on-R epetitive Peak Pulse Power vs Pulse Time Pulse Waveform Peak Pulse Power - Ppp (W) 110 100 90 80 70 60 50 40 30 20 10 0 0 1000 100 10 1 0.1 0.01 1 10 100 1000 Pulse D uration, µsec Percent of Ipp 50% of Ipp @ 20µs Rise time 10-90% - 8µs 5 10 15 tim e, µsec 20 25 30 Clamping Voltage vs. Peak current 45 40 35 30 25 20 15 10 5 0 0 5 200 PJS 24 MS Off-State Capacitance per Device - 1MHz Clamping voltage, V 180 Capacitance, pF 160 140 120 100 80 60 40 20 0 PJSMS05 PJS 15 MS PJS 12 MS PJS 05 MS 10 15 20 25 30 Ipp, A (8/20µsec) 1 2 Bias, Vdc 3 4 5 1/13/2009 Page 3 www.panjit.com PJSMS05 SERIES TYPICAL APPLICATION EXAMPLE AND PACKAGE DIMENSIONS Data Line 1 Data Line 2 Data Line 3 Data Line 4 PJSMSxx Ground (Pins 2 and 5) © Copyright PanJit International, Inc 2009 The information presented in this document is believed to be accurate and reliable. The specifications and information herein are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any license under its patent rights or rights of others. 1/13/2009 Page 4 www.panjit.com
PJSMS05_09
物料型号: - PJSMS05 - PJSMS12 - PJSMS15 - PJSMS24

器件简介: PJSMS05系列是一种四路TVS/Zener阵列,旨在保护敏感设备免受ESD损害,并防止CMOS电路中的Latch-Up事件。这些TVS阵列提供了一种集成解决方案,用于保护多达4条数据线,特别适合于板空间有限的应用。

引脚分配: - Ground (Pins 2 and 5):接地引脚 - Data Line 1, Data Line 2, Data Line 3, Data Line 4:数据线1至4

参数特性: - 峰值脉冲功率:350W(8/20μs波形) - 最大漏电流:在额定电压下最大为5μA - ESD合规性:IEC61000-4-2 ESD 20kV空气放电,15kV接触放电 - 非常低的钳位电压 - 行业标准的表面贴装封装:SOT23-6L - 100%锡膏表面处理(符合RoHS)

功能详解: - 该系列提供对数据线的保护,防止静电放电和CMOS电路中的Latch-Up事件。 - 适用于5V、12V、15V和24V的CMOS电路。 - 提供集成保护解决方案,节省空间。

应用信息: - 个人数字助理(PDA) - SIM卡端口保护(手机) - 便携式仪器 - 手机及其配件 - 存储卡端口保护

封装信息: - 封装类型:SOT23-6L - 表面处理:100%锡膏(符合RoHS)
PJSMS05_09 价格&库存

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