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4239-51

4239-51

  • 厂商:

    PEREGRINE(游隼半导体)

  • 封装:

  • 描述:

    4239-51 - SPDT UltraCMOS™ RF Switch - Peregrine Semiconductor Corp.

  • 详情介绍
  • 数据手册
  • 价格&库存
4239-51 数据手册
Product Specification PE4239 SPDT UltraCMOS™ RF Switch Product Description The PE4239 UltraCMOS™ RF Switch is designed to cover a broad range of applications from DC through 3.0 GHz. This reflective switch integrates on-board CMOS control logic with a low voltage CMOS-compatible control interface, and can be controlled using either single-pin or complementary control inputs. Using a nominal +3-volt power supply voltage, a typical input 1 dB compression point of +27 dBm can be achieved. The PE4239 UltraCMOS™ RF Switch is manufactured on Peregrine’s UltraCMOS™ process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. Figure 1. Functional Diagram RFC Features • Single-pin or complementary CMOS logic control inputs • +3.0-volt power supply needed for single-pin control mode • Low insertion loss: 0.7 dB at 1.0 GHz, 0.9 dB at 2.0 GHz • Isolation of 32 dB at 1.0 GHz, 23 dB at 2.0 GHz • Typical input 1 dB compression point of +27 dBm • Ultra-small SC-70 package Figure 2. Package Type SC-70 6-lead SC-70 RF2 RF1 CMOS Control Driver CTRL CTRL or VDD Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 Ω) Parameter Operation Frequency Insertion Loss Isolation Return Loss ‘ON’ Switching Time ‘OFF’ Switching Time Video Feedthrough2 Input 1 dB Compression Input IP3 2000 MHz 2000 MHz, 14 dBm input power 26 43 1 Conditions 1000 MHz 2000 MHz 1000 MHz 2000 MHz 1000 MHz 2000 MHz 50% CTRL to 0.1 dB of final value, 1 GHz 50% CTRL to 25 dB isolation, 1 GHz Minimum DC Typical 0.7 0.9 Maximum 3000 0.85 1.05 Units MHz dB dB dB dB dB dB ns ns mVpp dBm dBm 30 21 18 16 32 23 20 18 300 200 15 27 45 Notes: 1. Device linearity will begin to degrade below 10 MHz. 2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low in a 50 Ω test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth. Document No. 70-0068-02 │ www.psemi.com ©2002-2006 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 9 PE4239 Product Specification Figure 3. Pin Configuration (Top View) pin 1 Table 3. Absolute Maximum Ratings Symbol VDD Parameter/Conditions Power supply voltage Voltage on any input Storage temperature range Operating temperature range Input power (50Ω) ESD voltage (Human Body Model) Min -0.3 -0.3 -65 -40 Max 4.0 VDD+ 0.3 150 85 30 1500 Units V V °C °C dBm V RF1 GND RF2 1 6 CTRL or VDD . 239 VI 5 2 RFC CTRL 3 4 TST TOP PIN Table 2. Pin Descriptions Pin No. 1 2 3 4 5 VESD Pin Name RF1 GND RF2 CTRL RFC Description RF1 port (Note 1) Ground connection. Traces should be physically short and connected to ground plane for best performance. RF2 port (Note 1) Switch control input, CMOS logic level. Common RF port for switch (Note 1) Control Voltage High This pin supports two interface options: Single-pin control mode. A nominal 3volt supply connection is required. Complementary-pin control mode. A complementary CMOS control signal to CTRL is supplied to this pin. Bypassing on this pin is not required in this mode. Control Voltage Low 0.7x VDD 0.3x VDD V V Table 4. DC Electrical Specifications Parameter VDD Power Supply Voltage IDD Power Supply Current (VDD = 3V, VCTRL = 3V) Min 2.7 Typ 3.0 250 Max 3.3 500 Units V nA 6 CTRL or VDD Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS™ device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the specified rating. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. Note 1: All RF pins must be DC blocked with an external series capacitor or held at 0 VDC. ©2002-2006 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 9 Document No. 70-0068-02 │ UltraCMOS™ RFIC Solutions PE4239 Product Specification Table 5. Single-pin Control Logic Truth Table Control Voltages Pin 6 (CTRL or VDD) = V DD Pin 4 (CTRL) = High Pin 6 (CTRL or VDD) = V DD Pin 4 (CTRL) = Low Signal Path RFC to RF1 Control Logic Input The PE4239 is a versatile RF CMOS switch that supports two operating control modes; single-pin control mode and complementary-pin control mode. Single-pin control mode enables the switch to operate with a single control pin (pin 4) supporting a +3-volt CMOS logic input, and requires a dedicated +3-volt power supply connection on pin 6 (VDD). This mode of operation reduces the number of control lines required and simplifies the switch control interface typically derived from a CMOS µProcessor I/O port. Complementary-pin control mode allows the switch to operate using complementary control pins CTRL and CTRL (pins 4 & 6), that can be directly driven by +3-volt CMOS logic or a suitable µProcessor I/O port. This enables the PE4239 to be used as a potential alternate source for SPDT RF switch products used in positive control voltage mode and operating within the PE4239 operating limits. RFC to RF2 Table 6. Complementary-pin Control Logic Truth Table Control Voltages Pin 6 (CTRL or VDD) = Low Pin 4 (CTRL) = High Pin 6 (CTRL or VDD) = High Pin 4 (CTRL) = Low Signal Path RFC to RF1 RFC to RF2 Document No. 70-0068-02 │ www.psemi.com ©2002-2006 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 9 PE4239 Product Specification Evaluation Kit The SPDT Switch Evaluation Kit board was designed to ease customer evaluation of the PE4239 SPDT switch. The RF common port is connected through a 50Ω transmission line to the top left SMA connector, J1. Port 1 and Port 2 are connected through 50Ω transmission lines to the top two SMA connectors on the right side of the board, J3 and J2, respectively. A through transmission line connects SMA connectors J4 and J5. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. The board is constructed of a two metal layer FR4 material with a total thickness of 0.031”. The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide with ground plane model using a trace width of 0.0476”, trace gaps of 0.030”, dielectric thickness of 0.028”, metal thickness of 0.0021” and εr of 4.4. J6 provides a means for controlling DC and digital inputs to the device. Starting from the lower left pin, the second pin to the right (J6-3) is connected to the device V1 or CTRL input. The fourth pin to the right (J6-7) is connected to the device V2 or CTRL/VDD input. Figure 4. Evaluation Board Layout Peregrine Specification 101/0083 Figure 5. Evaluation Board Schematic Peregrine Specification 102/0104 ©2002-2006 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 9 Document No. 70-0068-02 │ UltraCMOS™ RFIC Solutions PE4239 Product Specification Typical Performance Data @ -40 °C to 85 °C (Unless otherwise noted) Figure 6. Insertion Loss – RFC to RF1 Figure 7. Input 1 dB Compression Point & IIP3 (Typical performance @ 25 °C) 0 60 60 -0.3 -40°C Insertion Loss (dB) 50 50 1dB Compression Point (dBm) IIP3 (dBm) -0.6 40 40 -0.9 85°C 25°C 30 30 -1.2 -1.5 0 500 1000 1500 2000 2500 3000 20 0 500 1000 1500 2000 2500 20 3000 Frequency (MHz) Frequency (MHz) Figure 8. Insertion Loss – RFC to RF2 Figure 9. Isolation – RFC to RF1 0 0 -0.3 -40°C Insertion Loss (dB) -20 -0.9 85°C 25°C Isolation (dB) -0.6 -40 -60 -1.2 -80 -1.5 0 500 1000 1500 2000 2500 3000 -100 0 500 1000 1500 2000 2500 3000 Frequency (MHz) Frequency (MHz) Document No. 70-0068-02 │ www.psemi.com ©2002-2006 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 9 PE4239 Product Specification Typical Performance Data @ -40 °C to 85 °C (Unless otherwise noted) Figure 10. Isolation – RFC to RF2 Figure 11. Isolation – RF1 to RF2, RF2 to RF1 0 0 -20 -20 Isolation (dB) -60 Isolation (dB) 0 500 1000 1500 2000 2500 3000 -40 -40 -60 -80 -80 -100 -100 0 500 1000 1500 2000 2500 3000 Frequency (MHz) Frequency (MHz) Figure 12. Return Loss – RFC to RF1, RF2 0 Figure 13. Return Loss – RF1, RF2 0 -10 Return Loss (dB) Return Loss (dB) -10 RF1 -20 RF1 -20 RF2 -30 -30 RF2 -40 0 500 1000 1500 2000 2500 3000 -40 0 500 1000 1500 2000 2500 3000 Frequency (MHz) Frequency (MHz) ©2002-2006 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 9 Document No. 70-0068-02 │ UltraCMOS™ RFIC Solutions PE4239 Product Specification Figure 14. Package Drawing 6-lead SC-70 1.80 2.20 0.65 BSC 0.10 0.30 1.80 2.40 1.15 1.35 0.15 0.30 0.10 0.40 0.10 0.18 0.80 1.00 0.80 1.10 0.00 0.10 Document No. 70-0068-02 │ www.psemi.com ©2002-2006 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 9 PE4239 Product Specification Figure 15. Tape and Reel Specifications Pin 1 Tape Feed Direction Table 7. Ordering Information Order Code Part Marking 4239-01 4239-02 4239-00 4239-51 4239-52 239 239 PE4239-EK 239 239 Description PE4239-06SC70-7680A PE4239-06SC70-3000C PE4239-06SC70-EK PE4239G-06SC70-7680A PE4239G-06SC70-3000C Package 6-lead SC-70 6-lead SC-70 Evaluation Kit Green 6-lead SC-70 Green 6-lead SC-70 Shipping Method 7680 units / Canister 3000 units / T&R 1 / Box 7680 units / Canister 3000 units / T&R ©2002-2006 Peregrine Semiconductor Corp. All rights reserved. Page 8 of 9 Document No. 70-0068-02 │ UltraCMOS™ RFIC Solutions PE4239 Product Specification Sales Offices The Americas Peregrine Semiconductor Corporation 9450 Carroll Park Drive San Diego, CA 92121 Tel: 858-731-9400 Fax: 858-731-9499 North Asia Pacific Peregrine Semiconductor K.K. Teikoku Hotel Tower 10B-6 1-1-1 Uchisaiwai-cho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Europe Peregrine Semiconductor Europe Bâtiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France Tel: +33-1-4741-9173 Fax : +33-1-4741-9173 Peregrine Semiconductor, Korea #B-2402, Kolon Tripolis, #210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-480 S. Korea Tel: +82-31-728-4300 Fax: +82-31-728-4305 South Asia Pacific Peregrine Semiconductor, China Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 Space and Defense Products Americas: Tel: 858-731-9453 Europe, Asia Pacific: 180 Rue Jean de Guiramand 13852 Aix-En-Provence Cedex 3, France Tel: +33-4-4239-3361 Fax: +33-4-4239-7227 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS and HaRP are trademarks of Peregrine Semiconductor Corp. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). Document No. 70-0068-02 │ www.psemi.com ©2002-2006 Peregrine Semiconductor Corp. All rights reserved. Page 9 of 9
4239-51
1. 物料型号:PE4239

2. 器件简介: - PE4239 UltraCMOS™射频开关设计用于覆盖从直流到3.0 GHz的广泛应用。这种反射式开关集成了板上CMOS控制逻辑和低电压CMOS兼容的控制接口,可以使用单端或互补控制输入进行控制。在典型的+3伏电源电压下,可以实现+27 dBm的输入1 dB压缩点。PE4239 UltraCMOS™射频开关采用Peregrine的UltraCMOS™工艺制造,这是一种专利的硅基绝缘体(SOI)技术变体,基底为蓝宝石,提供GaAs的性能和传统CMOS的经济性和集成性。

3. 引脚分配: - Pin 1: RF1 - RF1端口(注1) - Pin 2: GND - 接地连接。为了获得最佳性能,迹线应物理短且连接到地平面。 - Pin 3: RF2 - RF2端口(注1) - Pin 4: CTRL - 开关控制输入,CMOS逻辑电平。 - Pin 5: RFC - 开关的公共RF端口(注1) - Pin 6: CTRL或VDD - 该引脚支持两种接口选项:单端控制模式。需要在引脚6上连接名义上的3伏电源。互补引脚控制模式。向引脚6提供CTRL的互补CMOS控制信号。在该模式下不需要旁路此引脚。 - 注1:所有RF引脚必须用外部串联电容器进行直流阻断或保持在0VDC。

4. 参数特性: - 工作频率:直流至3000 MHz - 插入损耗:1.0 GHz时为0.7 dB,2.0 GHz时为0.9 dB - 隔离度:1.0 GHz时为32 dB,2.0 GHz时为23 dB - 回波损耗:1.0 GHz时为20 dB,2.0 GHz时为18 dB - 'ON'开关时间:300 ns(从CTRL变化50%至最终值的0.1 dB,1 GHz) - 'OFF'开关时间:200 ns(从CTRL变化50%至隔离度25 dB,1 GHz) - 视频馈通:15 mVpp - 输入1 dB压缩点:26至27 dBm - 输入IP3:在2000 MHz和14 dBm输入功率下,43至45 dBm

5. 功能详解: - PE4239是一款多用途射频CMOS开关,支持两种操作控制模式:单端控制模式和互补引脚控制模式。单端控制模式允许开关使用单个控制引脚(引脚4)支持+3伏CMOS逻辑输入,并需要在引脚6上连接专用的+3伏电源。这种操作模式减少了所需的控制线数量并简化了CMOS微处理器I/O端口。互补引脚控制模式允许开关使用互补控制引脚CTRL和CTRL(引脚4和6),可以直接由+3伏CMOS逻辑或合适的微处理器I/O端口驱动。

6. 应用信息: - PE4239 SPDT开关评估套件板旨在简化客户对PE4239 SPDT开关的评估。RF公共端口通过50Ω传输线连接到板左侧的SMA连接器J1。端口1和端口2分别通过50Ω传输线连接到板右侧的顶部两个SMA连接器J3和J2。通过SMA连接器J4和J5的透传传输线可以用来估计在被评估的环境条件下PCB的损耗。

7. 封装信息: - 6引脚SC-70封装,具体图纸和封装细节见PDF文档中的Figure 14和Figure 15。
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