EK42359-01

Product Specification PE42359 SPDT UltraCMOS® RF Switch 10 MHz – 3 GHz Product Description The PE42359 UltraCMOS® RF switch is designed to cover a broad range of applications from 10 MHz through 3 GHz. This reflective switch integrates on-board CMOS control logic with a low voltage CMOS-compatible control interface, and can be controlled using either single-pin or complementary control inputs. Using a nominal +3-volt power supply voltage, a typical input 1 dB compression point of +33.5 dBm can be achieved. PE42359 also meets the quality and performance standards for automotive applications and has received AEC-Q100 Grade 2 certification. The PE42359 is manufactured on Peregrine’s UltraCMOS® process, a patented variation of silicon-oninsulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. Features  AEC-Q100 Grade 2 certified  Supports operating temperature up to        +105°C Single-pin or complementary CMOS logic control inputs Low insertion loss  0.35 dB @ 1000 MHz  0.50 dB @ 2000 MHz Isolation of 30 dB @ 1000 MHz High ESD tolerance of 2kV HBM Typical input 1 dB compression point of +33.5 dBm 1.8V minimum power supply voltage Small SC-70 package Figure 2. Package Type     6‐lead SC‐70  Figure 1. Functional Diagram ESD RFC RF1 RF2 ESD ESD CMOS Control Driver CTRL CTRL or VDD DOC-02109 Document No. DOC-13214-3 │ www.psemi.com ©2012-2013 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 14 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE42359 Product Specification Table 1. Electrical Specifications @ +25°C, VDD = 3.0V (ZS = ZL = 50Ω ) Parameter Operation Frequency Conditions 1 Minimum Typical 10 0.35 0.50 1.1 Maximum Units 3000 MHz 0.45 0.60 1.3 dB dB dB Insertion Loss2 10-1000 MHz 1000-2000 MHz 2000-3000 MHz2 Isolation - RFX to RFX 10-1000 MHz 1000-2000 MHz 2000-3000 MHz 32 20 13 35 21 14 dB dB dB Isolation - RFC to RFX 10-1000 MHz 1000-2000 MHz 2000-3000 MHz 28 19 12 29 20 13 dB dB dB Return Loss - RFX to RFC2 10-1000 MHz 1000-2000 MHz 2000-3000 MHz2 21 15 9 25 18 11 dB dB dB Switching Time 50% CTRL to 90% or 10% RF Video Feedthrough3 Input 1 dB Compression 1000 MHz @ 2.3 - 3.3V 1000 MHz @ 1.8 - 2.3V 2500 MHz @ 2.3 - 3.3V 2500 MHz @ 1.8 - 2.3V Input IP3 2500 MHz, 20 dBm input power Notes: 31.5 29.5 28.5 28 2 us 15 mVpp 33.5 30.5 30.5 29 dBm 55 dBm 1. Device linearity will begin to degrade below 10 MHz 2. High frequency performance can be improved by external matching (see Figure 20 through Figure 25 and Figure 28) 3. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low in a 50Ω test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth Table 1A. Electrical Specifications @ -40°C to +105°C, VDD = 3.0V (ZS = ZL = 50Ω ) Parameter Conditions Operation Frequency Minimum Typical 10 0.35 0.5 1.1 Maximum Units 3000 MHz 0.6 0.75 1.4 dB dB dB Insertion Loss 10-1000 MHz 1000-2000 MHz 2000-3000 MHz Isolation - RFX to RFX 10-1000 MHz 1000-2000 MHz 2000-3000 MHz 31 19 12 35 21 14 dB dB dB Isolation - RFC to RFX 10-1000 MHz 1000-2000 MHz 2000-3000 MHz 27 18 11 29 20 13 dB dB dB Return Loss - RFX to RFC 10-1000 MHz 1000-2000 MHz 2000-3000 MHz 20 14 9 25 18 11 dB dB dB Switching Time 50% CTRL to 90% or 10% RF 3.6 us Video Feedthrough Input 1 dB Compression 1000 MHz @ 2.3 - 3.3V 1000 MHz @ 1.8 - 2.3V 2500 MHz @ 2.3 - 3.3V 2500 MHz @ 1.8 - 2.3V Input IP3 2500 MHz, 20 dBm input power ©2012-2013 Peregrine Semiconductor Corp. All rights reserved. 30.5 28.5 27.5 27 15 mVpp 33.5 30.5 30.5 29 dBm 54 dBm Document No. DOC-13214-3 │ UltraCMOS® RFIC Solutions Page 2 of 14 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE42359 Product Specification Table 4. Absolute Maximum Ratings Figure 3. Pin Configuration (Top View) Symbol Min Max Units Power supply voltage -0.3 4.0 V Voltage on any DC input -0.3 VDD+ 0.3 V TST Storage temperature range -65 150 °C TOP Operating temperature range -40 105 °C PIN1 Input power (50Ω) VDD VI Table 2. Pin Descriptions Pin No. Pin Name 1 Description VESD,HBM VESD,CDM 1 RF1 RF Port1 2 GND Ground connection. Traces should be physically short and connected to ground plane for best performance. 3 RF21 RF Port2 4 CTRL Switch control input, CMOS logic level. 5 1 RFC RF Common This pin supports two interface options: Single-pin control mode. A nominal 3-volt supply connection is required. 6 CTRL or VDD Complementary-pin control mode. A complementary CMOS control signal to CTRL is supplied to this pin. Bypassing on this pin is not required in this mode. Notes: VDD Power Supply Voltage Min Typ Max Units 1.8 3.0 3.3 V 9 20 µA IDD Power Supply Current (VDD = 2.3 to 5.5V [+25°C only]) Control Voltage High Control Voltage Low V 0.3x VDD 3 ESD voltage CDM , all pins 2000 V 1000 V 1. To maintain optimum device performance, do not exceed Max PIN at desired operating frequency (see Figure 4) 2. Human Body Model (MIL_STD 883 Method 3015) 3. Charged Device Model (JEDEC JESD22-C101) (VDD = +3.3V) 40 35 30 25 20 15 T= +25C 10 T= +105C 5 0 0 0.7x VDD ESD voltage HBM2, all pins Figure 4. Maximum Power Handling Input Power [dBm] Parameter see fig. 4 Exceeding absolute maximum ratings may cause permanent damage. Operation should be restricted to the limits in the Operating Ranges table. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. Note 1: All RF pins must be DC blocked with an external series capacitor or held at o VDC Table 3. Operating Ranges Parameter/Conditions 500 1000 1500 2000 2500 3000 Frequency [MHz] V Electrostatic Discharge (ESD) Precautions Moisture Sensitivity Level The Moisture Sensitivity Level rating for the PE42359 in the SC70 package is MSL1. Document No. DOC-13214-3 │ www.psemi.com When handling this UltraCMOS® device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the specified rating. ©2012-2013 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 14 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE42359 Product Specification Table 5. Single-pin Control Logic Truth Table Control Voltages Signal Path Pin 6 (VDD) = VDD Pin 4 (CTRL) = High RFC to RF1 Pin 6 (VDD) = VDD Pin 4 (CTRL) = Low RFC to RF2 Table 6. Complementary-pin Control Logic Truth Table Control Voltages Pin 6 (CTRL or VDD) = Low Pin 4 (CTRL) = High Pin 6 (CTRL or VDD) = High Pin 4 (CTRL) = Low Signal Path RFC to RF1 RFC to RF2 Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS® devices are immune to latch-up. Switching Frequency The PE42359 has a maximum 25 kHz switching rate. ©2012-2013 Peregrine Semiconductor Corp. All rights reserved. Control Logic Input The PE42359 is a versatile RF CMOS switch that supports two operating control modes; single-pin control mode and complementary-pin control mode. Single-pin control mode enables the switch to operate with a single control pin (pin 4) supporting a +3-volt CMOS logic input, and requires a dedicated +3-volt power supply connection on pin 6 (VDD). This mode of operation reduces the number of control lines required and simplifies the switch control interface typically derived from a CMOS Processor I/O port. Complementary-pin control mode allows the switch to operate using complementary control pins CTRL and CTRL (pins 4 and 6), that can be directly driven by +3-volt CMOS logic or a suitable Processor I/O port. This enables the PE42359 to be used as a potential alternate source for SPDT RF switch products used in positive control voltage mode and operating within the PE42359 operating limits. Document No. DOC-13214-3 │ UltraCMOS® RFIC Solutions Page 4 of 14 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE42359 Product Specification Typical Performance Data @ +25°C, VDD = 3.0V unless otherwise specified Figure 5. Insertion Loss (RFX Nominal Condition)1 Figure 6. Insertion Loss vs Temp (RF1-RFC)1 Note 1: Figure 7. Insertion Loss vs VDD (RF1-RFC)1 High frequency performance can be improved by external matching (see Figure 20 through Figure 25 and Figure 28) Document No. DOC-13214-3 │ www.psemi.com ©2012-2013 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 14 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE42359 Product Specification Typical Performance Data @ +25°C, VDD = 3.0V unless otherwise specified Figure 8. RFC-RFX Isolation vs Temp Figure 10. RFX-RFX Isolation vs Temp ©2012-2013 Peregrine Semiconductor Corp. All rights reserved. Figure 9. RFC-RFX Isolation vs VDD Figure 11. RFX-RFX Isolation vs VDD Document No. DOC-13214-3 │ UltraCMOS® RFIC Solutions Page 6 of 14 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE42359 Product Specification Typical Performance Data @ +25°C, VDD = 3.0V unless otherwise specified Figure 12. RFC Port Return Loss vs Temp (RF1 Active)1 Figure 14. RFC Port Return Loss vs Temp (RF2 Active)1 Note 1: Figure 13. RFC Port Return Loss vs VDD (RF1 Active)1 Figure 15. RFC Port Return Loss vs VDD (RF2 Active)1 High frequency performance can be improved by external matching (see Figure 20 through Figure 25 and Figure 28) Document No. DOC-13214-3 │ www.psemi.com ©2012-2013 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 14 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE42359 Product Specification Typical Performance Data @ +25°C, VDD = 3.0V unless otherwise specified Figure 16. Active Port Return Loss vs Temp (RF1 Active)1 Figure 18. Active Port Return Loss vs Temp (RF2 Active)1 Note 1: Figure 17. Active Port Return Loss vs VDD (RF1 Active)1 Figure 19. Active Port Return Loss vs VDD (RF2 Active)1 High frequency performance can be improved by external matching (see Figure 20 through Figure 25 and Figure 28) ©2012-2013 Peregrine Semiconductor Corp. All rights reserved. Document No. DOC-13214-3 │ UltraCMOS® RFIC Solutions Page 8 of 14 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE42359 Product Specification Performance Comparison @ 25°C and VDD = 3.0V with or without matching Figure 21. Insertion Loss RF21 0 0 ‐0.5 ‐0.5 ‐1 Insertion Loss (‐dB) Insertion Loss (‐dB) Figure 20. Insertion Loss RF11 ‐1.5 ‐2 ‐2.5 ‐3 ‐3.5 No external matching With capacitor on RFC line ‐4 ‐1 ‐1.5 ‐2 ‐2.5 ‐3 ‐3.5 ‐4.5 ‐4.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0.0 4.0 Figure 22. Active Port Return Loss (RF1 Active)1 1.5 2.0 2.5 3.0 3.5 4.0 x109 Figure 23. Active Port Return Loss (RF2 Active)1 0 ‐5 ‐5 ‐10 ‐10 Return Loss (‐dB) Insertion Loss (‐dB) 1.0 Frequency (Hz) 0 ‐15 ‐20 ‐25 ‐30 No external matching ‐35 With capacitor on RFC line 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 ‐15 ‐20 ‐25 ‐30 No external matching ‐35 With capacitor on RFC line ‐40 ‐40 0.0 4.0 0.5 1.0 Figure 24. RFC Port Return Loss (RF1 Active)1 ‐5 ‐10 ‐10 Return Loss (‐dB) 0 ‐5 ‐15 ‐20 ‐25 No external matching ‐35 With capacitor on RFC line 2.0 2.5 3.0 3.5 4.0 x109 Figure 25. RFC Port Return Loss (RF2 Active)1 0 ‐30 1.5 Frequency (Hz) x109 Frequency (Hz) Insertion Loss (‐dB) 0.5 x109 Frequency (Hz) ‐40 ‐15 ‐20 ‐25 ‐30 No external matching ‐35 With capacitor on RFC line ‐40 0.0 0.5 1.0 1.5 2.0 2.5 Frequency (Hz) Note 1: No external matching With capacitor on RFC line ‐4 3.0 3.5 4.0 x109 0.0 0.5 1.0 1.5 2.0 2.5 Frequency (Hz) 3.0 3.5 4.0 x109 High frequency performance can be improved by external matching (see Figure 20 through Figure 25 and Figure 28) Document No. DOC-13214-3 │ www.psemi.com ©2012-2013 Peregrine Semiconductor Corp. All rights reserved. Page 9 of 14 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE42359 Product Specification Evaluation Kit Figure 26. Evaluation Board Layouts The SPDT switch EK Board was designed to ease customer evaluation of Peregrine’s PE42359. The RF common port is connected through a 50Ω transmission line via the top SMA connector, J1. RF1 and RF2 are connected through 50Ω transmission lines via SMA connectors J2 and J3, respectively. A through 50Ω transmission is available via SMA connectors J4 and J5. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. The board is constructed of a two metal layer FR4 material with a total thickness of 0.031”. The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide with ground plane model using a trace width of 0.0476”, trace gaps of 0.030”, dielectric thickness of 0.028”, metal thickness of 0.0021” and εr of 4.4. J6 and J7 provide a means for controlling DC and digital inputs to the device. J6-1 is connected to the device VDD or CTRL input. J7-1 is connected to the device CTRL input. DOC-02396 ©2012-2013 Peregrine Semiconductor Corp. All rights reserved. Document No. DOC-13214-3 │ UltraCMOS® RFIC Solutions Page 10 of 14 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE42359 Product Specification Figure 27. Evaluation Board Schematic J4 N/A 1 1 T-line Description -Model = CPWG H = 28 mils T = 2.1 mils W = 47 mils G = 30 mils Er = 4.4 J5 N/A 1 2 J7 CNTL R2 1 K Ohm U1 PE42359/SC70-6 J1 RFC 1 J3 RF2 1 J2 RF1 4 CTRL RF_2 3 5 RFC GND 2 6 VDD RF_1 1 1 1 2 R1 1 K Ohm J6 CNTLX/VDD General Comments -Transmission lines connected to J1, J2, and J3 should have exactly the same electrical length. The path from J2 to J3 including the distance through the part should have the same length as J4 and J5 and be in parallel to J4 to J5. 102-0889 Document No. DOC-13214-3 │ www.psemi.com ©2012-2013 Peregrine Semiconductor Corp. All rights reserved. Page 11 of 14 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE42359 Product Specification Figure 28. Evaluation Board Schematic with Matching 50 OHM J4 N/A 1 1 T-line Description -Model = CPWG H = 28 mils T = 2.1 mils W = 47 mils G = 30 mils Er = 4.4 J5 N/A 1 2 J7 CNTL R2 1 K Ohm 50 OHM 50 OHM W=10mil, L=80mil 4 CTRL RF_2 3 5 RFC GND 2 6 VDD RF_1 1 1 1 J3 RF2 1 J2 RF1 50 OHM 1 J1 RFC U1 PE42359/SC70-6 R1 1 K Ohm C1 0.5pF 1 2 2 C1 CLOSETORIGHTEND OF TLINE J6 CNTLX/VDD General Comments -Transmission lines connected to J1, J2, and J3 should have exactly the same electrical length. The path from J2 to J3 including the distance through the part should have the same length as J4 and J5 and be in parallel to J4 to J5. 102-0925 ©2012-2013 Peregrine Semiconductor Corp. All rights reserved. Document No. DOC-13214-3 │ UltraCMOS® RFIC Solutions Page 12 of 14 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE42359 Product Specification Figure 29. Package Drawing    6‐lead SC‐70  0.10 C (2X) 2.10±0.05 A 0.65 1.30 B 6 0.50 MIN 4 0.10 C 1.25±0.10 2.10±0.10 0.90±0.10 1.90 0.05 C 0.10 C (2X) Pin #1 Corner 1 SEATING PLANE 3 0.65 0.05±0.05 C 0.225±0.075 0.40 MIN 1.30 Side View Top View Recommended Land Pattern DOC-01923 0.10 0.165±0.085 A B ALL FEATURES 0.36±0.10 End View Figure 30. Top Marking Specification  PPP YWW = Pin 1 Indicator PPP = Part Number YWW = Date Code DOC-01629 Document No. DOC-13214-3 │ www.psemi.com ©2012-2013 Peregrine Semiconductor Corp. All rights reserved. Page 13 of 14 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE42359 Product Specification Figure 31. Tape and Reel Specifications Tape Feed Direction Table 7. Ordering Information Order Code Description Package Shipping Method PE42359SCAA-Z PE42359 SPDT RF switch 6-lead SC-70 3000 units / T&R EK42359-01 PE42359 Evaluation kit Evaluation kit 1 / Box Sales Contact and Information For sales and contact information please visit www.psemi.com. Advance Information: The product is in a formative or design stage. The datasheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification: The datasheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification: The datasheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a CNF (Customer Notification Form). The information in this datasheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. ©2012-2013 Peregrine Semiconductor Corp. All rights reserved. No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party. Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, UltraCMOS and UTSi are registered trademarks and HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com. Document No. DOC-13214-3 │ UltraCMOS® RFIC Solutions Page 14 of 14 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com