PE3501_08

Product Specification PE3501 Product Description The PE3501 is a high-performance dynamic UltraCMOS™ prescaler with a fixed divide ratio of 2. Its operating frequency range is 400 MHz to 3.5 GHz. The PE3501 operates on a nominal 3 V supply and draws only 12 mA. It is packaged in a small 8-lead TSSOP and is ideal for frequency scaling and microwave PLL synthesis solutions. The PE3501 is manufactured on Peregrine’s UltraCMOS™ process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. Figure 1. Functional Schematic Diagram 3500 MHz Low Power UltraCMOS™ Divide-by-2 Prescaler Features • High-frequency operation: 400 MHz to 3500 MHz • Fixed divide ratio of 2 • Low-power operation: 12 mA typical @3V • Small package: 8-lead TSSOP • Low cost Figure 2. Package Type 8-lead TSSOP D Q DRIVER OUTPUT BUFFER Fout Fin PREAMP CLK DEC QB OFF-CHIP BYPASS Table 1. Electrical Specifications (ZS = ZL = 50 Ω) VDD = 3.0 V, -40° C ≤ TA ≤ 85° C, unless otherwise specified Parameter Supply Voltage Supply Current Input Frequency (Fin) Input Power (Pin) Conditions Minimum 2.85 Typical 3.0 12 Maximum 3.15 15 3500 +10 +10 Units V mA MHz dBm dBm dBm dBm 400 400 MHz ≤ Fin ≤ 3000 MHz 3000 MHz < Fin ≤ 3500 MHz 400 MHz ≤ Fin ≤ 3000 MHz 3000 MHz < Fin ≤ 3500 MHz -10 0 -10 -15 Output Power (Pout) Document No. 70-0111-04 │ www.psemi.com ©2005-2008 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 8 PE3501 Product Specification Figure 3. Pin Configuration (Top View) 1 2 8 7 Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS™ device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 3. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. VDD GND FIN FOUT 3501 DEC 3 4 6 5 NC GND GND Table 2. Pin Descriptions Pin No. 1 2 3 Pin Name VDD Fin DEC Description Power supply pin. Bypassing is required. Input signal pin. DC blocking capacitor required (15 pF typical) Power supply decoupling pin. Place a capacitor as close as possible and connect directly to the ground plane. Ground pin. Ground pattern on the board should be as wide as possible to reduce ground impedance. Ground pin. No Connection. This pin should be left open. Divided frequency output pin. DC blocking capacitor required (47 pF typical) Ground pin. Device Functional Considerations The PE3501 divides a 400 MHz to 3500 MHz input signal by two, producing a 200 MHz to 1750 MHz output signal. To work properly, pin 3 must be supplied with a bypass capacitor to ground. In addition, the input and output signals (pins 2 & 7) must be AC coupled via an external capacitor, as shown in the test circuit in Figure 4. The ground pattern on the board should be made as wide as possible to minimize ground impedance. See Figure 11 for a layout example. 4 5 6 7 8 GND GND NC Fout GND Table 3. Absolute Maximum Ratings Symbol VDD Pin TST TOP VESD Parameter/Conditions Supply voltage Input Power Storage temperature range Operating temperature range ESD voltage (Human Body Model) Min Max 4.0 15 Units V dBm °C °C V -65 -40 150 85 250 Exceeding absolute maximum ratings may cause permanent damage. Operation should be restricted to the limits in the Operating Ranges table. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. ©2005-2008 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 8 Document No. 70-0111-04 │ UltraCMOS™ RFIC Solutions PE3501 Product Specification Figure 4. Test Circuit Block Diagram VDD 3 V +/ 0.15 V - 10 pF 1000 pF 1 8 50 Ω 2 15 pF 3 7 50 Ω PE3501 6 5 N/C 4 47 pF Spectrum Analyzer Signal Generator 10 nF 10 pF Figure 5. High Frequency System Application The wideband frequency of operation of the PE3501 makes it an ideal part for use in a DBS down-converter system. INPUT FROM DBS 1ST IF BPF SA W AGC FM DEMOD BASEBAND OUTPUT DIVIDE-BY-2 PE3236 PE3501 LOW NOISE PLL SYNTH LPF Document No. 70-0111-04 │ www.psemi.com ©2005-2008 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 8 PE3501 Product Specification Typical Performance Data Figure 6. Input Sensitivity 5 0 -5 Input Sensitivity (dBm) +25C -10 -40C -15 -20 -25 -30 -35 500 1000 1500 2000 2500 3000 3500 4000 +85C Frequency (MHz) Figure 7. Output Power 10 5 Output Power (dBm) -40C +25C 0 +85C -5 -10 -15 500 1000 1500 2000 2500 3000 3500 4000 Frequency (MHz) ©2005-2008 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 8 Document No. 70-0111-04 │ UltraCMOS™ RFIC Solutions PE3501 Product Specification Table 4. S11 Input Freq (GHz) S11 Magnitude (dB) 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 -0.5523 -0.6707 -0.806 -0.9642 -1.109 -1.1263 -1.152 -1.1703 -1.2353 -1.4078 -1.6207 -1.8965 -2.1032 -1.9731 -1.8229 -1.8517 -2.0308 -2.1353 -2.2884 -2.397 -2.4811 -2.5498 -2.6367 -2.655 -2.7216 -2.691 -2.6813 -2.6933 -2.6638 -2.6461 -2.6266 -2.5917 Table 5. S22 S11 Angle (deg) -9.337 -11.253 -13.193 -14.8 -15.929 -17.103 -18.594 -20.722 -22.915 -25.66 -28.199 -30.249 -31.079 -32.514 -36.258 -40.604 -44.918 -48.91 -53.156 -56.979 -61.184 -64.955 -68.656 -72.265 -75.379 -78.326 -80.734 -82.87 -84.784 -86.468 -87.788 -89.118 Output Freq (GHz) 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 1.25 1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70 1.75 S22 Magnitude (dB) S22 Angle (deg) -8.7615 -8.2705 -7.7885 -7.6058 -7.7922 -8.2309 -8.5583 -8.8751 -8.8599 -9.1496 -8.8648 -9.0828 -9.2022 -9.2727 -9.6494 -9.4383 -9.5217 -9.6043 -9.7282 -9.8069 -9.8221 -9.8694 -9.8693 -9.8667 -9.8509 -9.9141 -9.7063 -9.8686 -9.4836 -9.4498 -9.3233 -9.2206 26.726 21.393 16.647 10.297 6.2004 2.4335 -0.3158 -0.2458 -3.0515 -2.6752 -6.0631 -5.7925 -6.8019 -9.3617 -12.806 -14.454 -16.286 -19.118 -23.597 -25.461 -29.038 -32.629 -34.669 -40.785 -43.139 -46.745 -51.695 -54.805 -56.589 -62.744 -66.237 -66.07 Figure 8. S11 vs. Input Frequency (VDD = 3 V) Figure 9. S22 vs. Output Frequency (VDD = 3 V) S(1,1) Freq (400.0MHz Document No. 70-0111-04 │ www.psemi.com S(2,2) Freq (200.0MHz ©2005-2008 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 8 PE3501 Product Specification Evaluation Kit Evaluation Kit Operation The TSSOP Prescaler Evaluation Board was designed to help customers evaluate the PE3501 Divide-by-2 Prescaler. On this board, the device input (pin 2) is connected to connector J1 through a 50 Ω transmission line. A series capacitor (C1) provides the necessary DC block for the device input. It is important to note that the value of this capacitance will impact the performance of the device. A value of 15 pF was found to be optimal for this board layout; other applications may require a different value. The device output (pin 7) is connected to connector J3 through a 50 Ω transmission line. A series capacitor (C2) provides the necessary DC block for the device output. Note that this capacitor must be chosen to have a low impedance at the desired output frequency the device. The value of 47 pF was chosen to provide a wide operating range for the evaluation board. The board is constructed of a two-layer FR4 material with a total thickness of 0.031”. The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide above ground plane model with trace width of 0.030”, trace gaps of 0.007”, dielectric thickness of 0.028”, metal thickness of 0.0014” and εr of 4.4. Note that the predominate mode for these transmission lines is coplanar waveguide. J2 provides DC power to the device. Starting from the lower left pin, the second pin to the right (J2-3) is connected to the device VDD pin (1). Two decoupling capacitors (10 pF, 1000 pF) are included on this trace. It is the responsibility of the customer to determine proper supply decoupling for their design application. The DEC pin (3) must be connected to a low impedance AC ground for proper device operation. On the board, two decoupling capacitors (C6 = 10 nF, C4 = 10 pF), located on the back of the board, perform this function. Applications Support If you have a problem with your evaluation kit or if you have applications questions, please contact applications support: E-Mail: help@psemi.com (fastest response) Phone: (858) 731-9400 Figure 10. Evaluation Board Layouts Peregrine Specification 101/0035 Figure 11. Evaluation Board Schematic Peregrine Specification 102/0013 ©2005-2008 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 8 Document No. 70-0111-04 │ UltraCMOS™ RFIC Solutions PE3501 Product Specification Figure 12. Package Drawing 8-lead TSSOP TOP VIEW 0.65BS C 8 7 6 5 3.20 2 X Ø1.00±0.1 0 1.0 0 4.40±0.1 0 -B1 2 3 4 0.32 5 .20 C B A 1.0 0 -A- 3.00±0.1 0 0.90±0.0 5 1.10 MAX -C0.10±0.0 5 0.10 C 0.10 0.30 MAX CBA 6.4 0 SIDE VIEW FRONT VIEW Document No. 70-0111-04 │ www.psemi.com ©2005-2008 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 8 PE3501 Product Specification Figure 13. Tape and Reel Specification Table 4. Ordering Information Order Code 3501-51 3501-52 3501-00 Part Marking PE3501 PE3501 PE3501-EK Description PE3501-08TSSOP-100A PE3501-08TSSOP-2000C PE3501-08TSSOP-EK Package 8-lead TSSOP 8-lead TSSOP Evaluation Board Shipping Method Tape or loose 2000 units / T&R 1 / Box Document No. 70-0111-04 │ www.psemi.com ©2005-2008 Peregrine Semiconductor Corp. All rights reserved. Page 8 of 8 PE3501 Product Specification Sales Offices The Americas Peregrine Semiconductor Corp. 9380 Carroll Park Drive San Diego, CA 92121 Tel 858-731-9400 Fax 858-731-9499 North Asia Pacific Peregrine Semiconductor K.K. 5A-5, 5F Imperial Tower 1-1-1 Uchisaiwaicho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3501-5211 Fax: +81-3-3501-5213 Europe Peregrine Semiconductor Europe Commercial Products: Bâtiment Maine 13-15 rue des Quatre Vents F- 92380 Garches, France Tel: +33-1-47-41-91-73 Fax : +33-1-47-41-91-73 Space and Defense Products: 180 Rue Jean de Guiramand 13852 Aix-En-Provence cedex 3, France Tel: +33(0) 4 4239 3361 Fax: +33(0) 4 4239 7227 South Asia Pacific Peregrine Semiconductor 28G, Times Square, No. 500 Zhangyang Road, Shanghai, 200122, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS is a trademark of Peregrine Semiconductor Corp. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). ©2005-2008 Peregrine Semiconductor Corp. All rights reserved. Page 9 of 8 Document No. 70-0111-04 │ UltraCMOS™ RFIC Solutions