PE4140

Product Specification PE4140 Product Description The PE4140 is an ultra-high linearity passive broadband Quad MOSFET array with high dynamic range performance capable of operation beyond 6.0 GHz. This quad array operates with differential signals at all ports (RF, LO, IF), allowing mixers to be built that use LO powers from -7 dBm to +20 dBm. Typical applications range from frequency up/down-conversion to phase detection for Cellular/PCS Base Stations, Wireless Broadband Communications and STB/Cable modems. The PE4140 is manufactured on Peregrine’s UltraCMOS™ process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. Ultra-High Linearity UltraCMOS™ Broadband Quad MOSFET Array Features • Ultimate Quad MOSFET array • Ultra-high linearity, broadband performance beyond 6.0 GHz • Ideal for mixer applications • Up/down conversion • Low conversion loss • High LO Isolation • Packaged in small 6-lead 3x3 mm DFN Figure 1. Functional Diagram Figure 2. Package Type 6-lead DFN LO IF RF Table 1. AC and DC Electrical Specifications @ +25 °C Symbol FTYP VDS VDS Match VT R DS Characteristics Operating Frequency Range Drain-Source Voltage Drain-Source Voltage Match Threshold Voltage Drain-Source ‘ON’ Resistance 1 Test Conditions Min DC Typ Max 6.0 Units GHz mV mV mV VGS = +3V, IDS = 40 mA 260 320 12 380 40 VDS = 0.1V; per ASTM F617-00 VGS = +3V, IDS = 40 mA 6.5 -100 7.75 9.5 Ω Note 1: Typical untested operating frequency range of Quad MOSFET transistors. Document No. 70-0089-05 │ www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 10 PE4140 Product Specification Figure 3. Pin Configuration (Top View) Electrostatic Discharge (ESD) Precautions This MOSFET device has minimally protected inputs and is highly susceptible to ESD damage. When handling this UltraCMOS™ device, observe the same precautions that you would use with other ESD-sensitive devices. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. Device Description IF1 RF1 RF2 1 2 3 Exposed Solder Pad (bottom side) 6 5 4 IF2 LO1 LO2 Table 2. Pin Descriptions Pin No. 1 2 3 4 5 6 Pin Name IF1 RF1 RF2 LO2 LO1 IF2 Description IF Output Connection (Drain) RF Input Connection (Source) RF Input Connection (Source) LO Input Connection (Gate) LO Input Connection (Gate) IF Output Connection (Drain) The PE4140 passive broadband Quad MOSFET array is designed for use in up-conversion and down-conversion applications for high performance systems such as cellular infrastructure equipment and STB/CATV systems. The PE4140 is an ideal mixer core for a wide range of mixer products, including module level solutions that incorporate baluns or other singleended matching structures enabling three-port operation. The performance level of this passive mixer is made possible by the very high linearity afforded by Peregrine’s UltraCMOS™ process. Units °C °C Table 3. Absolute Maximum Ratings Symbol TST TOP VDC + AC Parameters/ Conditions Storage temperature range Operating temperature range Maximum DC plus peak AC voltage across DrainSource Maximum DC plus peak AC voltage across GateDrain or Gate-Source ESD Sensitive Device Min -65 -40 Max 150 85 Marking Packaged devices are marked with part number “4140”, date code and lot code. ±3.3 V VDC+AC VESD ±4.2 250 V V Absolute Maximum Ratings are those values listed in the above table. Exceeding these values may cause permanent device damage. Functional operation should be restricted to the limits in the DC Electrical Specifications table. Exposure to absolute maximum ratings for extended periods may affect device reliability. ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 10 Document No. 70-0089-05 │ UltraCMOS™ RFIC Solutions PE4140 Product Specification Evaluation Kit Figure 4. Evaluation Board Layout Peregrine Specification 101/0090 Applications Support If you have a problem with your evaluation kit or if you have applications questions, please contact applications support: E-Mail: help@psemi.com (fastest response) Phone: (858) 731-9400 Figure 5. Evaluation Board Schematic Peregrine Specification 102/0115 Note: This is the complete evaluation board schematic; which can be used for multiple configurations. Not all components need be populated. Refer to 'typical schematics' on following pages. Document No. 70-0089-05 │ www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 10 PE4140 Product Specification Figure 6. Typical Schematic for a PCS Application J3 LO Input T1 M/A Com ETC1.6-4-2-3 4 5 3 2 1 R2 1.2 nH R3 2.7 nH 4 5 PE4140 6 R8 2.7 nH 2 3 4 1 3 2 1 T2 M/A Com ETC1.6-4-2-3 1 5 2 3 4 R16 3 pF J4 RF Input R12 1.2 nH 5 T3 TOKO 617DB-1024 J6 IF Out Table 4. Typical Performance in a PCS Application @ +25 °C Parameter Frequency Range** LO RF IF Conversion Loss** (Includes balun losses) Isolation** LO-RF LO-IF Input IP3** Input 1 dB Compression** 36 26 32 22 dB dB dBm dBm 1630 1700 --70 8.5 2130 2200 MHz MHz MHz dB Minimum Typical Maximum Units ** Data taken on an Evaluation Board narrow-band tuned to cover the PCS band, IF = 73MHz low-side, LO drive = 17dBm. ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 10 Document No. 70-0089-05 │ UltraCMOS™ RFIC Solutions PE4140 Product Specification Typical Performance Plots in a PCS Application @ +25 °C (LO=17 dBm, IF=73 MHz Low-side) Figure 7. IIP3 vs. Frequency Figure 8. Conversion Loss vs. Frequency 40 35 30 IIP3 (dBm) @ 17dBm Lo 25 20 15 10 5 0 1700 Conversion Loss (dB) @ 17dBm Lo IF=73Mhz Low-side 10 9 8 Conversion Loss 7 6 1750 1800 1850 1900 1950 2000 2050 2100 5 1700 1750 1800 1850 1900 1950 2000 2050 2100 Frequency (MHz) Frequency (MHz) Figure 9. LO-RF & LO-IF Isolation 0 -5 -10 -15 -20 -25 LO-RF -30 -35 -40 1700 LO-IF Isolation (dB) 1750 1800 1850 1900 1950 2000 2050 2100 Frequency (MHz) Document No. 70-0089-05 │ www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 10 PE4140 Product Specification Figure 10. Typical Schematic for a CATV Application (Reference Designators Refer to locations on Evaluation Board: 101/0090) 4.7nH L1 U1 4 5 6 MLP6-3X3 L2 4.7nH 3 2 1 ETC1.6-4-2-3 T 2 1 5 2 RF Input 3 4 R16 3.0pF 1 J3 LO Input 1 ETC1.6-4-2-3 4 T1 3 2 5 1 J4 3 2 1 (Cut short between pads) 4 5 T3 ETC1-1-13 1 J6 IF Out Note: L1 and L2 provide LO port matching for optimum performance. Typical gate capacitance is approximately 2.5 pF. Table 5. Typical Performance in a CATV Application @ +25 °C Parameter Frequency Range** LO RF IF Conversion Loss** (Includes balun losses) Isolation** LO-RF LO-IF Input IP3** Input 1 dB Compression** 1116 54 --1062 6.5 1926 864 MHz MHz MHz dB Minimum Typical Maximum Units 40 28 23 13 dB dB dBm dBm ** Data taken on an Evaluation Board tuned for a broadband CATV application, IF = 1062 MHz, RF drive = -5 dBm, LO drive = 10 dBm. ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 10 Document No. 70-0089-05 │ UltraCMOS™ RFIC Solutions PE4140 Product Specification Typical Performance Plots in a CATV Application @ +25 °C Figure 11. IIP3 vs. Frequency Figure 12. Conversion Loss vs. Frequency 30 10 25 Conversion Loss (dB) @10dBm LO 8 IIP3 (dBm) @10dBm LO 20 6 15 4 10 5 2 0 0 200 400 600 800 1000 0 0 200 400 600 800 1000 Frequency (MHz) Frequency (MHz) Figure 13. LO-RF & LO-IF Isolation 0 -10 -20 Isolation (dB) LO-IF -30 -40 -50 LO-RF -60 1000 1200 1400 1600 1800 2000 Frequency (MHz) Document No. 70-0089-05 │ www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 10 PE4140 Product Specification Figure 14. Package Drawing 6-lead DFN 3.00 C L -A-B4 6 0.125 5 C L PIN MAR 1 K 0.10 C 1 4 0.10 C 2 3 3.00 4 0.125 10°+2° -10° 0.100 C TOP VIEW DETAIL C 0.025 ±0.025 0.90 ±0.10 0.080 C 3 0.025±0.025 SIDE VIEW SEE DETAIL B 0.70 ± 0.05 0.20 ±0.05 SEATING PLANE -CDETAIL B C L 0.95 EXPOSED PAD 1 2 3 0.35 +0.08 -0.02 0.10 0.05 C 0.17 MIN. CAB 0.29 +0.21 -0.08 EXPOSED SLUG/ HEAT SINK 0.24 +0.20 -0.08 0.125 0.17 0.30 SEE DETAIL A R 0.15 TYP R0.127 TYP 1.21 ±0.10 0.605 ±0.05 THIS FEATURE APPLIES TO BOTH ENDS OF THE PKG. DETAIL A EXPOSED METALIZED FEATURE EDGE OF PLASTIC BODY EXPOSED (2X) 6 5 4 3 1.05±0.05 2.01±0.10 .20 MIN. BOTTOM VIEW 1. DIMENSIONS AND TOLERANCES ARE PER ANSi Y14.5 2. DIMENSIONS ARE IN MILLIMETERS, ANGLES ARE IN DEGREES. 3 4 COPLANARITY APPLIES TO EXPOSED HEAT SLUG AS WELL AS THE TERMINALS. PROFILE TOLERANCE APPLIES TO PLASTIC BODY ONLY. ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 8 of 10 Document No. 70-0089-05 │ UltraCMOS™ RFIC Solutions PE4140 Product Specification Figure 15. Tape and Reel Specifications 6-lead DFN Table 6. Dimensions Dimension Ao Bo Ko P W T R7 Quantity R13 Quantity DFN 3x3 mm 3.23 ± 0.1 3.17 ± 0.1 1.37 ± 0.1 4 ± 0.1 8 +0.3, -0.1 0.254 ± 0.02 3000 N.A. Note: R7 = 7 inch Lock Reel, R13 = 13 inch Lock Reel Table 7. Ordering Information Order Code 4140-01 4140-02 4140-00 4140-51 4140-52 Part Marking 4140 4140 PE4140-EK 4140 4140 Description PE4140-06DFN 3x3mm-12800F PE4140-06DFN 3x3mm-3000C PE4140-06DFN 3x3mm-EK PE4140G-06DFN 3x3mm-12800F PE4140G-06DFN 3x3mm-3000C Package 6-lead 3x3 mm DFN 6-lead 3x3 mm DFN Evaluation Kit Green 6-lead 3x3 mm DFN Green 6-lead 3x3 mm DFN Shipping Method 12800 units / Canister 3000 units / T&R 1 / Box 12800 units / Canister 3000 units / T&R Document No. 70-0089-05 │ www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 9 of 10 PE4140 Product Specification Sales Offices The Americas Peregrine Semiconductor Corp. 9450 Carroll Park Drive San Diego, CA 92121 Tel 858-731-9400 Fax 858-731-9499 North Asia Pacific Peregrine Semiconductor K.K. 5A-5, 5F Imperial Tower 1-1-1 Uchisaiwaicho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Europe Peregrine Semiconductor Europe Commercial Products: Bâtiment Maine 13-15 rue des Quatre Vents F- 92380 Garches, France Tel: +33-1-47-41-91-73 Fax : +33-1-47-41-91-73 Space and Defense Products: 180 Rue Jean de Guiramand 13852 Aix-En-Provence cedex 3, France Tel: +33(0) 4 4239 3361 Fax: +33(0) 4 4239 7227 South Asia Pacific Peregrine Semiconductor 28G, Times Square, No. 500 Zhangyang Road, Shanghai, 200122, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS is a trademark of Peregrine Semiconductor Corp. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 10 of 10 Document No. 70-0089-05 │ UltraCMOS™ RFIC Solutions