PE4152
Document Category: Product Specification
UltraCMOS® Quad MOSFET Mixer
Features
Figure 1 • PE4152 Functional Diagram
• Quad MOSFET array with integrated LO enable
and bypass mode
VDD
RF
• Ultra high linearity in both LO modes
▪ LO enable: 25 dBm IIP3, 52 dBm IIP2
▪ LO bypass: 24 dBm IIP3, 46 dBm IIP2
• High isolation in both LO modes
▪ LO enable: 30/30 dB LO–RF/IF
▪ LO bypass: 60/58 dB LO–RF/IF
LO
• Low conversion loss in both LO modes
• Packaging – 20-lead 4 × 4 × 0.85 mm QFN
Applications
• Land-mobile-radio (LMR)
GND
▪ Portable radio
EN
MixBias
IF
(optional)
▪ Mobile radio
• Cellular infrastructure
• Set-top box (STB)/CATV systems
Product Description
The PE4152 is a high linearity quad metal-oxide-semiconductor field-effect transistor (MOSFET) mixer with an
integrated local oscillator (LO) amplifier. The LO amplifier allows for LO input drive levels of less than 0 dBm to
produce third-order intercept point (IIP3) values similar to a quad MOSFET array driven with a 15 dBm LO drive.
The PE4152 operates with differential signals at the radio frequency (RF) and intermediate frequency (IF) ports
and the integrated LO buffer amplifier drives the mixer core. It can be used as an upconverter or a downconverter.
The PE4152 also offers an integrated LO amplifier bypass option providing additional flexibility for low power or
increased linearity operation. The bypassed LO amplifier allows superior LO to RF and LO to IF isolation levels
relative to the enabled mode.
The PE4152 is manufactured on Peregrine’s UltraCMOS® process, a patented variation of silicon-on-insulator
(SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of
conventional CMOS.
©2015–2016, Peregrine Semiconductor Corporation. All rights reserved. • Headquarters: 9380 Carroll Park Drive, San Diego, CA, 92121
Product Specification
DOC-64061-4 – (04/2016)
www.psemi.com
PE4152
Quad MOSFET Mixer
Absolute Maximum Ratings
Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be
restricted to the limits in Table 2. Operation between operating range maximum and absolute maximum for
extended periods may reduce reliability.
ESD Precautions
When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices.
Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to
avoid exceeding the rating specified in Table 1.
Latch-up Immunity
Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up.
Table 1 • Absolute Maximum Ratings for PE4152
Parameter/Condition
Min
Max
Unit
Supply voltage, VDD
4.0
V
Maximum DC plus peak AC across drain-source
±3.3
V
Maximum DC current across drain-source
6
mA
Maximum AC current across drain-source
36
mAP-P
+150
°C
Operating junction temperature
+125
°C
ESD voltage HBM, all pins(*)
1000
V
Storage temperature range
–65
Note: * Human body model (MIL-STD 883 Method 3015).
Recommended Operating Conditions
Table 2 lists the recommended operating conditions for the PE4152. Devices should not be operated outside the
recommended operating conditions listed below.
Table 2 • Recommended Operating Conditions for PE4152
Parameter
Min
Typ
Max
Unit
Supply voltage, VDD
2.9
3.1
V
Operating temperature range
–40
+85
°C
LO input power (LO enable)
–10
–6
dBm
LO input power (LO bypass)
23
dBm
RF input power (LO enable)
2
dBm
RF input power (LO bypass)
2
dBm
Page 2
DOC-64061-4 – (04/2016)
www.psemi.com
PE4152
Quad MOSFET Mixer
Electrical Specifications
Table 3 and Table 4 provide the PE4152 key electrical specifications @ +25 °C, VDD = 3.0V, unless otherwise
specified.
Table 3 • PE4152 Electrical Specifications—LO Enable Mode
Parameter
Condition
Min
Typ
Max
Unit
9.5
16
mA
20
µA
LO enable mode
Current drain
A function of frequency
Off state leakage current
RF input frequency
VHF band
UHF1 band
UHF2 band
700 MHz
800 MHz
900 MHz
136
380
450
764
851
935
174
470
520
776
870
941
MHz
MHz
MHz
MHz
MHz
MHz
LO frequency
VHF band
UHF1 band
UHF2 band
700 MHz
800 MHz
900 MHz
245.65
270.35
340.35
873.65
741.35
825.35
283.65
360.35
410.35
885.65
760.35
831.35
MHz
MHz
MHz
MHz
MHz
MHz
IF output frequency
109.65
LO input power
–10
RF input power
Conversion loss(1)
VHF, UHF1, UHF2
700, 800 and 900 MHz
6.5
7.3
Input IP3(2)
MHz
–6
dBm
2
dBm
7.0
8.25
dB
dB
20.5
25
dBm
Input IP2(3)
VHF, UHF1, UHF2
700, 800 and 900 MHz
45
40
52
50
dBm
dBm
RF to IF isolation(4)
VHF, UHF1, UHF2
700, 800 and 900 MHz
35
35
45
45
dB
dB
LO to IF isolation
18.5
22
dB
LO to RF isolation
26
30
dB
Notes:
1) Measured with a 1:1 balun on the RF and IF ports.
2) Measured with two tones at 2 dBm, 100 kHz spacing.
3) Measured with half-IF method.
4) Measured with an input frequency equal with IF.
DOC-64061-4 – (04/2016)
Page 3
www.psemi.com
PE4152
Quad MOSFET Mixer
Table 4 • PE4152 Electrical Specifications—LO Bypass Mode
Parameter
Condition
Min
Typ
Max
Unit
LO bypass mode
Off state leakage current
20
µA
RF input frequency
VHF band
UHF1 band
UHF2 band
700 MHz
800 MHz
900 MHz
136
380
450
764
851
935
174
470
520
776
870
941
MHz
MHz
MHz
MHz
MHz
MHz
LO frequency
VHF band
UHF1 band
UHF2 band
700 MHz
800 MHz
900 MHz
245.65
270.35
340.35
873.65
741.35
825.35
283.65
360.35
410.35
885.65
760.35
831.35
MHz
MHz
MHz
MHz
MHz
MHz
IF output frequency
109.65
MHz
LO input power
23
dBm
RF input power
2
dBm
8.0
8.7
dB
dB
Conversion loss(1)
VHF, UHF1, UHF2
700, 800 and 900 MHz
Input IP3(2)
VHF, UHF1, UHF2
700, 800 and 900 MHz
Input IP2(3)
RF to IF isolation(4)
6.5
7.5
24
19
26
24
dBm
dBm
VHF, UHF1, UHF2
700, 800 and 900 MHz
46
46
dBm
dBm
VHF, UHF1, UHF2
700, 800 and 900 MHz
38
38
dB
dB
LO to IF isolation
30
58
dB
LO to RF isolation
35
60
dB
Notes:
1) Measured with a 1:1 balun on the RF and IF ports.
2) Measured with two tones at 2 dBm, 100 kHz spacing.
3) Measured with half-IF method.
4) Measured with an input frequency equal with IF.
Page 4
DOC-64061-4 – (04/2016)
www.psemi.com
PE4152
Quad MOSFET Mixer
Typical Performance Data
Figure 2–Figure 23 show the typical performance data @ +25 °C, VDD = 3.0V, unless otherwise specified.
Figure 2 • Conversion Loss vs LO Power (LO Enable)
LO Power = -10 dBm
LO Power = -6 dBm
10
9
8
Loss [dB]
7
6
5
4
3
2
1
0
100
200
300
400
500
600
700
800
900
800
900
1000
RF Frequency [MHz]
Figure 3 • Conversion Loss vs VDD (LO Enable)
VDD = 2.9V
VDD = 3V
VDD = 3.1V
10
9
8
Loss [dB]
7
6
5
4
3
2
1
0
100
200
300
400
500
600
700
1000
RF Frequency [MHz]
DOC-64061-4 – (04/2016)
Page 5
www.psemi.com
PE4152
Quad MOSFET Mixer
Figure 4 • Conversion Loss vs Temperature (LO Enable)
-40 °C
+25 °C
+85 °C
10
9
8
Loss [dB]
7
6
5
4
3
2
1
0
100
200
300
400
500
600
700
800
900
1000
800
900
1000
RF Frequency [MHz]
Figure 5 • Conversion Loss vs LO Power (LO Bypass Enable)
LO Power = 20 dBm
LO Power = 23 dBm
9
8
7
Loss [dB]
6
5
4
3
2
1
0
100
200
300
400
500
600
700
RF Frequency [MHz]
Page 6
DOC-64061-4 – (04/2016)
www.psemi.com
PE4152
Quad MOSFET Mixer
Figure 6 • Conversion Loss vs VDD (LO Bypass Enable)
VDD = 2.9V
VDD = 3V
VDD = 3.1V
9
8
7
Loss [dB]
6
5
4
3
2
1
0
100
200
300
400
500
600
700
800
900
1000
800
900
1000
RF Frequency [MHz]
Figure 7 • Conversion Loss vs Temperature (LO Bypass Enable)
-40 °C
25 °C
85 °C
9
8
7
Loss [dB]
6
5
4
3
2
1
0
100
200
300
400
500
600
700
RF Frequency [MHz]
DOC-64061-4 – (04/2016)
Page 7
www.psemi.com
PE4152
Quad MOSFET Mixer
Figure 8 • IIP2 / IIP3 vs LO Power (LO Bypass)
IIP2 w/ LO Power = 20 dBm
IIP2 w/ LO Power = 23 dBm
IIP3 w/ LO Power = 20 dBm
IIP3 w/ LO Power = 23 dBm
70
IIP2 / IIP3 [dBm]
60
50
40
30
20
10
0
100
200
300
400
500
600
700
800
900
1000
900
1000
RF Frequency [MHz]
Figure 9 • IIP2 / IIP3 vs Temperature (LO Bypass)
IIP2 @ -40 °C
IIP2 @ +25 °C
IIP2 @ +85 °C
IIP3 @ -40 °C
IIP3 @ +25 °C
IIP3 @ +85 °C
70
IIP2 / IIP3 [dBm]
60
50
40
30
20
10
0
100
200
300
400
500
600
700
800
RF Frequency [MHz]
Page 8
DOC-64061-4 – (04/2016)
www.psemi.com
PE4152
Quad MOSFET Mixer
Figure 10 • IIP2 / IIP3 vs LO Power (LO Enable)
IIP2 w/ LO Power = -10 dBm
IIP2 w/ LO Power = -6 dBm
IIP3 w/ LO Power = -10 dBm
IIP3 w/ LO Power = -6 dBm
70
IIP2 / IIP3 [dBm]
60
50
40
30
20
10
0
100
200
300
400
500
600
700
800
900
1000
900
1000
RF Frequency [MHz]
Figure 11 • IIP2 / IIP3 vs Temperature (LO Enable)
IIP2 @ -40 °C
IIP2 @ +25 °C
IIP2 @ +85 °C
IIP3 @ -40 °C
IIP3 @ +25 °C
IIP3 @ +85 °C
70
IIP2 / IIP3 [dBm]
60
50
40
30
20
10
0
100
200
300
400
500
600
700
800
RF Frequency [MHz]
DOC-64061-4 – (04/2016)
Page 9
www.psemi.com
PE4152
Quad MOSFET Mixer
Figure 12 • LO–IF Isolation vs LO Power (LO Bypass)
LO Power = 20 dBm
LO Power = 23 dBm
80
70
Isolation [dB]
60
50
40
30
20
10
0
100
200
300
400
500
600
700
800
900
1000
800
900
1000
RF Frequency [MHz]
Figure 13 • LO–IF Isolation vs Temperature (LO Bypass)
-40 °C
25 °C
85 °C
80
70
Isolation [dB]
60
50
40
30
20
10
0
100
200
300
400
500
600
700
RF Frequency [MHz]
Page 10
DOC-64061-4 – (04/2016)
www.psemi.com
PE4152
Quad MOSFET Mixer
Figure 14 • LO–IF Isolation vs LO Power (LO Enable)
LO Power = -10 dBm
LO Power = -6 dBm
45
40
Isolation [dB]
35
30
25
20
15
10
5
0
100
200
300
400
500
600
700
800
900
1000
800
900
1000
RF Frequency [MHz]
Figure 15 • LO–IF Isolation vs Temperature (LO Enable)
-40 °C
+25 °C
+85 °C
45
40
Isolation [dB]
35
30
25
20
15
10
5
0
100
200
300
400
500
600
700
RF Frequency [MHz]
DOC-64061-4 – (04/2016)
Page 11
www.psemi.com
PE4152
Quad MOSFET Mixer
Figure 16 • LO–RF Isolation vs LO Power (LO Bypass)
LO Power = 20 dBm
LO Power = 23 dBm
90
80
Isolation [dB]
70
60
50
40
30
20
10
0
100
200
300
400
500
600
700
800
900
1000
800
900
1000
RF Frequency [MHz]
Figure 17 • LO–RF Isolation vs Temperature (LO Bypass)
-40 °C
+25 °C
+85 °C
90
80
Isolation [dB]
70
60
50
40
30
20
10
0
100
200
300
400
500
600
700
RF Frequency [MHz]
Page 12
DOC-64061-4 – (04/2016)
www.psemi.com
PE4152
Quad MOSFET Mixer
Figure 18 • LO–RF Isolation vs LO Power (LO Enable)
LO Power = -10 dBm
LO Power = -6 dBm
60
Isolation [dB]
50
40
30
20
10
0
100
200
300
400
500
600
700
800
900
1000
800
900
1000
RF Frequency [MHz]
Figure 19 • LO–RF Isolation vs Temperature (LO Enable)
-40 °C
+25 °C
+85 °C
60
Isolation [dB]
50
40
30
20
10
0
100
200
300
400
500
600
700
RF Frequency [MHz]
DOC-64061-4 – (04/2016)
Page 13
www.psemi.com
PE4152
Quad MOSFET Mixer
Figure 20 • RF–IF Isolation vs LO Power (LO Bypass)
LO Power = 20 dBm
LO Power = 23 dBm
60
Isolation [dB]
50
40
30
20
10
0
100
200
300
400
500
600
700
800
900
1000
800
900
1000
RF Frequency [MHz]
Figure 21 • RF–IF Isolation vs Temperature (LO Bypass)
-40 °C
25 °C
85 °C
60
Isolation [dB]
50
40
30
20
10
0
100
200
300
400
500
600
700
RF Frequency [MHz]
Page 14
DOC-64061-4 – (04/2016)
www.psemi.com
PE4152
Quad MOSFET Mixer
Figure 22 • RF–IF Isolation vs LO Power (LO Enable)
LO Power = -10 dBm
LO Power = -6 dBm
60
Isolation [dB]
50
40
30
20
10
0
100
200
300
400
500
600
700
800
900
1000
800
900
1000
RF Frequency [MHz]
Figure 23 • RF–IF Isolation vs Temperature (LO Enable)
-40 °C
+25 °C
+85 °C
60
Isolation [dB]
50
40
30
20
10
0
100
200
300
400
500
600
700
RF Frequency [MHz]
DOC-64061-4 – (04/2016)
Page 15
www.psemi.com
PE4152
Quad MOSFET Mixer
Evaluation Kit
The PE4152 evaluation board (EVB) was designed to ease customer evaluation of the PE4152 mixer. The EVB
is assembled with a PE4152 field-effect transistor (FET) mixer, baluns, headers and SubMiniature version A
(SMA) connectors.
VDD is applied to the device at J11. The LO bypass mode is selected by applying an active high signal to pin 6
via jumper J15 as show in Figure 24. The baluns have been selected to provide uniform amplitude and phase
balance across the 100 to 1000 MHz frequency range.
The PCB design should use proper RF layout techniques for best performance. The signal lines should have
50Ω impedence and the package ground (exposed paddle) should be connected directly to the ground plane.
Figure 24 • Evaluation Kit Layout for PE4152
Page 16
DOC-64061-4 – (04/2016)
www.psemi.com
PE4152
Quad MOSFET Mixer
Pin Information
Table 5 • Pin Descriptions for PE4152
This section provides pinout information for the
PE4152. Figure 25 shows the pin map of this device
for the available package. Table 5 provides a
description for each pin.
Positive LO output
NC
No connect
EN
LO enable (active low)
7, 18, 19
VDD
Supply voltage
8
IF_P
Positive IF port
10
IF_M
Minus IF port
12
RF_P
Positive RF input
13
RF_M
Minus RF port
NC
LO_P
4, 5, 16, 17
16
3
NC
Minus LO output
17
LO_M
VDD
2
18
Ground
VDD
GND
19
1, 9, 11, 14,
20
GND
Pin 1 Dot
Marking
Pin
Name
20
Figure 25 • Pin Configuration (Top View)
Pin No.
6
GND
1
15
MixBias
LO_M
2
14
GND
LO_P
3
13
RF_M
NC
4
12
RF_P
NC
5
11
GND
6
7
8
9
10
EN
VDD
IF_P
GND
IF_M
Exposed
Ground Pad
15
Pad
Description
MixBias(*) External mixer bias
GND
Exposed pad: ground for proper operation
Note: * For applications where the DC level of the RF and IF ports are
not at 0V, the MixBias pin can be set to the equivalent DC bias level. For
example, if the RF and IF signals are biased at 1 VDC, a 1V level can be
applied to the MixBias pin. This will maintain the RF performance similar
to the 0V case. The MixBias pin can be used in both LO states.
DOC-64061-4 – (04/2016)
Page 17
www.psemi.com
PE4152
Quad MOSFET Mixer
Packaging Information
This section provides packaging data including the moisture sensitivity level, package drawing, package
marking information and tape-and-reel information.
Moisture Sensitivity Level
The moisture sensitivity level rating for the PE4152 in the 20-lead 4 × 4 × 0.85 mm QFN package is MSL1.
Package Drawing
Figure 26 • Package Mechanical Drawing for 20-lead 4 × 4 × 0.85 mm QFN
0.10 C
A
4.00
(2X)
2.15±0.05
0.28
(x20)
0.55±0.05
(x20)
B
11
15
0.50
10
16
2.15±0.05
4.00
0.23±0.05
(x20)
0.10 C
6
4.40
1
0.18
2.00
Pin #1 Corner
0.18
TOP VIEW
2.20
20
5
(2X)
0.50
0.75
(x20)
BOTTOM VIEW
0.435 SQ
REF
2.20
4.40
RECOMMENDED LAND PATTERN
0.10 C
0.10
0.05
0.85±0.05
0.05 C
ALL FEATURES
SEATING PLANE
0.203
C A B
C
SIDE VIEW
0.05
C
Top-Marking Specification
Figure 27 • Package Marking Specifications for PE4152
4152
YYWW
ZZZZZZ
=
YY =
WW =
ZZZZZZ =
Pin 1 indicator
Last two digits of assembly year
Assembly work week
Assembly lot code (maximum six characters)
Page 18
DOC-64061-4 – (04/2016)
www.psemi.com
PE4152
Quad MOSFET Mixer
Tape and Reel Specification
Figure 28 • Tape and Reel Specifications for 20-lead 4 × 4 × 0.85 mm QFN
Direction of Feed
Section A-A
P1
P0
see
note 1
T
P2
see note 3
D1
D0
A
E
F
see note 3
B0
A0
K0
A
W0
Notes:
A0
B0
K0
D0
D1
E
F
P0
P1
P2
T
W0
3.30
3.30
1.10
1.50 + 0.1/ -0.0
1.5 min
1.75 ± 0.10
5.50 ± 0.05
4.00
8.00
2.00 ± 0.05
0.30 ± 0.05
12.00 ± 0.3
1. 10 Sprocket hole pitch cumulative tolerance ±0.2
2. Camber in compliance with EIA 481
3. Pocket position relative to sprocket hole measured
as true position of pocket, not pocket hole
Pin 1
Device Orientation in Tape
DOC-64061-4 – (04/2016)
Page 19
www.psemi.com
PE4152
Quad MOSFET Mixer
Ordering Information
Table 6 lists the available ordering codes for the PE4152 as well as available shipping methods.
Table 6 • Order Codes for PE4152
Order Codes
Description
Packaging
Shipping Method
PE4152A-Z
PE4152 mixer with integrated LO
Green 20-lead 4 × 4 mm QFN
3000 units / T&R
EK4152-02
PE4152 Evaluation kit
Evaluation kit
1 / Box
Document Categories
Advance Information
Product Brief
The product is in a formative or design stage. The datasheet contains
design target specifications for product development. Specifications
and features may change in any manner without notice.
This document contains a shortened version of the datasheet. For the
full datasheet, contact sales@psemi.com.
Preliminary Specification
Not Recommended for New Designs (NRND)
This product is in production but is not recommended for new designs.
The datasheet contains preliminary data. Additional data may be added
at a later date. Peregrine reserves the right to change specifications at
any time without notice in order to supply the best possible product.
Product Specification
The datasheet contains final data. In the event Peregrine decides to
change the specifications, Peregrine will notify customers of the
intended changes by issuing a CNF (Customer Notification Form).
End of Life (EOL)
This product is currently going through the EOL process. It has a
specific last-time buy date.
Obsolete
This product is discontinued. Orders are no longer accepted for this
product.
Sales Contact
For additional information, contact Sales at sales@psemi.com.
Disclaimers
The information in this document is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be
entirely at the user’s own risk. No patent rights or licenses to any circuits described in this document are implied or granted to any third party.
Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to
support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death
might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in
such applications.
Patent Statement
Peregrine products are protected under one or more of the following U.S. patents: patents.psemi.com
Copyright and Trademark
©2015–2016, Peregrine Semiconductor Corporation. All rights reserved. The Peregrine name, logo, UTSi and UltraCMOS are registered trademarks and HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp.
Product Specification
www.psemi.com
DOC-64061-4 – (04/2016)