PE42424A-Z

PE42424 Document Category: Product Specification UltraCMOS® SPDT RF Switch, 100 MHz–8.5 GHz Features Figure 1 • PE42424 Functional Diagram • 802.11 a/b/g/n/ac/ax, Wi-Fi 6E and ultra-wideband (UWB) support RFC ESD • Exceptional isolation ▪ 48 dB @ 2.4 GHz ▪ 35 dB @ 5.8 GHz RF 1 • Fast switching RF 2 ESD ESD ▪ 145 ns switching time ▪ 125 kHz switching rate • High power handling CMOS Control ▪ 39 dBm pulsed Driver and ESD ▪ 30 dBm CW • High linearity across supply range V1 ▪ IIP3 of 61 dBm DOC-02108 ▪ IIP2 of 125 dBm • 1.8V control logic compatible • 105 °C operating temperature • ESD performance ▪ 2500V HBM on RF pins to GND • Packaging – 6-lead 1.5 × 1.5 mm DFN Product Description The PE42424 is a HaRP™ technology-enhanced reflective 50Ω SPDT RF switch designed for use in high power and high performance WLAN 802.11 a/b/g/n/ac/ax and Wi-Fi 6E applications such as carrier and enterprise WiFi products and UWB applications supporting bandwidths up to 8.5 GHz. This switch features exceptional port-to-port isolation, fast switching speed, and high power handling, all in a compact 1.5 × 1.5 mm package. PE42424 also features high linearity that remains invariant over the full power supply range. In addition, this device has robust ESD and temperature performance and does not require blocking capacitors or any external matching components. The PE42424 is manufactured on pSemi’s UltraCMOS® process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate. pSemi’s HaRP technology enhancements deliver high linearity and excellent harmonics performance. It is an innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. ©2015–2020, pSemi Corporation. All rights reserved. • Headquarters: 9369 Carroll Park Drive, San Diego, CA, 92121 Product Specification DOC-44114-6 – (11/2020) www.psemi.com PE42424 UltraCMOS® SPDT RF Switch Absolute Maximum Ratings Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be restricted to the limits in Table 2. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. ESD Precautions When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 1. Latch-up Immunity Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up. Table 1 • Absolute Maximum Ratings for PE42424 Parameter/Condition Supply voltage Digital input (V1) Symbol Min Max Unit VDD –0.3 5.5 V VCTRL –0.3 3.6 V RF input power, 100–6000 MHz PMAX,ABS 41 dBm RF input power, 6000–8500 MHz PMAX,ABS 40 dBm 150 °C TST Storage temperature range –65 ESD voltage HBM(1) All pins RF pins to GND VESD,HBM 1000 2500 V V ESD voltage CDM, all pins(2) VESD,MM 1000 V Notes: 1) Human body model (MIL-STD 883 Method 3015) 2) Charged device model (JEDEC JESD22-C101) Page 2 of 14 DOC-44114-6 – (11/2020) www.psemi.com PE42424 UltraCMOS® SPDT RF Switch Recommended Operating Conditions Table 2 lists the recommending operating conditions for the PE42424. Devices should not be operated outside the operating conditions listed below. Table 2 • Recommended Operating Conditions for PE42424 Parameter Symbol Min Typ Max Unit Supply voltage VDD 2.3 3.3 5.5 V Supply current IDD 130(1) 200 300 µA µA Digital input high (V1) VIH 1.4 3.6 V Digital input low(V1) VIL –0.3 0.6 V RF input power, CW, 100-6000 MHz PMAX,CW 30 dBm RF input power, CW, 6000-8500 MHz PMAX,CW 29 dBm PMAX,PULSED 39 dBm PMAX,PULSED 38 dBm 105 °C RF input power, pulsed, 100-6000 MHz(3) RF input power, pulsed, 6000-8500 MHz(3) Operating temperature range TOP 200(2) –40 25 Notes: 1) VIH > 1.7V 2) 1.4V < VIH < 1.7V 3) Pulsed, 5% duty cycle of 4620 μs period, 50Ω DOC-44114-6 – (11/2020) Page 3 of 14 www.psemi.com PE42424 UltraCMOS® SPDT RF Switch Electrical Specifications Table 3 provides the PE42424 key electrical specifications @ 25°C, VDD = 3.3V, (ZL = ZS = 50Ω) unless otherwise specified, unless otherwise specified. Table 3 • PE42424 Electrical Specifications Parameter Symb ol Path Condition Operating frequency Insertion loss Isolation Return loss (common and active port) Min Typ 0.1 IL Max Unit 8.5 GHz 0.95 1.15 1.2 1.6 dB dB dB dB RFC-RFX 0.1–2.5 GHz 2.5–5.825 GHz 5.825–6.0 GHz 6.0-8.5 GHz RFC-RFX 0.1–2.5 GHz 2.5–5.825 GHz 5.825–6.0 GHz 6.0-8.5 GHz 45 33 33 27 47 35 34 29 dB dB dB dB RFX-RFX 0.1–2.5 GHz 2.5–5.825 GHz 5.825–6.0 GHz 6.0-8.5 GHz 37 29 29 24 39 30 30 26 dB dB dB dB 0.8 0.9 0.95 1.08 ISO RL RFX 0.1–6.0 GHz 6.0-8.5 GHz 21 21 dB dB P1dB RFC-RFX 6.0 GHz 6.0-8.5 GHz 41 40 dBm dBm 3rd Order Input Intercept Point(2) IIP3 RFC-RFX 1900 MHz 60 dBm 3rd harmonic 3fo RFC-RFX PIN = +30 dBm @ 1900 MHz 74 dBc 2nd Order Input Intercept Point(2) IIP2 RFC-RFX 1900 MHz 125 dBm 2nd harmonic 2fo RFC-RFX PIN = +30 dBm @ 1900 MHz 85 dBc Switching time TSW 50% CTRL to 90% or 10% of final value 145 Input 1dB compression point(1) 230 ns Notes: 1) The input P0.1dB compression point is a linearity figure of merit. Refer to Table 2 for the operating RF input power (50Ω). 2) The input intercept point remains invariant over the full supply range as defined in Table 3. Page 4 of 14 DOC-44114-6 – (11/2020) www.psemi.com PE42424 UltraCMOS® SPDT RF Switch Switching Capability The PE42424 has a maximum 125 kHz switching rate with the control pin input capacitance of 2 pF. Switching rate describes the time duration between switching events. Switching time is the time duration between the point the control signal reaches 50% of the final value and the point the output signal reaches within 10% or 90% of its target value. Spurious Performance Typical spurious performance of the PE42424 is –126 dBm. Control Logic Truth Table Table 4 provides the control logic truth table for the PE42424. Table 4 • Truth Table for PE42424 V1 RFC–RF1 RFC–RF2 0 OFF ON 1 ON OFF DOC-44114-6 – (11/2020) Page 5 of 14 www.psemi.com PE42424 UltraCMOS® SPDT RF Switch Typical Performance Data Figure 2–Figure 10 show the typical performance data @ 25 °C and VDD = 3.3V, unless otherwise specified. Figure 3 • Insertion Loss vs. Temp (RFC–RFX) 0 0 -0.5 -0.5 -1 -1 -1.5 -1.5 Insertion Loss [dB] Insertion Loss [dB] Figure 2 • Insertion Loss (RFC–RFX) -2 -2.5 -2 -2.5 -3 -3 -40 C -3.5 -3.5 RF1 +25 C +85 C RF2 +105 C -4 -4 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Frequency (GHz) 5.0 5.5 6.0 6.5 7.0 7.5 8.0 7.0 7.5 8.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Frequency (GHz) 5.0 5.5 6.0 6.5 7.0 7.5 8.0 Figure 4 • Insertion Loss vs. VDD (RFC–RFX) 0 -0.5 Insertion Loss [dB] -1 -1.5 -2 -2.5 -3 -3.5 2.2V 3.3V 5.5V -4 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Frequency (GHz) 5.0 5.5 6.0 6.5 Page 6 of 14 DOC-44114-6 – (11/2020) www.psemi.com PE42424 UltraCMOS® SPDT RF Switch Figure 5 • Return Loss vs. Temp (RFC–RFX) Figure 6 • Return Loss vs. VDD (RFC–RFX) 0 0 -40 C 2.2 V +25 C -5 +85 C 3.3 V -5 +105 C 5.5 V -10 -15 Return Loss [dB] Return Loss [dB] -10 -20 -25 -30 -20 -25 -30 -35 -35 -40 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Frequency (GHz) 5.0 5.5 6.0 6.5 7.0 7.5 -40 8.0 Figure 7 • Isolation vs. Temp (RFC–RFX) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Frequency (GHz) 5.0 5.5 6.0 6.5 7.0 7.5 8.0 7.5 8.0 Figure 8 • Isolation vs. VDD (RFC–RFX) 0 0 -10 -10 -20 -20 -30 -30 Isolation [dB] Isolation [dB] -15 -40 -50 -60 -40 -50 -60 -70 -70 -40 C 2.2V +25 C -80 3.3V -80 +85 C 5.5V +105 C -90 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Frequency (GHz) 5.0 5.5 6.0 6.5 7.0 7.5 -90 8.0 0.0 DOC-44114-6 – (11/2020) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Frequency (GHz) 5.0 5.5 6.0 6.5 7.0 Page 7 of 14 www.psemi.com PE42424 UltraCMOS® SPDT RF Switch Figure 10 • Figure 12. Isolation vs. VDD (RFX–RFX) 0 0 -10 -10 -20 -20 -30 -30 Isolation [dB] Isolation [dB] Figure 9 • Isolation vs. Temp (RFX–RFX) -40 -50 -60 -40 -50 -60 -70 -70 -40 C 2.2 V +25 C -80 -80 3.3 V +85 C 5.5 V +105 C -90 -90 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Frequency (GHz) 5.0 5.5 6.0 6.5 7.0 7.5 8.0 0.0 Page 8 of 14 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Frequency (GHz) 5.0 5.5 6.0 6.5 7.0 7.5 8.0 DOC-44114-6 – (11/2020) www.psemi.com PE42424 UltraCMOS® SPDT RF Switch Pin Information Table 5 • Pin Descriptions for PE42424 This section provides pinout information for the PE42424. Figure 11 shows the pin map of this device for the available package. Table 5 provides a description for each pin. Pin No. Pin Name 1 V1 2 RFC(*) 3 VDD 4 RF2(*) RF port 2 5 GND Ground 6 RF1(*) RF port 1 Pad GND Ground Figure 11 • Pin Configuration (Top View) V1 1 RFC 2 VDD 3 6 Exposed Pad RF1 5 GND 4 RF2 Description Digital control logic input 1 RF common Supply voltage (nominal 3.3V) Note: * RF pins 2, 4 and 6 must be at 0V DC. The RF pins do not require DC blocking capacitors for proper operation if the 0V DC requirement is met. DOC-44114-6 – (11/2020) Page 9 of 14 www.psemi.com PE42424 UltraCMOS® SPDT RF Switch Evaluation Kit Figure 12 • Evaluation Kit Layout for PE42424 The SPDT switch evaluation board was designed to ease customer evaluation of pSemi’s PE42424 RF switch. The RF common port is connected to the device through a 50Ω transmission line via SMA connector J3. RF1 and RF2 ports are connected to the device through 50Ω transmission lines via SMA connectors J1 and J2, respectively. A transmission line has been included on the reverse side of the PCB, accessible via SMA connectors J4 and J5. This transmission line provides an equivalent length to deembed PCB trace losses. DC and digital inputs are provided to the device via J6. This PCB is constructed of a four metal layer material with total thickness of 62 mils. The top and bottom RF layers are Rogers RO4003 material with an 8 mil RF core. The middle layers provide ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide with ground plane model using a trace width of 16 mils and 10 mil trace gap, with 2.1 mils of metal thickness. For the true performance of the PE42424 to be realized, the PCB should be designed in such a way that RF transmission lines and sensitive DC I/O traces are heavily isolated from one another. PRT-40105 Page 10 of 14 DOC-44114-6 – (11/2020) www.psemi.com PE42424 UltraCMOS® SPDT RF Switch Evaluation Board Schematic Figure 13 • Evaluation Board Schematic for the PE42424 50 OHM J1 50 OHM J2 V1 J3 C5 U1 DNI PE42424 50 OHM C6 DNI 1 V1 RF1 6 2 RFC GND 5 3 V DD RF2 4 GND 7 VDD J7 50 OHM SHORT C2 100pF J4 50 OHM J5 C1 R1 DNI J6 V1 0 OHM R2 THRU VDD PRT-40105 C4 100pF 0 OHM C3 0.1µF 1 3 5 7 9 11 13 1 3 5 7 9 11 13 2 4 6 8 10 12 14 2 4 6 8 10 12 14 HEADER 14 DOC-441265 DOC-44114-6 – (11/2020) Page 11 of 14 www.psemi.com PE42424 UltraCMOS® SPDT RF Switch Packaging Information This section provides packaging data including the moisture sensitivity level, package drawing, package marking and tape-and-reel information. Moisture Sensitivity Level The moisture sensitivity level rating for the PE42424 in the 6-lead 1.5 x 1.5 mm DFN package is MSL 1. Package Drawing Figure 14 • Package Mechanical Drawing for 6-lead 1.5 x 1.5 mm DFN 0.30 (x6) 0.10 C A 1.50 1.20±0.10 (2X) B 0.05 (x2) 1.50 0.50 0.175±0.10 0.28 (x6) (x6) 0.70±0.10 (x4) 0.80 1.60 0.20 Ref. Chamfer 0.15 x 45° 0.10 C (2X) 0.25+0.05 -0.07 (x6) 0.50 1.30 (x4) PIN #1 CORNER TOP VIEW BOTTOM VIEW DOC-51810 0.10 C 0.50±0.05 0.10 0.08 C A B C ALL FEATURES 0.08 C SEATING PLANE 0.10 Ref. 0.02 C RECOMMENDED LAND PATTERN Third Angle Projection Unless otherwise specified dimensions are in millimeters ANGULAR DECIMAL ± 1° X.X ± 0.1 X.XX ± 0.05 X.XXX ± 0.030 Interpret dimensions and tolerance per ASME Y14.5 – 1994 SIDE VIEW DOC-51810 Page 12 of 14 DOC-44114-6 – (11/2020) www.psemi.com PE42424 UltraCMOS® SPDT RF Switch Top-Marking Specification Figure 15 • Package Marking Specifications for PE42424 = P= ZZ = Y= WW = PZZ YWW Pin 1 indicator Part number code* Last two characters of the assembly lot code Last digit of year, starting from 2010 Work week Note: * The part number marking for PE42424 is E. DOC-51207 Tape and Reel Specification Figure 16 • Tape and Reel Specifications for 6-lead 1.5 x 1.5 mm DFN T øD 0 P0 P2 E F A0 W B0 K0 ø D1 P1 Direction of Feed Notes: Not drawn to scale. Dimensions are in millimeters. Maximum cavity angle 5 degrees. Bumped die are oriented active side down. Pocket A0 B0 K0 P1 W F Nominal 1.70 1.70 0.76 4.00 8.00 3.50 Carrier Tape Dimension Table Tolerance Pocket Nominal +/- 0.05 0.5 D1 +/- 0.05 1.5 D0 +/- 0.05 1.75 E +/- 0.1 4.0 P0 + 0.3 - 0.1 P2 2.0 +/- 0.5 0.25 T Tolerance + 0.5 - 0.1 + 0.1 +/- 0.1 +/- 0.1 +/- 0.05 +/- 0.02 DOC-85004 DOC-44114-6 – (11/2020) Page 13 of 14 www.psemi.com UltraCMOS® SPDT RF Switch PE42424 Ordering Information Table 6 lists the available ordering codes for the PE42424 as well as available shipping methods. Table 6 • Order Codes for PE42424 Order Codes Description Packaging Shipping Method PE42424A-Z PE42424 SPDT RF switch Green 6-lead 1.5 x 1.5 mm DFN 3000 units/T&R EK42424-01 PE42424 Evaluation kit Evaluation kit 1/Box Document Categories Advance Information The product is in a formative or design stage. The datasheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The datasheet contains preliminary data. Additional data may be added at a later date. pSemi reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The datasheet contains final data. In the event pSemi decides to change the specifications, pSemi will notify customers of the intended changes by issuing a CNF (Customer Notification Form). Product Brief This document contains a shortened version of the datasheet. For the full datasheet, contact sales@psemi.com. Sales Contact For additional information, contact Sales at sales@psemi.com. Disclaimers The information in this document is believed to be reliable. However, pSemi assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this document are implied or granted to any third party. pSemi’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the pSemi product could create a situation in which personal injury or death might occur. pSemi assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. Patent Statement pSemi products are protected under one or more of the following U.S. patents: patents.psemi.com Copyright and Trademark ©2015–2020, pSemi Corporation. All rights reserved. The Peregrine Semiconductor name, Peregrine Semiconductor logo and UltraCMOS are registered trademarks and the pSemi name, pSemi logo, HaRP and DuNE are trademarks of pSemi Corporation in the U.S. and other countries. Product Specification www.psemi.com DOC-44114-6 – (11/2020)