PE42522
Document Category: Product Specification
UltraCMOS® SPDT RF Switch, 9 kHz–26.5 GHz
Features
Figure 1 • PE42522 Functional Diagram
• Broad frequency support from 9 kHz to 26.5 GHz
• High port to port isolation
RFC
▪ 63 dB @ 3 GHz
▪ 58 dB @ 7.5 GHz
▪ 39 dB @ 13.5 GHz
RF1
▪ 28 dB @ 20 GHz
RF2
▪ 22 dB @ 26.5 GHz
• HaRP™ technology enhanced
50Ω
50Ω
▪ Fast settling time
CMOS Control Driver
▪ No gate and phase lag
▪ No drift in insertion loss and phase
• Improved high frequency insertion loss and return
loss performance with external matching
V1
VSS_EXT
• High ESD performance of 3.0 kV HBM on all pins
• Packaging – 29-lead 4 × 4 mm LGA
Applications
• Test and measurement
• Microwave backhaul
• Radar
Product Description
The PE42522 is a HaRP™ technology-enhanced absorptive SPDT RF switch that supports a broad frequency
range from 9 kHz to 26.5 GHz. This broadband general purpose switch offers excellent isolation, high linearity
performance and has exceptional settling time making this device ideal for many broadband wireless applications. No blocking capacitors are required if DC voltage is not present on the RF ports.
The PE42522 is manufactured on pSemi’s UltraCMOS® process, a patented variation of silicon-on-insulator
(SOI) technology on a sapphire substrate.
pSemi’s HaRP technology enhancements deliver high linearity and excellent harmonics performance. It is an
innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and
integration of conventional CMOS.
©2014–2022, pSemi Corporation. All rights reserved. • Headquarters: 9369 Carroll Park Drive, San Diego, CA, 92121
Product Specification
DOC-12014-10 – (04/2022)
www.psemi.com
PE42522
UltraCMOS® SPDT RF Switch
Optional External VSS Control
For proper operation, the VSS_EXT control pin must be grounded or tied to the VSS voltage specified in Table 2.
When the VSS_EXT control pin is grounded, FETs in the switch are biased with an internal negative voltage
generator. For applications that require the lowest possible spur performance, VSS_EXT can be applied externally
to bypass the internal negative voltage generator.
Absolute Maximum Ratings
Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be
restricted to the limits in Table 2. Operation between operating range maximum and absolute maximum for
extended periods may reduce reliability.
ESD Precautions
When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices.
Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to
avoid exceeding the rating specified in Table 1.
Latch-up Immunity
Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up.
Table 1 • Absolute Maximum Ratings for PE42522
Parameter/Condition
Min
Max
Unit
Supply voltage, VDD
–0.3
5.5
V
Digital input voltage, V1
–0.3
3.6
V
RF input power, CW (RFC–RFX)(1)
9 kHz–2.89 MHz
>2.89 MHz–18 GHz
>18–26.5 GHz
Fig. 2, Fig. 3
33
Fig. 4
dBm
dBm
dBm
RF input power, pulsed (RFC–RFX)(2)
9 kHz–2.89 MHz
>2.89 MHz–18 GHz
>18–26.5 GHz
Fig. 2, Fig. 3
34
Fig. 4
dBm
dBm
dBm
RF input power into terminated ports, CW (RFX)(1)
9 kHz–1.39 MHz
>1.39 MHz–18 GHz
>18–26.5 GHz
Fig. 2, Fig. 3
22
Fig. 4
dBm
dBm
dBm
+150
°C
ESD voltage HBM, all pins(3)
3000
V
ESD voltage MM, all pins(4)
150
V
ESD voltage CDM, all pins(5)
500
V
Storage temperature range
–65
Page 2 of 23
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PE42522
UltraCMOS® SPDT RF Switch
Table 1 • Absolute Maximum Ratings for PE42522 (Cont.)
Parameter/Condition
Min
Max
Unit
Notes:
1) 100% duty cycle, all bands, 50Ω.
2) Pulsed, 5% duty cycle of 4620 µs period, 50Ω.
3) Human body model (MIL-STD 883 Method 3015).
4) Machine model (JEDEC JESD22-A115).
5) Charged device model (JEDEC JESD22-C101).
Recommended Operating Conditions
Table 2 list the recommending operating condition for PE42522. Devices should not be operated outside the
recommended operating conditions listed below.
Table 2 • Recommended Operating Condition for PE42522
Parameter
Min
Typ
Max
Unit
5.5
V
120
200
µA
3.4
5.5
V
50
80
µA
–3.2
V
Normal mode (VSS_EXT = 0V)(1)
Supply voltage, VDD
2.3
Supply current, IDD
Bypass mode (VSS_EXT = –3.4V)(2)
Supply voltage, VDD
2.7
(VDD ≥3.4V for Table 3 full spec. compliance)
Supply current, IDD
Negative supply voltage, VSS_EXT
–3.6
Negative supply current, ISS
–40
–16
µA
Normal or Bypass mode
Digital input high, V1
1.17
3.6
V
Digital input low, V1
–0.3
0.6
V
RF input power, CW (RFC–RFX)(3)
9 kHz–2.89 MHz
>2.89 MHz–18 GHz
>18–26.5 GHz
Fig. 2, Fig. 3
30
Fig. 4
dBm
dBm
dBm
RF input power, pulsed (RFC–RFX)(4)
9 kHz–2.89 MHz
>2.89 MHz–18 GHz
>18–26.5 GHz
Fig. 2, Fig. 3
32
Fig. 4
dBm
dBm
dBm
DOC-12014-10 – (04/2022)
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PE42522
UltraCMOS® SPDT RF Switch
Table 2 • Recommended Operating Condition for PE42522 (Cont.)
Parameter
Min
Typ
RF input power into terminated ports, CW (RFX)(3)
9 kHz–1.39 MHz
>1.39 MHz–18 GHz
>18–26.5 GHz
Operating temperature range, TOP
–40
Max
Unit
Fig. 2, Fig. 3
20
Fig. 4
dBm
dBm
dBm
+85
°C
+25
Notes:
1) Normal mode: connect VSS_EXT (pin 29) to GND (VSS_EXT = 0V) to enable internal negative voltage generator.
2) Bypass mode: use VSS_EXT (pin 29) to bypass and disable internal negative voltage generator.
3) 100% duty cycle, all bands, 50Ω.
4) Pulsed, 5% duty cycle of 4620 µs period, 50Ω.
Electrical Specifications
Table 3 provides the PE42522 key electrical specifications at 25 °C (ZS = ZL = 50Ω), unless otherwise specified.
Normal mode(1) is at VDD = 3.3V and VSS_EXT = 0V. Bypass mode(2) is at VDD = 3.4V and VSS_EXT = –3.4V.
Table 3 • PE42522 Electrical Specifications
Parameter
Path
Condition
Operating frequency
Insertion loss(3)
Min
Typ
9 kHz
RFC–RFX
9 kHz–10 MHz
10–3000 MHz
3000–7500 MHz
7500–10000 MHz
10000–13500 MHz
13500–18000 MHz
18000–20000 MHz
20000–24000 MHz
24000–26500 MHz
Page 4 of 23
0.70
1.05
1.15
1.70
1.70
2.55
3.20
4.50
5.30
Max
Unit
26.5 GHz
As
shown
0.85
1.40
1.50
2.15
2.40
3.25
4.50
5.80
6.95
dB
dB
dB
dB
dB
dB
dB
dB
dB
DOC-12014-10 – (04/2022)
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PE42522
UltraCMOS® SPDT RF Switch
Table 3 • PE42522 Electrical Specifications (Cont.)
Parameter
Path
Min
Typ
RFX–RFX
9 kHz–10 MHz
10–3000 MHz
3000–7500 MHz
7500–10000 MHz
10000–13500 MHz
13500–18000 MHz
18000–20000 MHz
20000–24000 MHz
24000–26500 MHz
70
62
48
42
36
26
23
19
18
80
64
50
44
38
28
25
21
20
dB
dB
dB
dB
dB
dB
dB
dB
dB
RFC–RFX
9 kHz–10 MHz
10–3000 MHz
3000–7500 MHz
7500–10000 MHz
10000–13500 MHz
13500–18000 MHz
18000–20000 MHz
20000–24000 MHz
24000–26500 MHz
65
61
55
48
37
28
26
21
19
73
63
58
51
39
30
28
23
22
dB
dB
dB
dB
dB
dB
dB
dB
dB
RFC–RFX
9 kHz–10 MHz
10–3000 MHz
3000–7500 MHz
7500–10000 MHz
10000–13500 MHz
13500–18000 MHz
18000–20000 MHz
20000–24000 MHz
24000–26500 MHz
23
18
16
15
20
13
7
5
6
dB
dB
dB
dB
dB
dB
dB
dB
dB
RFC–RFX
9 kHz–10 MHz
10–3000 MHz
3000–7500 MHz
7500–10000 MHz
10000–13500 MHz
13500–18000 MHz
18000–20000 MHz
20000–24000 MHz
24000–26500 MHz
23
19
27
27
20
23
10
6
7
dB
dB
dB
dB
dB
dB
dB
dB
dB
All ports
9 kHz–10 MHz
10–3000 MHz
3000–7500 MHz
7500–10000 MHz
10000–13500 MHz
13500–18000 MHz
18000–20000 MHz
20000–24000 MHz
24000–26500 MHz
30
23
15
13
14
8
6
3
2
dB
dB
dB
dB
dB
dB
dB
dB
dB
Isolation
Return loss
(active port)(3)
Return loss
(RFC port)(3)
Return loss (off port)
Condition
DOC-12014-10 – (04/2022)
Max
Unit
Page 5 of 23
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PE42522
UltraCMOS® SPDT RF Switch
Table 3 • PE42522 Electrical Specifications (Cont.)
Parameter
Path
Input 0.1dB compression
point(4)
RFC–RFX
Input IP2
RFC–RFX
Input IP3
RFC–RFX
Condition
Min
Typ
Max
Unit
Fig. 2
Fig. 3
Fig. 4
dBm
dBm
dBm
10–18000 MHz
121
dBm
10–18000 MHz
59
dBm
Settling time
50% CTRL to 0.05 dB final value
7
10
µs
Switching time
50% CTRL to 90% or 10% of RF
3
4.5
µs
Notes:
1) Normal mode: connect VSS_EXT (pin 29) to GND (VSS_EXT = 0V) to enable internal negative voltage generator.
2) Bypass mode: use VSS_EXT (pin 29) to bypass and disable internal negative voltage generator.
3) High frequency performance can be improved by external matching (see Figure 19–Figure 21).
4) The input 0.1dB compression point is a linearity figure of merit. Refer to Table 2 for the RF input power (50Ω).
Switching Frequency
Control Logic
The PE42522 has a maximum 25 kHz switching rate
in normal mode (pin 29 tied to ground). A faster
switching rate is available in bypass mode (pin 29 tied
to VSS_EXT). The rate at which the PE42522 can be
switched is then limited to the switching time as
specified in Table 3.
Table 4 provides the control logic truth table for
PE42522.
Table 4 • Truth Table for PE42522
Switching frequency describes the time duration
between switching events. Switching time is the time
duration between the point the control signal reached
50% of the final value and the point the output signal
reaches within 10% or 90% of its target value.
State
V1
RF1 ON
0
RF2 ON
1
Spur-Free Performance
The typical spurious performance of the PE42522 in
normal mode is –125 dBm (pin 29 tied to ground). If
spur-free performance is desired, the internal
negative voltage generator can be disabled by
applying a negative voltage to VSS_EXT (pin 29).
Hot-Switching Capability
The maximum hot switching capability of the PE42522
is 20 dBm from 1.4 MHz to 18 GHz. The maximum hot
switching capability below 1.4 MHz and above 18 GHz
does not exceed the maximum RF CW terminated
power, see Figure 2–Figure 4. Hot switching occurs
when RF power is applied while switching between
RF ports.
Page 6 of 23
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PE42522
UltraCMOS® SPDT RF Switch
Figure 2 • Power De-rating Curve (9 kHz–18 GHz) @ 25 °C Ambient (50?)
P0.1 dB Compression @ 25°C Ambient
Max. RF Input Power, Pulsed (≥ 2.7 MHz, 25°C Ambient)
Max. RF Input Power, CW (≥ 2.7 MHz, 25°C Ambient)
Max. RF Input Power, CW & Pulsed (< 2.7 MHz, 25°C Ambient)
Max. RF Terminated Power, CW @ 25°C Ambient
Input Power (dBm)
35
30
25
20
15
10
5
0
-5
Frequency (MHz)
Figure 3 • Power De-rating Curve (9 kHz–18 GHz) @ 85 °C Ambient (50?)
P0.1 dB Compression @ 85°C Ambient
Max. RF Input Power, Pulsed (≥ 2.9 MHz, 85°C Ambient)
Max. RF Input Power, CW (≥ 2.9 MHz, 85°C Ambient)
Max. RF Input Power, CW & Pulsed (< 2.9 MHz, 85°C Ambient)
Max. RF Terminated Power, CW @ 85°C Ambient
Input Power (dBm)
35
30
25
20
15
10
5
0
-5
Frequency (MHz)
DOC-12014-10 – (04/2022)
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PE42522
UltraCMOS® SPDT RF Switch
Figure 4 • Power De-rating Curve (16–26.5 GHz) @ 25 °C and 85 °C Ambient (50?)
Abs. Max. RF Input Power, Pulsed @ 25°C & 85°C Ambient
P0.1 dB Compression / Abs. Max. RF Input Power, CW @ 25°C & 85°C Ambient
Max. RF Input Power, Pulsed @ 25°C & 85°C Ambient
Max. RF Input Power, CW @ 25°C & 85°C Ambient
Abs. Max. RF Terminated Power @ 25°C & 85°C Ambient
Max. RF Terminated Power, CW @ 25°C & 85°C Ambient
36
34
32
Input Power (dBm)
30
28
26
24
22
20
18
16
14
16
18
20
22
24
26
Frequency (GHz)
Page 8 of 23
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PE42522
UltraCMOS® SPDT RF Switch
Typical Performance Data
Figure 5–Figure 17 show the typical performance data at 25 °C and VDD = 3.3V (ZS = ZL = 50Ω) unless
otherwise specified.
Figure 5 • Insertion Loss (RFC–RFX)(*)
Note: * High frequency performance can be improved by external matching (see Figure 19–Figure 21).
RF1
RF2
0
Insertion Loss (dB)
-2
-4
-6
-8
-10
0
5
10
15
20
25
Frequency (GHz)
DOC-12014-10 – (04/2022)
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PE42522
UltraCMOS® SPDT RF Switch
Figure 6 • Insertion Loss vs Temperature (RFC–RFX)(*)
Note: * High frequency performance can be improved by external matching (see Figure 19–Figure 21).
-40 °C
+25 °C
+85 °C
0
Insertion Loss (dB)
-2
-4
-6
-8
-10
0
5
10
15
20
25
Frequency (GHz)
Figure 7 • Insertion Loss vs VDD (RFC–RFX)(*)
Note: * High frequency performance can be improved by external matching (see Figure 19–Figure 21).
2.3 V
3.3 V
5.5 V
0
Insertion Loss (dB)
-2
-4
-6
-8
-10
0
5
10
15
20
25
Frequency (GHz)
Page 10 of 23
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PE42522
UltraCMOS® SPDT RF Switch
Figure 8 • RFC Port Return Loss vs Temperature(*)
Note: * High frequency performance can be improved by external matching (see Figure 19–Figure 21).
–40°C
+25°C
+85°C
0
Return Loss (dB)
−5
−10
−15
−20
−25
−30
−35
−40
0
5
10
15
20
25
26. 5
25
26. 5
Frequency (GHz)
Figure 9 • RFC Port Return Loss vs VDD(*)
Note: * High frequency performance can be improved by external matching (see Figure 19–Figure 21).
2.3V
3.3V
5.5V
0
Return Loss (dB)
−5
−10
−15
−20
−25
−30
−35
−40
0
5
10
15
20
Frequency (GHz)
DOC-12014-10 – (04/2022)
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PE42522
UltraCMOS® SPDT RF Switch
Figure 10 • Active Port Return Loss vs Temperature(*)
Note: * High frequency performance can be improved by external matching (see Figure 19–Figure 21).
–40°C
+25°C
+85°C
0
Return Loss (dB)
−5
−10
−15
−20
−25
−30
−35
−40
0
5
10
15
20
25
26. 5
25
26. 5
Frequency (GHz)
Figure 11 • Active Port Return Loss vs VDD(*)
Note: * High frequency performance can be improved by external matching (see Figure 19–Figure 21).
2.3V
3.3V
5.5V
0
Return Loss (dB)
−5
−10
−15
−20
−25
−30
−35
−40
0
5
10
15
20
Frequency (GHz)
Page 12 of 23
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PE42522
UltraCMOS® SPDT RF Switch
Figure 12 • Terminated Port Return Loss vs Temperature
–40°C
+25°C
+85°C
0
Return Loss (dB)
−5
−10
−15
−20
−25
−30
−35
−40
0
5
10
15
20
25
26. 5
20
25
26. 5
Frequency (GHz)
Figure 13 • Terminated Port Return Loss vs VDD
2.3V
3.3V
5.5V
0
Return Loss (dB)
−5
−10
−15
−20
−25
−30
−35
−40
0
5
10
15
Frequency (GHz)
DOC-12014-10 – (04/2022)
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PE42522
UltraCMOS® SPDT RF Switch
Figure 14 • Isolation vs Temperature (RFX–RFX)
–40°C
+25°C
+85°C
0
−10
Isolation (dB)
−20
−30
−40
−50
−60
−70
−80
−90
0
5
10
15
20
25
26. 5
20
25
26. 5
Frequency (GHz)
Figure 15 • Isolation vs VDD (RFX–RFX)
2.3V
3.3V
5.5V
0
−10
Isolation (dB)
−20
−30
−40
−50
−60
−70
−80
−90
0
5
10
15
Frequency (GHz)
Page 14 of 23
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PE42522
UltraCMOS® SPDT RF Switch
Figure 16 • Isolation vs Temperature (RFC–RFX)
–40°C
+25°C
+85°C
0
−10
Isolation (dB)
−20
−30
−40
−50
−60
−70
−80
−90
0
5
10
15
20
25
26. 5
20
25
26. 5
Frequency (GHz)
Figure 17 • Isolation vs VDD (RFC–RFX)
2.3V
3.3V
5.5V
0
−10
Isolation (dB)
−20
−30
−40
−50
−60
−70
−80
−90
0
5
10
15
Frequency (GHz)
DOC-12014-10 – (04/2022)
Page 15 of 23
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PE42522
UltraCMOS® SPDT RF Switch
High Frequency Performance with External Matching
High frequency insertion loss and return loss can be further improved by external tuning traces in the customer
application board layout. Figure 18 is a sample matching network using ideal elements. Figure 19–Figure 21
show the simulated insertion loss and return loss improvement using the matching network.
Figure 18 • PE42522 Matching Network
L2 = 0.300 nH
L1 = 0.285 nH
L1 = 0.285 nH
L2 = 0.300 nH
SPDT
PE42522
RF1
RF2
C1 = 175 fF
C1 = 175 fF
L1ANT = 0.225 nH
C1ANT = 200 fF
Matching can be realized with
printed elements on the customer
application board.
L2ANT = 0.200 nH
RFC
Additional information on high frequency performance with external matching can be found in Application
Note 41, PE42522/523–High Frequency Performance Improvement Through Narrowband Matching.
Page 16 of 23
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PE42522
UltraCMOS® SPDT RF Switch
Figure 19 • Insertion Loss (RFC–RFX) With or Without Matching(*)
Note: * For reference only.
Matched Simulated Data
Un-matched Measured Data
0
Insertion Loss (dB)
-2
-4
-6
-8
-10
23
23.5
24
24.5
25
25.5
26
26.5
Frequency (GHz)
Figure 20 • Active Port Return Loss With or Without Matching(*)
Note: * For reference only.
Matched Simulated Data
Un-matched Measured Data
0
Return Loss (dB)
-5
-10
-15
-20
-25
-30
23
23.5
24
24.5
25
25.5
26
26.5
Frequency (GHz)
DOC-12014-10 – (04/2022)
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PE42522
UltraCMOS® SPDT RF Switch
Figure 21 • RFC Port Return Loss With or Without Matching(*)
Note: * For reference only.
Matched Simulated Data
Un-matched Measured Data
0
Return Loss (dB)
-5
-10
-15
-20
-25
-30
23
23.5
24
24.5
25
25.5
26
26.5
Frequency (GHz)
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PE42522
UltraCMOS® SPDT RF Switch
Evaluation Kit
The SPDT switch evaluation board was designed to ease customer evaluation of pSemi's PE42522. The RF
common port is connected through a 50Ω transmission line via the SMA connector, J1. RF1 and RF2 ports are
connected through 50Ω transmission lines via SMA connectors J4 and J3 respectively. A 50Ω through transmission line is available via SMA connectors J6 and J7, which can be used to de-embed the loss of the PCB.
J13 provides DC and digital inputs to the device.
The board is constructed of a two metal layer material with a total thickness of 38 mils. The top RF layer is
Rogers 4360 material with a thickness of 32 mils and the εr = 6.4. The bottom layer provides ground for the
transmission lines. The transmission lines were designed using a coplanar waveguide with ground plane model
using a trace width of 18 mils, trace gaps of 7 mils and metal thickness of 2.1 mils.
For the true performance of the PE42522 to be realized, the PCB must be designed in such a way that RF transmission lines and sensitive DC I/O traces are well isolated from one another. High frequency insertion loss and
return loss can be further improved by external tuning traces in the customer application board layout. For
further details, see “High Frequency Performance with External Matching”.
Please note that this is a generic PCB and is being used for multiple parts. Pin labeled V2 is GND.
Figure 22 • Evaluation Kit Layout for PE42522
DOC-12014-10 – (04/2022)
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PE42522
UltraCMOS® SPDT RF Switch
Pin Information
This section provides pinout information for the
PE42522. Figure 23 shows the pin map of this device
for the available package. Table 5 provides a
description for each pin.
GND
GND
GND
VDD
27
26
25
24
RF2
V1
1
28
GND
VSS_EXT
Pin 1 Dot
Marking
29
Figure 23 • Pin Configuration (Top View)
Table 5 • Pin Descriptions for PE42522
Pin No.
Pin
Name
1, 3–11,
13–21, 23,
25–27
GND
2
RF2(1)
RF port 2
12
RFC(1)
RF common
22
RF1(1)
RF port 1
23
GND
2
22
RF1
GND
3
21
GND
24
VDD
GND
4
20
GND
28
V1
GND
5
19
GND
29
GND
6
18
GND
GND
7
17
GND
GND
8
16
GND
9
10
11
12
13
14
15
GND
GND
GND
RFC
GND
GND
GND
Exposed Ground Pads
Pad
Description
Ground
Supply voltage (nominal 3.3V)
Digital control logic input 1
VSS_EXT(2) External VSS negative voltage control
GND
Exposed pad: ground for proper operation
Notes:
1) RF pins 2, 12 and 22 must be at 0 VDC. The RF pins do not
require DC blocking capacitors for proper operation if the 0 VDC
requirement is met.
2) Use VSS_EXT (pin 29) to bypass and disable internal negative
voltage generator. Connect VSS_EXT (pin 29) to GND (VSS_EXT =
0V) to enable internal negative voltage generator.
Use VSS_EXT (pin 29) to bypass and disable internal negative voltage generator. Connect VSS_EXT (pin 29) to GND (VSS_EXT = 0V) to enable internal negative voltage generator.
Page 20 of 23
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PE42522
UltraCMOS® SPDT RF Switch
Packaging Information
This section provides packaging data including the moisture sensitivity level, package drawing, package
marking and tape-and-reel information.
Moisture Sensitivity Level
The moisture sensitivity level rating for the PE42522 in the 29-lead 4 × 4 mm LGA package is MSL3.
Package Drawing
Top-Marking Specification
Figure 24 • Package Mechanical Drawing for 29-lead 4 × 4 × 0.91 mm LGA
A
PIN #1 CORNER
4.00
(2X)
B
0.26x0.30
(x6)
0.20 x45°
Chamfer
0.40
0.33x0.34
(x18)
0.47
0.30x0.30
(x5)
0.43
0.45
0.45
4.00
1.13
(x4)
0.24
(x4)
1.13
(x4)
3.80
0.45
0.24
(x4)
1.13
0.47
1.13
0.43
0.46
0.10
(x29)
(2X)
0.49
0.45
0.24
(x4)
3.80
0.47
TOP VIEW
0.70±0.05
0.47
0.24
(x4)
BOTTOM VIEW
RECOMMENDED LAND PATTERN
Note:
- Dimensions concerning pad
pitch are mirrored across the
Y-axis.
Note:
- Only metal is shown on recommended land pattern.
- Please contact your PCB board
supplier for specifications on solder
mask opening sizes and tolerances.
0.91±0.10
SEATING PLANE
SIDE VIEW
C
Third Angle
Projection
Unless otherwise specified
dimensions are in millimeters
DECIMAL
ANGULAR
X.X ± 0.1
± 1°
X.XX ± 0.05
X.XXX ± 0.030
Interpret dimensions and tolerance
per ASME Y14.5 – 1994
DOC-12014-10 – (04/2022)
DOC-88477-1
DOC-88477-1
Page 21 of 23
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PE42522
UltraCMOS® SPDT RF Switch
Figure 25 • Package Marking Specifications for PE42522
42522
YYWW
ZZZZZZ
=
YY =
WW =
ZZZZZZ =
Pin 1 indicator
Last two digits of assembly year
Assembly work week
Assembly lot code (maximum six characters)
Tape and Reel Specification
Figure 26 • Tape and Reel Specifications for 29-lead 4 × 4 × 0.91 mm LGA
Direction of Feed
Pin 1
(I) Measured from centerline of sprocket hole to centerline of pocket.
(II) Cumulative tolerance of 10 sprocket holes is ± 0.20.
(III) Measured from centerline of sprocket hole to centerline of pocket.
Device Orientation in Tape
Notes:
Not drawn to scale.
All dimensions are in millimeters unless otherwise stated.
Maximum cavity angle 5 degrees.
Page 22 of 23
DOC-12014-10 – (04/2022)
www.psemi.com
PE42522
UltraCMOS® SPDT RF Switch
Ordering Information
Table 6 lists the available ordering codes for the PE42522 as well as available shipping methods.
Table 6 • Order Codes for PE42522
Order Codes
Description
Packaging
Shipping Method
PE42522C-X
PE42522 SPDT RF switch
29-lead 4 × 4 mm LGA
500 units / T&R
PE42522C-Z
PE42522 SPDT RF switch
29-lead 4 × 4 mm LGA
3000 units / T&R
EK42522-04
PE42522 Evaluation kit
Evaluation kit
1 / box
Document Categories
Advance Information
The product is in a formative or design stage. The datasheet contains design target specifications for product development. Specifications and
features may change in any manner without notice.
Preliminary Specification
The datasheet contains preliminary data. Additional data may be added at a later date. pSemi reserves the right to change specifications at any
time without notice in order to supply the best possible product.
Product Specification
The datasheet contains final data. In the event pSemi decides to change the specifications, pSemi will notify customers of the intended changes by
issuing a CNF (Customer Notification Form).
Product Brief
This document contains a shortened version of the datasheet. For the full datasheet, contact sales@psemi.com.
Sales Contact
For additional information, contact Sales at sales@psemi.com.
Disclaimers
The information in this document is believed to be reliable. However, pSemi assumes no liability for the use of this information. Use shall be entirely
at the user’s own risk. No patent rights or licenses to any circuits described in this document are implied or granted to any third party. pSemi’s
products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or
sustain life, or in any application in which the failure of the pSemi product could create a situation in which personal injury or death might occur.
pSemi assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications.
Patent Statement
pSemi products are protected under one or more of the following U.S. patents: patents.psemi.com
Copyright and Trademark
©2014–2022, pSemi Corporation. All rights reserved. The Peregrine Semiconductor name, Peregrine Semiconductor logo and UltraCMOS are
registered trademarks and the pSemi name, pSemi logo, HaRP and DuNE are trademarks of pSemi Corporation in the U.S. and other countries.
Product Specification
www.psemi.com
DOC-12014-10 – (04/2022)