PE42540F-Z

Product Specification PE42540 UltraCMOS® SP4T RF Switch 10 Hz–8 GHz Product Description Features The PE42540 is a HaRP™ technology-enhanced absorptive SP4T RF switch developed on UltraCMOS® process technology. This switch is designed specifically to support the requirements of the test equipment and ATE market. It comprises four symmetric RF ports and has very high isolation. An on-chip CMOS decode logic facilitates a two-pin low voltage CMOS control interface and an optional external VSS feature. High ESD tolerance and no blocking capacitor requirements make this the ultimate in integration and ruggedness.  HaRP™ technology enhanced  Fast settling time  Eliminates gate and phase lag  No drift in insertion loss and phase  High linearity: 58 dBm IIP3  Low insertion loss: 0.8 dB @ 3 GHz, 1.0 dB @ 6 GHz and 1.2 dB @ 8 GHz  High isolation: 45 dB @ 3 GHz, The PE42540 is manufactured on Peregrine’s UltraCMOS process, a patented variation of silicon-oninsulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. 39 dB @ 6 GHz and 31 dB @ 8 GHz  Maximum power handling: 30 dBm @ 8 GHz  High ESD tolerance of 2 kV HBM on RFC and 1 kV HBM on all other pins Figure 1. Functional Diagram Figure 2. Package Type 32-lead 5 × 5 mm LGA RFC ESD RF1 RF2 ESD ESD 50 50 RF3 RF4 ESD 50 ESD 50 CMOS Control/ Driver and ESD 71-0067 VDD Document No. DOC-77985-3 | V1 V2 VssEXT www.psemi.com ©2010-2018 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 12 PE42540 Product Specification Table 1. Electrical Specifications @ +25°C, VDD = 3.3V, VSS_EXT = 0V (ZS = ZL = 50Ω ) Parameter Condition Min Operating frequency 10 Hz Typ 1 Max Unit 8 GHz RFC–RFX insertion loss 10 Hz–9 kHz 3000 MHz 6000 MHz 7500 MHz 8000 MHz RFX–RFX isolation 10 Hz–9 kHz 3000 MHz 6000 MHz 7500 MHz 8000 MHz 70 40 34 27 25 80 45 39 32 31 dB dB dB dB dB RFC–RFX isolation 10 Hz–9 kHz 3000 MHz 6000 MHz 7500 MHz 8000 MHz 74 40 28 24 21 84 45 33 29 27 dB dB dB dB dB Return loss (RFC to active port) 10 Hz–9 kHz 3000 MHz 6000 MHz 7500 MHz 8000 MHz 24 23 18 14 13 dB dB dB dB dB Return loss (terminated port) 10 Hz–9 kHz 3000 MHz 6000 MHz 7500 MHz 8000 MHz 35 18 13 11 10 dB dB dB dB dB 50% CTRL to 0.05 dB final value (–40 to +85 °C) rising edge 50% CTRL to 0.05 dB final value (–40 to +85 °C) falling edge 14 15 18 45 μs μs 50% CTRL to 90% or 10% RF 5 8 μs Settling time Switching time (TSW) 0.7 0.8 1.0 1.1 1.2 1.0 1.1 1.3 1.5 1.6 dB dB dB dB dB 1 P1dB input 1 dB compression point RFX–RFC All bands @ 1:1 VSWR, 100% duty cycle 31 33 dBm Input IP3 8000 MHz 58 dBm Input IP2 8000 MHz 100 dBm Note 1: Maximum operating PIN (50Ω) is shown in Table 3. Please refer to Figure 4, Figure 5 and Figure 6 when operating the part at low frequency. ©2010-2018 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 12 Document No. DOC-77985-3 | UltraCMOS® RFIC Solutions PE42540 Product Specification 29 GND 30 GND V1 31 GND V2 32 VDD VSS_EXT Pin 1 Dot Marking GND Figure 3. Pin Configuration (Top View) 28 27 26 25 Table 3. Operating Ranges Parameter GND 1 24 GND RF4 2 23 RF3 GND 3 22 GND GND 4 21 GND GND 5 20 GND GND 6 19 GND RF2 7 18 RF1 GND 8 17 GND Exposed Pad 15 16 GND 14 GND GND 13 RFC 12 GND 11 GND GND 10 GND 9 Table 2. Pin Descriptions Typ Max Unit Supply voltage, VDD 3.0 3.3 3.55 V Negative power supply voltage1, VSS_EXT –3.6 –3.3 –3.0 V Negative supply current, Iss –10 –40 µA Power supply current, IDD VDD = 3.3V, VSS_EXT = 0V, Temp = +85 °C 90 160 µA 50 µA Power supply current, IDD VDD = 3.6V, VSS_EXT used Control voltage high (V1, V2) 1.2 1.5 VDD V Control voltage low (V1, V2) 0 0 0.4 V 1 µA Control current, ICTRL 2 PIN thru path (50Ω, RF power in) 9 kHz – 1 GHz 1 GHz – 8 GHz (85 °C, VSS_EXT = –3.0V) (85 °C, VSS_EXT = 0.0V) (85 °C, VSS_EXT = –3.5V) Fig. 4–6 30 dBm 30 28 27.5 Max power into termination (50Ω) 9 kHz ≤ 6 MHz2,3 6 MHz–8 GHz2,3 Fig. 4–6 dBm 20 Fig. 4–6 dBm 20 Pin # Pin Name 1, 3-6, 8, 9-12, 14-17, 19-22, 24-26, 28, 32 GND Ground Max power, hot switching (50Ω) 9 kHz ≤ 6 MHz2,3 6 MHz–8 GHz2,3 2 RF42 RF I/O Operating temperature range, TOP 7 2 RF I/O 2 RF2 Description Min 13 RFC RF common 18 RF12 RF I/O 23 RF32 RF I/O 27 VDD Supply 29 V1 Switch control input, CMOS logic level 30 V2 Switch control input, CMOS logic level 31 VSS_EXT1 Paddle GND Notes: Notes: –40 +85 °C 1. Applies only when external VSS power supply is used. Otherwise, VSS_EXT = 0. 2. 100% duty cycle (–40 to +85 °C, 1:1 VSWR). 3. Do not exceed 20 dBm. External VSS negative voltage Exposed solder pad: Ground for proper operation 1. Use VSS_EXT (pin 31, VSS_EXT = –VDD) to bypass and disable internal negative voltage generator. Connect VSS_EXT (pin 31) to GND (VSS_EXT = 0V) to enable internal negative voltage generator. 2. All RF pins must be DC blocked with an external series capacitor or held at 0 VDC. Document No. DOC-77985-3 | www.psemi.com ©2010-2018 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 12 PE42540 Product Specification Table 4. Absolute Maximum Ratings Parameter Min Maximum junction temperature Switching Frequency Max Unit +150 °C Storage temperature range, TST –60 +150 °C Supply voltage, VDD –0.3 4 V 4 V Control voltage (V1, V2) PIN thru path2 (50Ω, RF power in) 9 kHz – 1 GHz 1 GHz – 8 GHz (85 °C, VSS_EXT = –3.0V) (85 °C, VSS_EXT = 0.0V) (85 °C, VSS_EXT = –3.5V) Fig. 4–6 30 30 28 27.5 Max power into termination (50Ω) 9 kHz ≤ 6 MHz1 6 MHz–8 GHz Fig. 4–6 20 dBm ESD voltage HBM2 RFC All pins 2000 1000 V V ESD voltage CDM3, all pins 450 V 100 V 4 ESD voltage MM , all pins dBm Notes: 1. Do not exceed 20 dBm. 2. Human body model (MIL-STD 883 Method 3015). 3. Charged device model (JEDEC JESD22–C101). 4. Machine model (JEDEC JESD22-A115-A). Exceeding absolute maximum ratings may cause permanent damage. Operation should be restricted to the limits in the Operating Ranges table. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the specified rating. The PE42540 has a maximum 25 kHz switching rate when the internal negative voltage generator is used (pin 31 = GND). The rate at which the PE42540 can be switched is only limited to the switching time (Table 1) if an external negative supply is provided at (pin 31 = VSS_EXT). Optional External Vss For proper operation, the VSS_EXT pin must be grounded or tied to the Vss voltage specified in Table 3. When the VSS_EXT pin is grounded, FETs in the switch are biased with an internal voltage generator. For applications that require the lowest possible spur performance, VSS_EXT can be applied externally to bypass the internal negative voltage generator. Spurious Performance The typical spurious performance of the PE42540 is –144 dBm when VSS_EXT = 0V (pin 31 = GND). If further improvement is desired, the internal negative voltage generator can be disabled by setting VSS_EXT = –VDD. Table 5. Truth Table State V1 V2 RF1 on 0 0 RF2 on 1 0 RF3 on 0 1 RF4 on 1 1 Moisture Sensitivity Level The moisture sensitivity level rating for the PE42540 in the 32-lead 5 × 5 mm LGA package is MSL3. Latch-Up Immunity Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up. ©2010-2018 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 12 Document No. DOC-77985-3 | UltraCMOS® RFIC Solutions PE42540 Product Specification Low Frequency Operation Thermal Data Table 6 shows the minimum and maximum voltage limits when operating the device under various VDD and VSS_EXT voltage conditions below 9 kHz. Refer to Figures 4, 5 and 6 to determine the maximum operating power over the frequency range of the device. Psi-JT (JT), junction top-of-package, is a thermal metric to estimate junction temperature of a device on the customer application PCB (JEDEC JESD51–2). Table 6. Instantaneous RF Voltage Limits for Operation Below 9 kHz where JT = (TJ –TT)/P JT = junction-to-top of package characterization VDD VSS_EXT Minimum Peak Voltage at RF Port Maximum Peak Voltage at RF Port ≥ 3.0 0.0 –0.2 1.2 3.0 –3.0 –0.6 1.6 3.3 –3.3 –0.3 1.3 3.5 –3.5 –0.1 1.1 TT = package temperature (top surface, in the center), °C 3.6 –3.6 0.0 1.0 P = power dissipated by device, Watts parameter, °C/W TJ = die junction temperature, °C Maximum Operating Power vs Frequency Figures 4, 5 and 6 show the power limit of the device will increase with frequency. As the frequency increases, the contours and maximum power limit will increase as shown in the curves. Document No. DOC-77985-3 | www.psemi.com Table 7. Thermal Data for PE42540 Parameter Typ Unit JT 79 °C/W JA, junction-to-ambient thermal resistance 128 °C/W ©2010-2018 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 12 PE42540 Product Specification Figure 4. Maximum Operating Power vs Frequency (Tambient = +25 oC) 35 30 Input Power (dBm) 25 20 15 10 5 0 VssEXT = -3 .0V , VDD = +3.0 V -5 VssEXT = 0.0V, VDD ≥ +3.0V -10 VssEXT= -3.5V, VDD=+3.5V -15 0 1 10 100 1,000 10,000 100 ,00 0 1,000,000 Frequency (kHz) Figure 5. Maximum Operating Power vs Frequency (Tambient = +50 oC) 35 30 Input Power (dBm) 25 20 15 10 5 0 VssEXT = -3 .0V , VDD = +3.0 V -5 VssEXT = 0.0V, VDD ≥ +3.0V -10 VssEXT= -3.5V, VDD=+3.5V -15 0 1 10 100 1,000 10,000 100 ,00 0 1,000,000 Frequency (kHz) Figure 6. Maximum Operating Power vs Frequency (Tambient = +85 oC) 35 30 25 Input Power (dBm) 20 15 10 5 0 VssEXT = -3 .0V , VDD = +3.0 V -5 VssEXT = 0.0V, VDD ≥ +3.0V -10 VssEXT= -3.5V, VDD=+3.5V -15 0 1 10 100 1,000 10,000 100 ,00 0 1,000,000 Frequency (kHz) ©2010-2018 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 12 Document No. DOC-77985-3 | UltraCMOS® RFIC Solutions PE42540 Product Specification Figure 7. Insertion Loss vs VDD (Temp = +25°C, VSS_EXT = 0) Frequency (Hz) Figure 9. Insertion Loss (Temp = +25 °C, VDD = 3.3V, VSS_EXT = 0) Frequency (Hz) Figure 11. Isolation: RFX–RFX vs Temp (VDD = 3.3V, VSS_EXT = 0) Frequency (Hz) Document No. DOC-77985-3 | www.psemi.com Figure 8. Insertion Loss vs Temp (VDD = 3.3V, VSS_EXT = 0) Frequency (Hz) Figure 10. Isolation: RFX–RFX vs VDD (Temp = +25 °C, VSS_EXT = 0) Frequency (Hz) Figure 12. Isolation: RFX–RFC vs VDD (Temp = +25 °C, VSS_EXT = 0) Frequency (Hz) ©2010-2018 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 12 PE42540 Product Specification Figure 13. Isolation: RFX–RFC vs Temp (VDD = 3.3V, VSS_EXT = 0) Frequency (Hz) Figure 15. Active Port Return Loss vs Temp (VDD = 3.3V, VSS_EXT = 0) Frequency (Hz) Figure 17. Terminated Port Return Loss vs Temp (VDD = 3.3V, VSS_EXT = 0) Frequency (Hz) ©2010-2018 Peregrine Semiconductor Corp. All rights reserved. Page 8 of 12 Figure 14. Active Port Return Loss vs VDD (Temp = +25 °C, VSS_EXT = 0) Frequency (Hz) Figure 16. Terminated Port Return Loss vs VDD (Temp = +25 °C, VSS_EXT = 0) Frequency (Hz) Figure 18. RFC Port Return Loss vs VDD (Temp = +25 °C, VSS_EXT = 0) Frequency (Hz) Document No. DOC-77985-3 | UltraCMOS® RFIC Solutions PE42540 Product Specification Figure 19. RFC Port Return Loss vs Temp (VDD = 3.3V, VSS_EXT = 0) Frequency (Hz) PE42540 Linearity Performance Figure 20. Linearity Performance (Temp = +25 °C, VDD = 3.3V, VSS_EXT = 0) 120 [dBm] Linearity Linearity (dBm) 100 80 60 40 Nominal IIP3 [dBm] Nominal IIP2 [dBm] 20 0 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6 1.0E+9 10.0E+9 1.0E+10 Frequency (Hz) Frequency [Hz] Document No. DOC-77985-3 | www.psemi.com ©2010-2018 Peregrine Semiconductor Corp. All rights reserved. Page 9 of 12 PE42540 Product Specification Evaluation Kit Figure 21. Evaluation Board Layout The SP4T switch evaluation board was designed to ease customer evaluation of Peregrine’s PE42540. The RF common port is connected through a 50Ω transmission line via the top SMA connector, J1. RF1, RF2, RF3 and RF4 are connected through 50Ω transmission lines via SMA connectors J2, J4, J3 and J5, respectively. A through 50Ω transmission is available via SMA connectors J6 and J7. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. PRT-28605 Figure 22. Evaluation Board Schematic R1 1M 0603 1M 0603 R2 J1 142-0761-881 R5 2 R3 1 R4 R6 C6 0.1 µF 0402 J8 PZC36DABN HEADER14 1 3 5 7 9 11 13 2 4 6 8 10 12 14 2 4 6 8 10 12 14 C5 0.1 µF 0402 27 29 30 31 C3 22 pF 0402 RF4 RF4 1 7 2 J5 142-0761-881 J6 142-0761-881 1 1 J7 142-0761-881 1 3 4 5 6 8 9 10 11 12 14 15 16 17 19 20 21 22 24 25 26 28 32 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND J4 142-0761-881 2 RF3 1 2 RF2 RF2 2 23 RF1 RF3 2 J3 142-0761-881 1 C1 22 pF 0402 0 0402 0 0402 0 0402 0 0402 2 18 C2 22 pF 0402 VDD V1 V2 VSS RF1 2 J2 142-0761-881 1 RFC U1 PE42540 13 C4 22 pF 0402 1 3 5 7 9 11 13 DOC-32927 ©2010-2018 Peregrine Semiconductor Corp. All rights reserved. Page 10 of 12 Document No. DOC-77985-3 | UltraCMOS® RFIC Solutions PE42540 Product Specification Figure 23. Package Drawing Third Angle Projection Unless otherwise specified dimensions are in millimeters decima l angular x.x ± 0.1 ± 1° x.xx ± 0.05 x.xxx ± 0.030 Interpret dimensions and tolerance per asme y14.5 – 1994 Figure 24. Marking Specifications 42540 YYWW ZZZZZZZ YYWW = Date Code ZZZZZZZ = Assembly lot code (maximum seven characters) DOC-65743 Document No. DOC-77985-3 | www.psemi.com ©2010-2018 Peregrine Semiconductor Corp. All rights reserved. Page 11 of 12 PE42540 Product Specification Figure 25. Tape and Reel Drawing Direction of Feed Notes: (I) Measured from centerline of sprocket hole to centerline of pocket. (II) Cumulative tolerance of 10 sprocket holes is ± 0.20. (III) Measured from centerline of sprocket hole to centerline of pocket. ALL DIMENSIONS IN MILLIMETERS UNLESS OTHERWISE STATED. Ao = 5.30 ± 0.1 mm Bo = 5.30 ± 0.1 mm Ko = 1.30 ± 0.1 mm F = 5.50 ± 0.1 mm P1 = 8.00 ± 0.1 mm W = 12.00 ± 0.3 mm Pin 1 Top of Device Device Orientation in Tape Table 8. Ordering Codes for PE42540 Order Code Description Package Shipping Method PE42540F-Z PE42540 SP4T RF switch Green 32-lead 5 × 5 mm LGA 3000 units/T&R EK42540-07 PE42540 Evaluation kit Evaluation kit 1/Box Sales Contact and Information For sales and contact information please visit www.psemi.com. Advance Inf ormat io n: The product i s i n a formati ve or desi gn stage. The datasheet contai ns desi gn target specifi cati ons for product devel opment. Speci fi cati ons and features may change i n any manner without noti ce. Prelimina ry S pecif ication: The datasheet contai ns preli mi nary data. Addi ti onal data may be added at a l ater date. Peregri ne reserve s the ri ght to change specifi cati ons at any ti me without noti ce i n order to suppl y the best possi bl e product. P ro duct Spec ificat io n: The datasheet contai ns fi nal data. In the event Peregri ne deci des to change the speci fi cati ons, Peregri ne will notify customer s of the i ntended changes by i ssui ng a CN F (Customer Notifi cati on Form). The i nformati on i n thi s datasheet i s beli eved to be reli abl e. Howe ver, Peregri ne assume s no li abili ty for the use of thi s i nformati on. Use shall be enti rel y at the user’ s own ri sk. ©2010-2018 Peregrine Semiconductor Corp. All rights reserved. Page 12 of 12 No patent ri ghts or li cense s to any ci rcui ts descri bed i n thi s datasheet are i mpli ed or granted to any thi rd party. Peregri ne’ s products are not desi gned or i ntended for use i n devi ces or sy stems i ntended for surgi cal i mpl ant, or i n other appli cati ons i ntended to support or sustai n li fe, or i n any appli cati on i n whi ch the fail ure of the Peregri ne product coul d create a si tuati on i n whi ch personal i nj ury or death mi ght occur. Peregri ne assu mes no liability for damages, i ncl udi ng consequenti al or i nci dental damages, ari si ng out of the use of i ts products i n such appli cati ons. The Peregri ne name, l ogo, Ul traCM OS and U TSi are regi stered trademarks and HaRP, Mul ti Swi tch and DuNE are trademarks of Peregri ne Semi conductor Corp. Peregri ne products are protected under one or more of the foll owi ng U.S. Patents: http://patents.psemi.com. Document No. DOC-77985-3 | UltraCMOS® RFIC Solutions