74ABT543APW

INTEGRATED CIRCUITS 74ABT543A Octal latched transceiver with dual enable (3-State) Product specification Supersedes data of 1995 Apr 19 IC23 Data Handbook 1998 Sep 24 Philips Semiconductors Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) 74ABT543A FEATURES • Combines 74ABT245 and 74ABT373 type functions in one device • 8-bit octal transceiver with D-type latch • Back-to-back registers for storage • Separate controls for data flow in each direction • Output capability: +64mA/–32mA • Live insertion/extraction permitted • Power-up 3-State • Power-up reset • Latch-up protection exceeds 500mA per Jedec Std 17 • ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model The 74ABT543A Octal Registered Transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable (LEAB, LEBA) and Output Enable (OEAB, OEBA) inputs are provided for each register to permit independent control of data transfer in either direction. The outputs are guaranteed to sink 64mA. FUNCTIONAL DESCRIPTION The 74ABT543A contains two sets of eight D-type latches, with separate control pins for each set. Using data flow from A to B as an example, when the A-to-B Enable (EAB) input and the A-to-B Latch Enable (LEAB) input are Low the A-to-B path is transparent. A subsequent Low-to-High transition of the LEAB signal puts the A data into the latches where it is stored and the B outputs no longer change with the A inputs. With EAB and OEAB both Low, the 3-State B output buffers are active and display the data present at the outputs of the A latches. Control of data flow from B to A is similar, but using the EBA, LEBA, and OEBA inputs. DESCRIPTION The 74ABT543A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. QUICK REFERENCE DATA SYMBOL tPLH tPHL CIN CI/O ICCZ PARAMETER Propagation delay An to Bn or Bn to An Input capacitance I/O capacitance Total supply current CONDITIONS Tamb = 25°C; GND = 0V CL = 50pF; VCC = 5V VI = 0V or VCC Outputs disabled; VO = 0V or VCC Outputs disabled; VCC =5.5V TYPICAL 2.9 3.6 4 7 110 UNIT ns pF pF µA ORDERING INFORMATION PACKAGES 24-Pin Plastic DIP 24-Pin plastic SO 24-Pin Plastic SSOP Type II 24-Pin Plastic TSSOP Type I TEMPERATURE RANGE –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C OUTSIDE NORTH AMERICA 74ABT543A N 74ABT543A D 74ABT543A DB 74ABT543A PW NORTH AMERICA 74ABT543A N 74ABT543A D 74ABT543A DB 7ABT543APW DH DWG NUMBER SOT222-1 SOT137-1 SOT340-1 SOT355-1 PIN CONFIGURATION LEBA OEBA 1 2 24 VCC 23 EBA 22 B0 21 B1 20 B2 19 B3 18 B4 17 B5 16 B6 15 B7 14 LEAB 13 OEAB PIN DESCRIPTION PIN NUMBER 14, 1 11, 23 13, 2 3, 4, 5, 6, 7, 8, 9, 10 22, 21, 20, 19, 18, 17, 16, 15 12 24 SYMBOL LEAB / LEBA EAB / EBA OEAB / OEBA A0 – A7 B0 – B7 GND VCC FUNCTION A to B / B to A Latch Enable input (active-Low) A to B / B to A Enable input (active-Low) A to B / B to A Output Enable input (active-Low) Port A, 3-State outputs Port B, 3-State outputs Ground (0V) Positive supply voltage A0 3 A1 4 A2 A3 5 6 A4 7 A5 8 A6 9 A7 10 EAB 11 GND 12 SA00168 1998 Sep 24 2 853-1794 20080 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) 74ABT543A LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) 2 23 1 13 3 4 5 6 7 8 9 10 22 24 1EN3 (BA) G1 1C5 2EN4 (AB) G2 2C6 A0 A1 A2 A3 A4 A5 A6 A7 11 23 14 1 EAB EBA LEAB LEBA B0 B1 B2 B3 B4 B5 B6 B7 OEAB OEBA 13 2 3 4 ∇3 6D 22 5D 2∇ 21 20 19 18 17 16 15 5 6 7 8 22 21 20 19 18 17 16 15 9 10 SA00169 SA00170 LOGIC DIAGRAM DETAIL A D LE Q 22 B0 A0 3 Q D LE A1 A2 A3 A4 A5 A6 A7 4 5 6 7 8 9 10 DETAIL A X 7 21 20 19 18 17 16 15 B1 B2 B3 B4 B5 B6 B7 OEBA 2 13 OEAB EBA 23 11 LEBA 1 EAB 14 LEAB SA00171 1998 Sep 24 3 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) 74ABT543A FUNCTION TABLE INPUTS OEXX H X L L L L L L L H= h= L= l= X= ↑= NC= Z= EXX X H ↑ ↑ L L L L LEXX X X L L ↑ ↑ L L An or Bn X X h l h l H L OUTPUTS Bn or An Z Z Z Z H L H L Disabled Disabled Disabled + Latch Latch + Display Transparent STATUS L H X NC Hold High voltage level High voltage level one set-up time prior to the Low-to-High transition of LEXX or EXX (XX = AB or BA) Low voltage level Low voltage level one set-up time prior to the Low-to-High transition of LEXX or EXX (XX = AB or BA) Don’t care Low-to-High transition of LEXX or EXX (XX = AB or BA) No change High impedance or “off” state ABSOLUTE MAXIMUM RATINGS1, 2 SYMBOL VCC IIK VI IOK VOUT IOUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 DC output diode current DC output voltage3 VO < 0 output in Off or High state output in Low state VI < 0 CONDITIONS RATING –0.5 to +7.0 –18 –1.2 to +7.0 –50 –0.5 to +5.5 128 –65 to 150 UNIT V mA V mA V mA °C DC output current Storage temperature range NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER Min VCC VI VIH VIL IOH IOL ∆t/∆v Tamb DC supply voltage Input voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Input transition rise or fall rate Operating free-air temperature range 0 –40 4.5 0 2.0 0.8 –32 64 10 +85 LIMITS Max 5.5 VCC V V V V mA mA ns/V °C UNIT 1998 Sep 24 4 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) 74ABT543A DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = +25°C Min VIK Input clamp voltage VCC = 4.5V; IIK = –18mA VCC = 4.5V; IOH = –3mA; VI = VIL or VIH VOH High-level output voltage VCC = 5.0V; IOH = –3mA; VI = VIL or VIH VCC = 4.5V; IOH = –32mA; VI = VIL or VIH VOL VRST II Low-level output voltage Power-up output low voltage3 Input leakage current IOFF IPU/PD IIH + IOZH IIL + IOZL ICEX IO ICCH ICCL ICCZ ∆ICC Additional supply current per input pin2 Quiescent supply current Control pins Data pins VCC = 4.5V; IOL = 64mA; VI = VIL or VIH VCC = 5.5V; IO = 1mA; VI = GND or VCC VCC = 5.5V; VI = GND or 5.5V VCC = 5.5V; VI = GND or 5.5V VCC = 0.0V; VO or VI ≤ 4.5V VCC = 2.1V; VO = 0.5V; VI = GND or VCC; V OE = Don’t care VCC = 5.5V; VO = 2.7V; VI = VIL or VIH VCC = 5.5V; VO = 0.5V; VI = VIL or VIH VCC = 5.5V; VO = 5.5V; VI = GND or VCC VCC = 5.5V; VO = 2.5V VCC = 5.5V; Outputs High, VI = GND or VCC VCC = 5.5V; Outputs Low, VI = GND or VCC VCC = 5.5V; Outputs 3-State; VI = GND or VCC VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND; VCC = 5.5V –40 2.5 3.0 2.0 Typ –0.9 3.2 3.7 2.3 0.3 0.13 ±0.01 ±5 ±5.0 ±5.0 5.0 –5.0 5.0 –65 110 20 110 0.3 0.55 .55 ±1.0 ±100 ±100 ±50 50 –50 50 –180 250 30 250 1.5 –40 Max –1.2 2.5 3.0 2.0 0.55 .55 ±1.0 ±100 ±100 ±50 50 –50 50 –180 250 30 250 1.5 Tamb = –40°C to +85°C Min Max –1.2 V V V V V V µA µA µA µA µA µA µA mA µA mA µA mA UNIT Power-off leakage current Power-up/down 3-State output current4 3-State output High current 3-State output Low current Output high leakage current Output current1 NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 4. This parameter is valid for any VCC between 0V and 2.1V, with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10%, a transition time of up to 100µsec is permitted. 1998 Sep 24 5 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) 74ABT543A AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER WAVEFORM Min tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Propagation delay An to Bn, Bn to An Propagation delay LEBA to An, LEAB to Bn Output enable time OEBA to An, OEAB to Bn Output disable time OEBA to An, OEAB to Bn Output enable time EBA to An, EAB to Bn Output disable time EBA to An, EAB to Bn 2 1 2 4 5 4 5 4 5 4 5 1.0 1.9 1.0 2.1 1.0 2.0 2.0 1.0 1.0 2.0 2.0 1.0 Tamb = +25oC VCC = +5.0V Typ 2.9 3.6 3.4 4.3 3.2 4.3 4.0 3.0 3.4 4.4 3.6 3.0 Max 4.5 5.2 5.1 6.0 5.1 5.9 5.7 4.6 5.1 6.1 5.4 4.6 Tamb = -40 to +85oC VCC = +5.0V ±0.5V Min 1.0 1.9 1.0 2.1 1.0 2.0 2.0 1.0 1.0 2.0 2.0 1.0 Max 5.2 5.7 6.2 6.7 6.2 6.6 6.2 5.0 6.2 6.8 5.9 5.0 ns ns ns ns ns ns UNIT AC SETUP REQUIREMENTS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER WAVEFORM Tamb = VCC = +5.0V Min ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) tw(L) Setup time An to LEAB, Bn to LEBA Hold time An to LEAB, Bn to LEBA Setup time An to EAB, Bn to EBA Hold time An to EAB, Bn to EBA Latch enable pulse width, Low 3 3 3 3 3 2.5 3.0 0.5 0.5 3.5 3.0 0.5 0.5 3.5 +25oC Typ 1.0 1.4 –0.8 –0.6 1.3 1.4 –0.8 –0.6 1.0 Tamb = -40 to +85oC VCC = +5.0V ±0.5V Min 2.5 3.0 0.5 0.5 3.5 3.0 0.5 0.5 3.5 ns ns ns ns ns UNIT AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V VIN VM tPHL VM tPLH VIN VM tPLH VM tPHL VOUT VM VM VOUT VM VM SA00172 SA00173 Waveform 1. Propagation Delay For Inverting Output Waveform 2. Propagation Delay For Non-Inverting Output 1998 Sep 24 6 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) 74ABT543A An, Bn LEAB, LEBA NOTE: For all waveforms, VM = 1.5V, the shaded areas indicate when the input is permitted to change for predictable output performance. SA00174 Waveform 3. Data Setup and Hold Times And Latch Enable Pulse Width OEAB, OEBA, EAB, EBA Waveform 4. 3-State Output Enable Time to High Level and Output Disable Time from High Level TEST CIRCUIT AND WAVEFORM 7V From Output Under Test CL = 50 pF 500 Ω S1 Open GND 500 Ω 1998 Sep 24 ÉÉÉ É ÉÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ VM VM VM VM ts(H) th(H) ts(L) th(L) VM tw(L) VM VM tPZH VM tPHZ VOH An, Bn VM VOH –0.3V 0V OEAB, OEBA, EAB, EBA VM tPZL VM tPLZ An, Bn VM VOL +0.3V 0V SA00176 Waveform 5. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level SA00175 Load Circuit TEST tpd tPLZ/tPZL tPHZ/tPZH S1 open 7V open DEFINITIONS Load capacitance includes jig and probe capacitance; CL = see AC CHARACTERISTICS for value. SA00012 7 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) 74ABT543A DIP24: plastic dual in-line package; 24 leads (300 mil) SOT222-1 1998 Sep 24 8 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) 74ABT543A SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 1998 Sep 24 9 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) 74ABT543A SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1 1998 Sep 24 10 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) 74ABT543A TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1 1998 Sep 24 11 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) 74ABT543A Data sheet status Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Production [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 © Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 05-96 9397-750-04611 Philips Semiconductors yyyy mmm dd 12