74AHCT2G08DP

74AHC2G08; 74AHCT2G08 Dual 2-input AND gate Rev. 02 — 18 October 2004 Product data sheet 1. General description The 74AHC2G08; 74AHCT2G08 is a high-speed Si-gate CMOS device. The 74AHC2G08; 74AHCT2G08 provides two 2-input AND gates. 2. Features s Symmetrical output impedance s High noise immunity s ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V x CDM EIA/JESD22-C101 exceeds 1000 V. s Low power dissipation s Balanced propagation delays s Multiple package options s Specified from −40 °C to +80 °C and from −40 °C to +125 °C. 3. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. Symbol tPHL, tPLH CI CPD Parameter propagation delay A and B to Y input capacitance power dissipation capacitance CL = 50 pF; fi = 1 MHz [1] [2] Conditions CL = 15 pF; VCC = 5 V Min - Typ 3.2 1.5 17 Max 5.9 10 - Unit ns pF pF Type 74AHC2G08 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate Table 1: Quick reference data …continued GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. Symbol tPHL, tPLH CI CPD Parameter propagation delay A and B to Y input capacitance power dissipation capacitance CL = 50 pF; fi = 1 MHz [1] [2] Conditions CL = 15 pF; VCC = 5 V Min - Typ 3.6 1.5 19 Max 6.2 10 - Unit ns pF pF Type 74AHCT2G08 [1] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs. The condition is Vi = GND to VCC. [2] 4. Ordering information Table 2: Ordering information Package Temperature range Name 74AHC2G08DP 74AHCT2G08DP 74AHC2G08DC 74AHCT2G08DC 74AHC2G08GM 74AHCT2G08GM −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C TSSOP8 TSSOP8 VSSOP8 VSSOP8 XSON8 XSON8 Description plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm plastic very thin shrink small outline package; 8 leads; body width 2.3 mm plastic very thin shrink small outline package; 8 leads; body width 2.3 mm plastic extremely thin small outline package; no leads; 8 terminals; body 0.95 × 1.95 × 0.5 mm plastic extremely thin small outline package; no leads; 8 terminals; body 0.95 × 1.95 × 0.5 mm Version SOT505-2 SOT505-2 SOT765-1 SOT765-1 SOT833-1 SOT833-1 Type number 5. Marking Table 3: Marking Marking code A08 C08 A08 C08 A08 C08 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Type number 74AHC2G08DP 74AHCT2G08DP 74AHC2G08DC 74AHCT2G08DC 74AHC2G08GM 74AHCT2G08GM 9397 750 13735 Product data sheet Rev. 02 — 18 October 2004 2 of 17 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate 6. Functional diagram 1 1 2 5 6 1A 1B 2A 2B 2 1Y 7 5 6 mna724 mna725 & 7 2Y 3 & 3 Fig 1. Logic symbol. Fig 2. IEC logic symbol. A Y B mna221 Fig 3. Logic diagram (one gate). 7. Pinning information 7.1 Pinning 08 1A 1A 1B 2Y GND 1 2 3 4 001aab564 1 8 VCC 8 7 VCC 1Y 2B 2A 1B 2 7 1Y 08 6 5 2Y 3 6 2B GND 4 5 2A 001aab565 Transparent top view Fig 4. Pin configuration TSSOP8 and VSSOP8. Fig 5. Pin configuration XSON8. 9397 750 13735 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 02 — 18 October 2004 3 of 17 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate 7.2 Pin description Table 4: Symbol 1A 1B 2Y GND 2A 2B 1Y VCC Pin description Pin 1 2 3 4 5 6 7 8 Description data input data input data output ground (0 V) data input data input data output supply voltage 8. Functional description 8.1 Function table Table 5: Input nA L L H H [1] H = HIGH voltage level; L = LOW voltage level. Function table [1] Output nB L H L H nY L L L H 9. Limiting values Table 6: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC VI IIK IOK IO ICC, IGND Tstg Ptot [1] 9397 750 13735 Parameter supply voltage input voltage input diode current output diode current output source or sink current VCC or GND current storage temperature power dissipation Conditions Min −0.5 −0.5 Max +7.0 +7.0 −20 ±20 ±25 ±75 +150 250 Unit V V mA mA mA mA °C mW VI < −0.5 V VO < −0.5 V or VO > VCC + 0.5 V VO > −0.5 V and VO < VCC + 0.5 V [1] −65 Tamb = −40 °C to +125 °C - The input and output voltage ratings may be exceeded if the input and output current ratings are observed. © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 02 — 18 October 2004 4 of 17 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate 10. Recommended operating conditions Table 7: Symbol VCC VI VO Tamb tr, tf Recommended operating operations Parameter supply voltage input voltage output voltage ambient temperature input rise and fall times see Section 11 and Section 12 VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V Conditions Min 2.0 0 0 −40 4.5 0 0 see Section 11 and Section 12 VCC = 4.5 V to 5.5 V −40 Typ 5.0 +25 5.0 +25 Max 5.5 5.5 VCC +125 100 20 5.5 5.5 VCC +125 20 Unit V V V °C ns/V ns/V V V V °C ns/V Type 74AHC2G08 Type 74AHCT2G08 VCC VI VO Tamb tr, tf supply voltage input voltage output voltage ambient temperature input rise and fall times 11. Static characteristics Table 8: Static characteristics type 74AHC2G08 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Tamb = 25 °C VIH HIGH-level input voltage VCC = 2.0 V VCC = 3.0 V VCC = 5.5 V VIL LOW-level input voltage VCC = 2.0 V VCC = 3.0 V VCC = 5.5 V VOH HIGH-level output voltage VI = VIH or VIL IO = −50 µA; VCC = 2.0 V IO = −50 µA; VCC = 3.0 V IO = −50 µA; VCC = 4.5 V IO = −4.0 mA; VCC = 3.0 V IO = −8.0 mA; VCC = 4.5 V 1.9 2.9 4.4 2.58 3.94 2.0 3.0 4.5 V V V V V 1.5 2.1 3.85 0.5 0.9 1.65 V V V V V V Parameter Conditions Min Typ Max Unit 9397 750 13735 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 02 — 18 October 2004 5 of 17 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate Table 8: Static characteristics type 74AHC2G08 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VOL Parameter LOW-level output voltage Conditions VI = VIH or VIL IO = 50 µA; VCC = 2.0 V IO = 50 µA; VCC = 3.0 V IO = 50 µA; VCC = 4.5 V IO = 4.0 mA; VCC = 3.0 V IO = 8.0 mA; VCC = 4.5 V ILI ICC CI VIH input leakage current quiescent supply current input capacitance HIGH-level input voltage VCC = 2.0 V VCC = 3.0 V VCC = 5.5 V VIL LOW-level input voltage VCC = 2.0 V VCC = 3.0 V VCC = 5.5 V VOH HIGH-level output voltage VI = VIH or VIL IO = −50 µA; VCC = 2.0 V IO = −50 µA; VCC = 3.0 V IO = −50 µA; VCC = 4.5 V IO = −4.0 mA; VCC = 3.0 V IO = −8.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 50 µA; VCC = 2.0 V IO = 50 µA; VCC = 3.0 V IO = 50 µA; VCC = 4.5 V IO = 4.0 mA; VCC = 3.0 V IO = 8.0 mA; VCC = 4.5 V ILI ICC CI VIH input leakage current quiescent supply current input capacitance HIGH-level input voltage VCC = 2.0 V VCC = 3.0 V VCC = 5.5 V VIL LOW-level input voltage VCC = 2.0 V VCC = 3.0 V VCC = 5.5 V VI = VCC or GND; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V 1.5 2.1 3.85 0.1 0.1 0.1 0.44 0.44 1.0 10 10 0.5 0.9 1.65 V V V V V µA µA pF V V V V V V 1.9 2.9 4.4 2.48 3.8 V V V V V VI = VCC or GND; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V 1.5 2.1 3.85 0 0 0 1.5 0.1 0.1 0.1 0.36 0.36 0.1 1.0 10 0.5 0.9 1.65 V V V V V µA µA pF V V V V V V Min Typ Max Unit Tamb = −40 °C to +85 °C Tamb = −40 °C to +125 °C 9397 750 13735 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 02 — 18 October 2004 6 of 17 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate Table 8: Static characteristics type 74AHC2G08 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VOH Parameter HIGH-level output voltage Conditions VI = VIH or VIL IO = −50 µA; VCC = 2.0 V IO = −50 µA; VCC = 3.0 V IO = −50 µA; VCC = 4.5 V IO = −4.0 mA; VCC = 3.0 V IO = −8.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 50 µA; VCC = 2.0 V IO = 50 µA; VCC = 3.0 V IO = 50 µA; VCC = 4.5 V IO = 4.0 mA; VCC = 3.0 V IO = 8.0 mA; VCC = 4.5 V ILI ICC CI input leakage current quiescent supply current input capacitance VI = VCC or GND; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V 0.1 0.1 0.1 0.55 0.55 2.0 40 10 V V V V V µA µA pF 1.9 2.9 4.4 2.40 3.70 V V V V V Min Typ Max Unit Table 9: Static characteristics type 74AHCT2G08 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Tamb = 25 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL IO = −50 µA; VCC = 4.5 V IO = −8.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 50 µA; VCC = 4.5 V IO = 8.0 mA; VCC = 4.5 V ILI ICC ∆ICC input leakage current quiescent supply current additional quiescent supply current per input pin input capacitance HIGH-level input voltage LOW-level input voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V VI = 3.4 V; other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V 0 0.1 0.36 0.1 1.0 1.35 V V µA µA mA 4.4 3.94 4.5 V V 2.0 0.8 V V Parameter Conditions Min Typ Max Unit CI VIH VIL 9397 750 13735 2.0 - 1.5 - 10 0.8 pF V V Tamb = −40 °C to +85 °C © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 02 — 18 October 2004 7 of 17 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate Table 9: Static characteristics type 74AHCT2G08 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VOH Parameter HIGH-level output voltage Conditions VI = VIH or VIL IO = −50 µA; VCC = 4.5 V IO = −8.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 50 µA; VCC = 4.5 V IO = 8.0 mA; VCC = 4.5 V ILI ICC ∆ICC input leakage current quiescent supply current additional quiescent supply current per input pin input capacitance HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL IO = −50 µA; VCC = 4.5 V IO = −8.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 50 µA; VCC = 4.5 V IO = 8.0 mA; VCC = 4.5 V ILI ICC ∆ICC input leakage current quiescent supply current additional quiescent supply current per input pin input capacitance VI = VIH or VIL; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V VI = 3.4 V; other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V 0.1 0.55 2.0 40 1.5 V V µA µA mA 4.4 3.70 V V VI = VIH or VIL; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V VI = 3.4 V; other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V 0.1 0.44 1.0 10 1.5 V V µA µA mA 4.4 3.8 V V Min Typ Max Unit CI VIH VIL VOH 2.0 - - 10 0.8 pF V V Tamb = −40 °C to +125 °C CI - - 10 pF 9397 750 13735 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 02 — 18 October 2004 8 of 17 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate 12. Dynamic characteristics Table 10: Dynamic characteristics type 74AHC2G08 At recommended operating conditions; voltages are referenced to GND (ground = 0 V); tr = tf ≤ 3.0 ns; see Figure 7. Symbol tPHL, tPLH Parameter propagation delay nA and nB to nY Conditions see Figure 6 VCC = 3.0 V to 3.6 V; CL = 15 pF VCC = 4.5 V to 5.5 V; CL = 15 pF VCC = 3.0 V to 3.6 V; CL = 50 pF VCC = 4.5 V to 5.5 V; CL = 50 pF CPD power dissipation capacitance propagation delay nA and nB to nY CL = 50 pF; fi = 1 MHz [1] [2] [1] [2] [3] [4] Min Typ Max Unit Tamb = 25 °C 4.6 3.2 6.5 4.6 17 8.8 5.9 12.3 7.9 ns ns ns ns pF Tamb = −40 °C to +85 °C tPHL, tPLH see Figure 6 VCC = 3.0 V to 3.6 V; CL = 15 pF VCC = 4.5 V to 5.5 V; CL = 15 pF VCC = 3.0 V to 3.6 V; CL = 50 pF VCC = 4.5 V to 5.5 V; CL = 50 pF Tamb = −40 °C to +125 °C tPHL, tPLH propagation delay nA and nB to nY see Figure 6 VCC = 3.0 V to 3.6 V; CL = 15 pF VCC = 4.5 V to 5.5 V; CL = 15 pF VCC = 3.0 V to 3.6 V; CL = 50 pF VCC = 4.5 V to 5.5 V; CL = 50 pF [1] [2] [3] Typical values are measured at VCC = 3.3 V. Typical values are measured at VCC = 5.0 V. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs. The condition is VI = GND to VCC. 1.0 1.0 1.0 1.0 - 10.5 7.0 14.0 9.0 ns ns ns ns 1.0 1.0 1.0 1.0 - 12.0 8.0 16.0 10.5 ns ns ns ns [4] 9397 750 13735 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 02 — 18 October 2004 9 of 17 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate Table 11: Dynamic characteristics type 74AHCT2G08 At recommended operating conditions; voltages are referenced to GND (ground = 0 V); tr = tf ≤ 3.0 ns; see Figure 7. Symbol tPHL, tPLH Parameter propagation delay nA and nB to nY Conditions see Figure 6 VCC = 4.5 V to 5.5 V; CL = 15 pF VCC = 4.5 V to 5.5 V; CL = 50 pF CPD power dissipation capacitance propagation delay nA and nB to nY CL = 50 pF; fi = 1 MHz [1] [1] [2] [3] Min Typ Max Unit Tamb = 25 °C 3.6 5.1 19 6.2 7.9 ns ns pF Tamb = −40 °C to +85 °C tPHL, tPLH see Figure 6 VCC = 4.5 V to 5.5 V; CL = 15 pF VCC = 4.5 V to 5.5 V; CL = 50 pF Tamb = −40 °C to +125 °C tPHL, tPLH propagation delay nA and nB to nY see Figure 6 VCC = 4.5 V to 5.5 V; CL = 15 pF VCC = 4.5 V to 5.5 V; CL = 50 pF [1] [2] Typical values are measured at VCC = 5.0 V. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. The condition is VI = GND to VCC. 1.0 1.0 - 7.1 9.0 ns ns 1.0 1.0 - 8.0 10.5 ns ns [3] 13. Waveforms VI nA, nB input GND t PHL VOH nY output VOL VM mna224 VM t PLH 74AHC2G08: VM = 50 % VCC; VI = GND to VCC. 74AHCT2G08: VM = 1.5 V; VI = GND to 3.0 V. Fig 6. The input (nA and nB) to output (nY) propagation delays. 9397 750 13735 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 02 — 18 October 2004 10 of 17 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate VCC PULSE GENERATOR VI D.U.T. RT CL mna101 VO Definitions for test circuit: CL = Load capacitance including jig and probe capacitance (See Section 12 for the value). RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig 7. Load circuitry for switching times. 9397 750 13735 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 02 — 18 October 2004 11 of 17 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate 14. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 D E A X c y HE vMA Z 8 5 A pin 1 index A2 A1 (A3) Lp L θ 1 e bp 4 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.00 A2 0.95 0.75 A3 0.25 bp 0.38 0.22 c 0.18 0.08 D(1) 3.1 2.9 E(1) 3.1 2.9 e 0.65 HE 4.1 3.9 L 0.5 Lp 0.47 0.33 v 0.2 w 0.13 y 0.1 Z(1) 0.70 0.35 θ 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 REFERENCES IEC JEDEC --JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16 Fig 8. Package outline SOT505-2 (TSSOP8). 9397 750 13735 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 02 — 18 October 2004 12 of 17 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 D E A X c y HE vMA Z 8 5 Q A pin 1 index A2 A1 (A3) θ Lp L 1 e bp 4 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1 A1 0.15 0.00 A2 0.85 0.60 A3 0.12 bp 0.27 0.17 c 0.23 0.08 D(1) 2.1 1.9 E(2) 2.4 2.2 e 0.5 HE 3.2 3.0 L 0.4 Lp 0.40 0.15 Q 0.21 0.19 v 0.2 w 0.13 y 0.1 Z(1) 0.4 0.1 θ 8° 0° Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT765-1 REFERENCES IEC JEDEC MO-187 JEITA EUROPEAN PROJECTION ISSUE DATE 02-06-07 Fig 9. Package outline SOT765-1 (VSSOP8). 9397 750 13735 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 02 — 18 October 2004 13 of 17 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 0.95 x 1.95 x 0.5 mm SOT833-1 1 2 3 b 4 4× L (2) L1 e 8 e1 7 e1 6 e1 5 8× (2) A A1 D E terminal 1 index area 0 DIMENSIONS (mm are the original dimensions) UNIT mm A (1) max 0.5 A1 max 0.04 b 0.25 0.17 D 2.0 1.9 E 1.0 0.9 e 0.6 e1 0.5 L 0.35 0.27 L1 0.40 0.32 1 scale 2 mm Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT833-1 REFERENCES IEC --JEDEC MO-252 JEITA --EUROPEAN PROJECTION ISSUE DATE 04-07-15 04-07-22 Fig 10. Package outline SOT833_1 (XSON8). 9397 750 13735 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 02 — 18 October 2004 14 of 17 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate 15. Revision history Table 12: Revision history Release date 20041018 20040206 Data sheet status Product data sheet Product data sheet Change notice Doc. number 9397 750 13735 9397 750 12533 Supersedes 74AHC_AHCT2G08_1 Document ID 74AHC_AHCT2G08_2 Modifications: 74AHC_AHCT2G08_1 Adding features, ordering information, pinning, and package outline 9397 750 13735 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 02 — 18 October 2004 15 of 17 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate 16. Data sheet status Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). III Product data Production [1] [2] [3] Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 17. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 18. Disclaimers Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 19. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com 9397 750 13735 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 02 — 18 October 2004 16 of 17 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate 20. Contents 1 2 3 4 5 6 7 7.1 7.2 8 8.1 9 10 11 12 13 14 15 16 17 18 19 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information . . . . . . . . . . . . . . . . . . . . 16 © Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 18 October 2004 Document number: 9397 750 13735 Published in The Netherlands