74AUP1G74

74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger Rev. 01 — 25 August 2006 Product data sheet 1. General description The 74AUP1G74 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74AUP1G74 provides the single positive-edge triggered D-type flip-flop with individual data (D) input, clock (CP) input, set (SD) and reset (RD) inputs and complementary Q and Q outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D input must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. 2. Features s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s Complies with JEDEC standards: x JESD8-12 (0.8 V to 1.3 V) x JESD8-11 (0.9 V to 1.65 V) x JESD8-7 (1.2 V to 1.95 V) x JESD8-5 (1.8 V to 2.7 V) x JESD8-B (2.7 V to 3.6 V) s ESD protection: x HBM JESD22-A114-D Class 3A exceeds 5000 V x MM JESD22-A115-A exceeds 200 V x CDM JESD22-C101-C exceeds 1000 V s Low static power consumption; ICC = 0.9 µA (maximum) s Latch-up performance exceeds 100 mA per JESD 78 Class II s Inputs accept voltages up to 3.6 V s Low noise overshoot and undershoot < 10 % of VCC Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger s IOFF circuitry provides partial Power-down mode operation s Multiple package options s Specified from −40 °C to +85 °C and −40 °C to +125 °C 3. Ordering information Table 1. Ordering information Package Temperature range Name 74AUP1G74DC 74AUP1G74GT 74AUP1G74GM −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C VSSOP8 XSON8 XQFN8 Description Version plastic very thin shrink small outline package; 8 leads; SOT765-1 body width 2.3 mm plastic extremely thin small outline package; no leads; SOT833-1 8 terminals; body 1 × 1.95 × 0.5 mm plastic extremely thin quad flat package; no leads; 8 terminals; body 1.6 × 1.6 × 0.5 mm SOT902-1 Type number 4. Marking Table 2. Marking Marking code p74 p74 p74 Type number 74AUP1G74DC 74AUP1G74GT 74AUP1G74GM 5. Functional diagram 7 SD 2 1 D CP SD D CP FF Q RD RD 6 mnb139 Q Q 5 7 Q 3 1 2 6 S C1 1D R mnb140 5 3 Fig 1. Logic symbol Fig 2. IEC logic symbol 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 2 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger Q C C C D C Q C RD C SD 001aae087 CP C C Fig 3. Logic diagram 6. Pinning information 6.1 Pinning 74AUP1G74 CP D Q GND 1 2 3 4 001aae322 8 7 6 5 VCC SD RD Q Fig 4. Pin configuration SOT765-1 (VSSOP8) 74AUP1G74 74AUP1G74 CP 1 8 VCC terminal 1 index area SD 1 VCC 8 7 CP D 2 7 SD RD 2 6 D Q 3 6 RD Q 3 4 5 Q GND GND 4 5 Q 001aae324 001aae323 Transparent top view Transparent top view Fig 5. Pin configuration SOT833-1 (XSON8) 74AUP1G74_1 Fig 6. Pin configuration SOT902-1 (XQFN8) © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 3 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger 6.2 Pin description Table 3. Symbol CP D Q GND Q RD SD VCC Pin description Pin SOT765-1 and SOT833-1 1 2 3 4 5 6 7 8 SOT902-1 7 6 5 4 3 2 1 8 clock input (LOW-to-HIGH, edge triggered) data input complement flip-flop output ground (0 V) true flip-flop output asynchronous reset-direct (active LOW) asynchronous set-direct (active LOW) supply voltage Description 7. Functional description Table 4. Input SD L H L Table 5. Input SD H H [1] Asynchronous operation[1] Output RD H L L CP X X X D X X X Q H L H Q L H H Synchronous operation[1] Output RD H H CP ↑ ↑ D L H Qn+1 L H Qn+1 H L H = HIGH voltage level; L = LOW voltage level; ↑ = LOW-to-HIGH CP transition; X = don’t care. 8. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK VI IOK VO IO ICC 74AUP1G74_1 Parameter supply voltage input clamping current input voltage output clamping current output voltage output current supply current Conditions VI < 0 V [1] Min −0.5 −0.5 [1] Max +4.6 −50 +4.6 −50 +4.6 ±20 +50 Unit V mA V mA V mA mA VO < 0 V Active mode and Power-down mode VO = 0 V to VCC −0.5 - © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 4 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger Table 6. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol IGND Tstg Ptot [1] [2] Parameter ground current storage temperature total power dissipation Conditions Min −65 Max −50 +150 250 Unit mA °C mW Tamb = −40 °C to +125 °C [2] - The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. For VSSOP8 packages: above 110 °C the value of Ptot derates linearly with 8.0 mW/K. For XSON8 and XQFN8 packages: above 45 °C the value of Ptot derates linearly with 2.4 mW/K. 9. Recommended operating conditions Table 7. Symbol VCC VI VO Tamb ∆t/∆V Recommended operating conditions Parameter supply voltage input voltage output voltage ambient temperature input transition rise and fall rate VCC = 0.8 V to 3.6 V Active mode Power-down mode; VCC = 0 V Conditions Min 0.8 0 0 0 −40 0 Max 3.6 3.6 VCC 3.6 +125 200 Unit V V V V °C ns/V 10. Static characteristics Table 8. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 °C VIH HIGH-level input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VIL LOW-level input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VOH HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 0.8 V to 3.6 V IO = −1.1 mA; VCC = 1.1 V IO = −1.7 mA; VCC = 1.4 V IO = −1.9 mA; VCC = 1.65 V IO = −2.3 mA; VCC = 2.3 V IO = −3.1 mA; VCC = 2.3 V IO = −2.7 mA; VCC = 3.0 V IO = −4.0 mA; VCC = 3.0 V 74AUP1G74_1 Conditions Min Typ Max - Unit V V V V 0.70 × VCC 0.65 × VCC 1.6 2.0 VCC − 0.1 1.11 1.32 2.05 1.9 2.72 2.6 - 0.30 × VCC V 0.35 × VCC V 0.7 0.9 V V V V V V V V V V 0.75 × VCC - © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 5 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger Table 8. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOL LOW-level output voltage Conditions VI = VIH or VIL IO = 20 µA; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V II IOFF ∆IOFF ICC ∆ICC CI CO VIH input leakage current power-off leakage current additional power-off leakage current supply current additional supply current input capacitance output capacitance HIGH-level input voltage VI = GND to 3.6 V; VCC = 0 V to 3.6 V VI or VO = 0 V to 3.6 V; VCC = 0 V VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V VI = VCC − 0.6 V; IO = 0 A; VCC = 3.3 V; per pin VCC = 0 V to 3.6 V; VI = GND or VCC VO = GND; VCC = 0 V VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VIL LOW-level input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VOH HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 0.8 V to 3.6 V IO = −1.1 mA; VCC = 1.1 V IO = −1.7 mA; VCC = 1.4 V IO = −1.9 mA; VCC = 1.65 V IO = −2.3 mA; VCC = 2.3 V IO = −3.1 mA; VCC = 2.3 V IO = −2.7 mA; VCC = 3.0 V IO = −4.0 mA; VCC = 3.0 V VCC − 0.1 0.7 × VCC 1.03 1.30 1.97 1.85 2.67 2.55 V V V V V V V V [1] Min - Typ 0.6 1.3 Max 0.1 0.3 × VCC 0.31 0.31 0.31 0.44 0.31 0.44 ±0.1 ±0.2 ±0.2 0.5 40 - Unit V V V V V V V V µA µA µA µA µA pF pF V V V V Tamb = −40 °C to +85 °C 0.70 × VCC 0.65 × VCC 1.6 2.0 - 0.30 × VCC V 0.35 × VCC V 0.7 0.9 V V 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 6 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger Table 8. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOL LOW-level output voltage Conditions VI = VIH or VIL IO = 20 µA; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V II IOFF ∆IOFF ICC ∆ICC input leakage current power-off leakage current additional power-off leakage current supply current additional supply current VI = GND to 3.6 V; VCC = 0 V to 3.6 V VI or VO = 0 V to 3.6 V; VCC = 0 V VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V VI = VCC − 0.6 V; IO = 0 A; VCC = 3.3 V; per pin VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VIL LOW-level input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VOH HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 0.8 V to 3.6 V IO = −1.1 mA; VCC = 1.1 V IO = −1.7 mA; VCC = 1.4 V IO = −1.9 mA; VCC = 1.65 V IO = −2.3 mA; VCC = 2.3 V IO = −3.1 mA; VCC = 2.3 V IO = −2.7 mA; VCC = 3.0 V IO = −4.0 mA; VCC = 3.0 V VCC − 0.11 0.6 × VCC 0.93 1.17 1.77 1.67 2.40 2.30 V V V V V V V V [1] Min - Typ - Max 0.1 0.3 × VCC 0.37 0.35 0.33 0.45 0.33 0.45 ±0.5 ±0.5 ±0.6 0.9 50 Unit V V V V V V V V µA µA µA µA µA Tamb = −40 °C to +125 °C VIH HIGH-level input voltage 0.75 × VCC 0.70 × VCC 1.6 2.0 V V V V 0.25 × VCC V 0.30 × VCC V 0.7 0.9 V V 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 7 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger Table 8. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOL LOW-level output voltage Conditions VI = VIH or VIL IO = 20 µA; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V II IOFF ∆IOFF ICC ∆ICC input leakage current power-off leakage current additional power-off leakage current supply current additional supply current VI = GND to 3.6 V; VCC = 0 V to 3.6 V VI or VO = 0 V to 3.6 V; VCC = 0 V VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V VI = VCC − 0.6 V; IO = 0 A; VCC = 3.3 V; per pin [1] Min - Typ - Max 0.11 0.41 0.39 0.36 0.50 0.36 0.50 ±0.75 ±0.75 ±0.75 1.4 75 Unit V V V V V V V µA µA µA µA µA 0.33 × VCC V [1] One input at VCC − 0.6 V, other input at VCC or GND. 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 8 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger 11. Dynamic characteristics Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9. Symbol Parameter Conditions Min CL = 5 pF tpd propagation delay CP to Q, Q; see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V SD to Q, Q; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V RD to Q, Q; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V fmax maximum frequency CP; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V 53 203 347 435 550 619 170 310 400 490 550 170 300 390 480 510 MHz MHz MHz MHz MHz MHz [2] [2] [2] 25 °C Typ[1] Max Min −40 °C to +125 °C Max (85 °C) Min Max (125 °C) Unit 2.9 2.4 1.9 1.7 1.5 2.7 2.4 2.0 1.9 1.8 2.6 2.3 1.9 1.9 1.8 25.4 6.7 4.5 3.5 2.6 2.2 19.6 5.6 4.0 3.3 2.7 2.5 19.2 5.5 3.9 3.2 2.6 2.4 14.0 7.6 5.7 3.7 3.0 11.0 6.3 4.9 3.6 3.1 11.0 6.3 5.0 3.6 3.2 2.6 2.3 1.7 1.4 1.2 2.5 2.2 1.7 1.7 1.5 2.5 2.2 1.8 1.7 1.5 14.2 8.3 6.5 4.3 3.3 11.4 6.9 5.6 3.8 3.5 11.3 6.8 5.6 4.0 3.8 2.6 2.3 1.7 1.4 1.2 2.5 2.2 1.7 1.7 1.5 2.5 2.2 1.8 1.7 1.5 14.2 8.6 6.8 4.6 3.5 11.5 7.3 5.9 4.1 3.7 11.4 7.2 5.9 4.3 4.0 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 9 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger Table 9. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9. Symbol Parameter Conditions Min CL = 10 pF tpd propagation delay CP to Q, Q; see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V SD to Q, Q; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V RD to Q, Q; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V fmax maximum frequency CP; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V 52 192 324 421 486 550 150 280 310 370 410 150 230 250 360 360 MHz MHz MHz MHz MHz MHz [2] [2] [2] 25 °C Typ[1] Max Min −40 °C to +125 °C Max (85 °C) Min Max (125 °C) Unit 3.1 2.7 2.5 2.0 1.8 2.9 2.7 2.6 2.3 2.2 2.8 2.6 2.5 2.2 2.0 28.9 7.5 5.1 4.1 3.2 2.8 23.2 6.5 4.6 3.9 3.2 3.0 22.7 6.4 4.5 3.3 3.2 2.9 15.8 8.7 6.5 4.3 3.7 12.9 7.5 5.6 4.2 3.7 12.8 7.5 5.8 4.2 3.9 2.9 2.4 2.2 1.8 1.6 2.8 2.3 2.3 2.0 1.9 2.7 2.3 2.3 2.0 1.9 16.1 9.4 7.2 4.9 4.0 13.3 7.9 6.3 4.6 4.0 13.2 8.1 6.3 4.6 4.6 2.9 2.4 2.2 1.8 1.6 2.8 2.3 2.3 2.0 1.9 2.7 2.3 2.3 2.0 1.9 16.1 9.8 7.6 5.3 4.3 13.5 8.3 6.6 4.9 4.2 13.4 8.4 6.7 5.0 4.8 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 10 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger Table 9. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9. Symbol Parameter Conditions Min CL = 15 pF tpd propagation delay CP to Q, Q; see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V SD to Q, Q; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V RD to Q, Q; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V fmax maximum frequency CP; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V 50 181 301 407 422 481 120 190 240 300 320 120 160 190 270 300 MHz MHz MHz MHz MHz MHz [2] [2] [2] 25 °C Typ[1] Max Min −40 °C to +125 °C Max (85 °C) Min Max (125 °C) Unit 3.5 3.2 2.7 2.4 2.2 3.3 3.2 2.8 2.8 2.5 3.2 3.1 2.7 2.6 2.4 23.4 8.3 5.6 4.6 3.6 3.2 26.7 7.3 5.2 4.3 3.7 3.5 26.1 7.2 5.1 4.3 3.6 3.4 17.6 9.5 7.2 5.0 4.1 14.7 8.3 6.4 4.8 4.3 14.5 8.4 6.5 4.9 4.4 3.3 2.8 2.5 2.2 2.0 3.1 2.9 2.5 2.2 2.4 3.1 2.7 2.6 2.4 2.3 17.8 10.5 8.1 5.6 4.6 15.2 9.0 7.1 5.3 4.7 15.0 9.2 7.3 5.4 5.2 3.3 2.8 2.5 2.2 2.0 3.1 2.9 2.5 2.2 2.4 3.1 2.7 2.6 2.4 2.3 18.0 11.1 8.6 6.0 4.9 15.4 9.5 7.5 5.6 4.9 15.2 9.7 7.7 5.8 5.4 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 11 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger Table 9. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9. Symbol Parameter Conditions Min CL = 30 pF tpd propagation delay CP to Q, Q; see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V SD to Q, Q; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V RD to Q, Q; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V fmax maximum frequency CP; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V 28 128 206 262 269 309 70 120 150 190 200 70 110 120 170 190 MHz MHz MHz MHz MHz MHz [2] [2] [2] 25 °C Typ[1] Max Min −40 °C to +125 °C Max (85 °C) Min Max (125 °C) Unit 4.2 3.7 3.5 3.3 3.0 4.0 3.8 3.7 3.7 3.4 3.9 3.6 3.5 3.5 3.3 42.7 10.6 7.2 5.8 4.7 4.3 37.0 9.5 6.7 5.6 4.8 4.6 36.4 9.4 6.6 5.5 4.7 4.4 22.5 12.0 9.2 6.3 5.3 19.8 10.9 8.4 6.1 5.6 19.5 10.9 8.5 6.3 5.7 4.0 3.7 3.4 3.0 2.8 3.8 3.7 3.5 3.2 3.1 3.8 3.7 3.5 3.2 3.1 23.0 12.0 9.2 7.5 5.3 20.8 12.0 9.3 6.7 6.4 20.2 12.0 9.5 6.9 6.7 4.0 3.7 3.4 3.0 2.8 3.8 3.7 3.5 3.2 3.1 3.8 3.7 3.5 3.2 3.1 23.3 14.0 11.0 7.5 6.7 21.1 12.7 9.9 7.1 6.7 20.5 12.6 10.1 7.4 7.0 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 12 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger Table 9. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9. Symbol Parameter Conditions Min CL = 5 pF, 10 pF, 15 pF and 30 pF tsu set-up time D to CP HIGH; see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V D to CP LOW; see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V th hold time D to CP; see Figure 7 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V trec recovery time RD; see Figure 8 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V SD; see Figure 8 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V −0.5 −0.4 −0.3 −0.2 −0.1 0 0 0 0.2 0.2 0 0 0 0.2 0.2 ns ns ns ns ns −0.5 −0.2 −0.2 −0.1 −0.1 −0.3 −0.2 −0.1 0.1 0.1 −0.3 −0.2 −0.1 0.1 0.1 ns ns ns ns ns −1.9 −0.3 −0.2 −0.2 −0.2 −0.2 0.2 0 0 0 0 0.2 0 0 0 0 ns ns ns ns ns ns 3.0 0.5 0.3 0.4 0.5 0.6 1.3 1.1 1.0 0.9 0.9 1.3 1.1 1.0 0.9 0.9 ns ns ns ns ns ns 3.4 0.6 0.3 0.4 0.2 0.3 1.1 0.9 0.8 0.6 0.5 1.1 0.9 0.8 0.6 0.5 ns ns ns ns ns ns 25 °C Typ[1] Max Min −40 °C to +125 °C Max (85 °C) Min Max (125 °C) Unit 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 13 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger Table 9. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9. Symbol Parameter Conditions Min tW pulse width CP HIGH or LOW; see Figure 7 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V SD or RD LOW; see Figure 8 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V CPD power dissipation capacitance f = 1 MHz; VI = GND to VCC VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V [1] [2] [3] All typical values are measured at nominal VCC. tpd is the same as tPLH and tPHL. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs. [3] 25 °C Typ[1] Max Min −40 °C to +125 °C Max (85 °C) Min Max (125 °C) Unit - 1.7 1.1 0.7 0.6 0.5 - 2.6 1.5 1.6 1.7 1.9 - 2.6 1.5 1.6 1.7 1.9 - ns ns ns ns ns - 1.9 1.1 0.8 0.5 0.4 - 2.9 1.5 1.1 0.7 0.5 - 3.1 1.7 1.3 0.9 0.7 - ns ns ns ns ns - 2.8 2.9 3.0 3.0 3.5 3.9 - - - - - pF pF pF pF pF pF 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 14 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger 12. Waveforms tW VI CP input GND 1/fmax VI D input GND th t su t PHL VOH Q output VOL VOH Q output VOL t PLH t PHL 001aae365 VM VM th t su t PLH VM VM Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage drop that occur with the output load. Fig 7. The clock input (CP) to output (Q, Q) propagation delays, the clock pulse width, The D to CP set-up and hold times and the maximum clock pulse frequency Table 10. VCC 0.8 V to 3.6 V Measurement points Output VM 0.5 × VCC Input VM 0.5 × VCC VI VCC tr = tf ≤ 3.0 ns Supply voltage 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 15 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger VI CP input GND t rec VI SD input GND tW VI RD input GND t PLH VOH Q output VOL VOH Q output VOL t PHL t PLH 001aae366 VM VM t rec tW VM t PHL VM VM Measurement points are given in Table 11. Logic levels: VOL and VOH are typical output voltage drop that occur with the output load. Fig 8. The set (SD) and reset (RD) input to output (Q, Q) propagation delays, the set and reset pulse widths and the RD to CP recovery time Table 11. VCC 0.8 V to 3.6 V Measurement points Output VM 0.5 × VCC Input VM 0.5 × VCC VI VCC tr = tf ≤ 3.0 ns Supply voltage 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 16 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger VCC VEXT 5 kΩ PULSE GENERATOR VI VO DUT RT CL RL 001aac521 Test data is given in Table 12. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times.. Fig 9. Load circuitry for switching times Table 12. VCC 0.8 V to 3.6 V [1] Test data Load CL RL[1] 5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ VEXT tPLH, tPHL open tPZH, tPHZ GND tPZL, tPLZ 2 × VCC Supply voltage For measuring enable and disable times RL = 5 kΩ, for measuring propagation delays, setup and hold times and pulse width RL = 1 MΩ . 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 17 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger 13. Package outline VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 D E A X c y HE vMA Z 8 5 Q A pin 1 index A2 A1 (A3) θ Lp L 1 e bp 4 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1 A1 0.15 0.00 A2 0.85 0.60 A3 0.12 bp 0.27 0.17 c 0.23 0.08 D(1) 2.1 1.9 E(2) 2.4 2.2 e 0.5 HE 3.2 3.0 L 0.4 Lp 0.40 0.15 Q 0.21 0.19 v 0.2 w 0.13 y 0.1 Z(1) 0.4 0.1 θ 8° 0° Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT765-1 REFERENCES IEC JEDEC MO-187 JEITA EUROPEAN PROJECTION ISSUE DATE 02-06-07 Fig 10. Package outline SOT765-1 (VSSOP8) 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 18 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm SOT833-1 1 2 3 b 4 4× L (2) L1 e 8 e1 7 e1 6 e1 5 8× (2) A A1 D E terminal 1 index area 0 DIMENSIONS (mm are the original dimensions) UNIT mm A (1) max 0.5 A1 max 0.04 b 0.25 0.17 D 2.0 1.9 E 1.05 0.95 e 0.6 e1 0.5 L 0.35 0.27 L1 0.40 0.32 1 scale 2 mm Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT833-1 REFERENCES IEC --JEDEC MO-252 JEITA --EUROPEAN PROJECTION ISSUE DATE 04-07-22 04-11-09 Fig 11. Package outline SOT833-1 (XSON8) 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 19 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger XQFN8: plastic extremely thin quad flat package; no leads; 8 terminals; body 1.6 x 1.6 x 0.5 mm SOT902-1 D terminal 1 index area B A E A A1 detail X L1 L e 4 e ∅v M C A B ∅w M C 5 C y1 C y 3 metal area not for soldering 2 6 b e1 e1 7 1 terminal 1 index area 8 X 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max 0.5 A1 0.05 0.00 b 0.25 0.15 D 1.65 1.55 E 1.65 1.55 e 0.55 e1 0.5 L 0.35 0.25 L1 0.15 0.05 v 0.1 w 0.05 y 0.05 y1 0.05 OUTLINE VERSION SOT902-1 REFERENCES IEC --JEDEC MO-255 JEITA --- EUROPEAN PROJECTION ISSUE DATE 05-11-16 05-11-25 Fig 12. Package outline SOT902-1 (XQFN8) 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 20 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger 14. Abbreviations Table 13. Acronym CDM CMOS DUT ESD HBM MM TTL Abbreviations Description Charged Device Model Complementary Metal Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Machine Model Transistor-Transistor Logic 15. Revision history Table 14. Revision history Release date 20060825 Data sheet status Product data sheet Change notice Supersedes Document ID 74AUP1G74_1 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 21 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger 16. Legal information 16.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.semiconductors.philips.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Philips Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Philips Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. malfunction of a Philips Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Philips Semiconductors accepts no liability for inclusion and/or use of Philips Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — Philips Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.semiconductors.philips.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by Philips Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 16.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, Philips Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — Philips Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — Philips Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com 74AUP1G74_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 August 2006 22 of 23 Philips Semiconductors 74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 21 Legal information. . . . . . . . . . . . . . . . . . . . . . . 22 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 22 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Contact information. . . . . . . . . . . . . . . . . . . . . 22 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © Koninklijke Philips Electronics N.V. 2006. All rights reserved. For more information, please visit: http://www.semiconductors.philips.com. For sales office addresses, email to: sales.addresses@www.semiconductors.philips.com. Date of release: 25 August 2006 Document identifier: 74AUP1G74_1