74AVC16834A

INTEGRATED CIRCUITS 74AVC16834A 18-bit registered driver with inverted register enable and Dynamic Controlled Outputs™ (3-State) Product data Supersedes data of 2000 Jul 25 2002 Sep 11 Philips Semiconductors Philips Semiconductors Product data 18-bit registered driver with inverted register enable and Dynamic Controlled Outputs™ (3-State) 74AVC16834A FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • Complies with JEDEC standard no. 8-1A/5/7 • CMOS low power consumption • Input/output tolerant up to 3.6 V • DCO (Dynamic Controlled Output) circuit dynamically changes output impedance, resulting in noise reduction without speed degradation PIN CONFIGURATION NC NC Y0 GND Y1 Y2 VCC Y3 Y4 Y5 GND Y6 Y7 Y8 Y9 Y10 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 GND NC A0 GND A1 A2 VCC A3 A4 A5 GND A6 A7 A8 A9 A10 A11 GND A12 A13 A14 VCC A15 A16 GND A17 CP GND • Low inductance multiple VCC and GND pins for minimum noise and ground bounce • Power off disables 74AVC16834A outputs, permitting Live • Integrated input diodes to minimize input overshoot and • Full PC133 solution provided when used with PCK2509S or PCK2510S and CBT16292 undershoot Insertion DESCRIPTION The 74AVC16834A is a 18-bit universal bus driver. Data flow is controlled by output enable (OE), latch enable (LE) and clock inputs (CP). This product is designed to have an extremely fast propagation delay and a minimum amount of power consumption. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor (Live Insertion). A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line drive during transient. See the graphs on page 9 for typical curves. Y11 GND Y12 Y13 Y14 VCC Y15 Y16 GND Y17 OE LE SH00156 QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.0 ns; CL = 30 pF. SYMBOL tPHL/tPLH PARAMETER Propagation delay An to Yn Propagation delay LE to Yn; CP to Yn Input capacitance Power dissipation capacitance Power dissipation capacitance per buffer buffer VI = GND to VCC1 GND to Outputs enabled Output disabled VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V CONDITIONS TYPICAL 2.6 2.0 1.7 2.9 2.3 1.9 5.0 25 6 UNIT ns tPHL/tPLH CI CPD ns pF pF pF NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + S (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; S (CL × VCC2 × fo) = sum of outputs. ORDERING INFORMATION PACKAGES 56-Pin Plastic 0.5 mm pitch TSSOP 56-Pin Plastic 0.4 pitch TSSOP (TVSOP) TEMPERATURE RANGE –40°C to +85°C –40°C to +85°C ORDER CODE 74AVC16834ADGG 74AVC16834ADGV DRAWING NUMBER SOT364-1 SOT481-2 2002 Sep 11 2 Philips Semiconductors Product data 18-bit registered driver with inverted register enable and Dynamic Controlled Outputs™ (3-State) 74AVC16834A PIN DESCRIPTION PIN NUMBER 1, 2, 55 3, 5, 6, 8, 9, 10, 12, 13, 14, 15, 16, 17, 19, 20, 21, 23, 24, 26 4, 11, 18, 25, 32, 39, 46, 53, 56 7, 22, 35, 50 27 28 30 54, 52, 51, 49, 48, 47, 45, 44, 43, 42, 41, 40, 38, 37, 36, 34, 33, 31 SYMBOL NC Y0 to Y17 NAME AND FUNCTION No connection Data outputs LOGIC SYMBOL OE GND VCC OE LE CP A0 to A17 Ground (0 V) CP Positive supply voltage Output enable input (active LOW) Latch enable input (active LOW) Clock input Data inputs A1 D LE CP Y1 LE TO THE 17 OTHER CHANNELS SH00202 TYPICAL INPUT (DATA OR CONTROL) VCC A1 SH00200 2002 Sep 11 3 Philips Semiconductors Product data 18-bit registered driver with inverted register enable and Dynamic Controlled Outputs™ (3-State) 74AVC16834A LOGIC SYMBOL (IEEE/IEC) OE CP LE 27 30 28 C3 G2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 Y10 Y11 Y12 Y13 Y14 Y15 Y16 Y17 3 5 6 8 9 10 12 13 14 15 16 17 19 20 21 23 24 26 1∇ 1 3D 54 52 51 49 48 47 45 44 43 42 41 40 38 37 36 34 33 31 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 EN1 2C3 FUNCTION TABLE INPUTS OE H L L L L L L H L X Z ↑ = = = = = LE X L L H H H H CP X X X ↑ ↑ H L A X L H L H X X OUTPUTS Z L H L H Y01 Y02 HIGH voltage level LOW voltage level Don’t care High impedance “off” state LOW-to-HIGH level transition NOTES: 1. Output level before the indicated steady-state input conditions were established, provided that CP is high before LE goes low. 2. Output level before the indicated steady-state input conditions were established. SH00158 168-pin SDR SDRAM DIMM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM BACK SIDE SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM FRONT SIDE 74AVCM16834 74AVCM16834 74AVCM16834 PCK2509S or PCK2510S The PLL clock distribution device and AVCM registered drivers reduce signal loads on the memory controller and prevent timing delays and waveform distortions that would cause unreliable operation SDRAM SW00407 2002 Sep 11 4 Philips Semiconductors Product data 18-bit registered driver with inverted register enable and Dynamic Controlled Outputs™ (3-State) 74AVC16834A RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER DC supply voltage (according to JEDEC Low Voltage Standards) DC supply voltage (for low voltage applications) VI VO Tamb tr, tf DC Input voltage range DC output voltage range; output 3-State DC output voltage range; output HIGH or LOW state Operating free-air temperature range VCC = 1.65 to 2.3 V Input rise and fall times VCC = 2.3 to 3.0 V VCC = 3.0 to 3.6 V CONDITIONS MIN 1.65 2.3 3.0 1.2 0 0 0 –40 0 0 0 MAX 1.95 2.7 3.6 3.6 3.6 3.6 VCC +85 30 20 10 ns/V UNIT V V V V °C VCC ABSOLUTE MAXIMUM RATINGS In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO VO IO IGND, ICC Tstg PTOT PARAMETER DC supply voltage DC input diode current DC input voltage DC output diode current DC output voltage; output 3-State DC output voltage; output HIGH or LOW state DC output source or sink current DC VCC or GND current Storage temperature range Power dissipation per package –plastic thin-medium-shrink (TSSOP) For temperature range: –40 to +125 °C above +55 °C derate linearly with 8 mW/K VI t0 For all inputs1 VO uVCC or VO t 0 Note 1 Note 1 VO = 0 to VCC CONDITIONS RATING –0.5 to +4.6 –50 –0.5 to 4.6 "50 –0.5 to 4.6 –0.5 to VCC +0.5 "50 "100 –65 to +150 600 UNIT V mA V mA V V mA mA °C mW NOTE: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2002 Sep 11 5 Philips Semiconductors Product data 18-bit registered driver with inverted register enable and Dynamic Controlled Outputs™ (3-State) 74AVC16834A DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V). LIMITS SYMBOL PARAMETER VCC = 1.2 V VIH HIGH level Input voltage level Input voltage VCC = 1.65 to 1.95 V VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 1.2 V VIL LOW level Input voltage level Input voltage VCC = 1.65 to 1.95 V VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 1.65 to 3.6V; VI = VIH or VIL; IO = –100 µA VOH OH HIGH level output voltage g VCC = 1.65 V; VI = VIH or VIL; IO = –4 mA VCC = 2.3 V; VI = VIH or VIL; IO = –8 mA VCC = 3.0 V; VI = VIH or VIL; IO = –12 mA VCC = 1.65 to 3.6 V; VI = VIH or VIL; IO = 100 µA VOL OL LOW level output voltage g VCC = 1.65 V; VI = VIH or VIL; IO = 4 mA VCC = 2.3 V; VI = VIH or VIL; IO = 8 mA VCC = 3.0 V; VI = VIH or VIL; IO = 12 mA II IOFF IIHZ/IILZ Input leakage current In ut leakage current 3-State output OFF-state current 3-State output OFF-state current VCC = 1.65 to 3.6 V; to VI = VCC or GND or GND VCC = 0 V; VI or VO = 3.6 V VCC = 1.65 to 3.6 V; VI = VCC or GND VCC = 1.65 to 2.7 V; VI = VIH or VIL; VO = VCC or GND VCC = 3.0 to 3.6 V; VI = VIH or VIL; VO = VCC or GND VCC = 1.65 to 2.7 V; VI = VCC or GND; IO = 0 VCC = 3.0 to 3.6 V; VI = VCC or GND; IO = 0 TEST CONDITIONS Temp = –40°C to +85°C MIN VCC 0.65VCC 1.7 2.0 – – – – VCC*0.20 VCC*0.45 VCC*0.55 VCC*0.70 – – – – – – – – – – – TYP1 – 0.9 1.2 1.5 – 0.9 1.2 1.5 VCC VCC*0.10 VCC*0.28 VCC*0.32 GND GND 0.10 0.26 0.36 0.1 0.1 0.1 0.1 0.1 0.1 0.2 MAX – – – – GND 0.35VCC 0.7 0.8 – – – – 0.20 0.45 0.55 0.70 2.5 "10 12.5 5 µA 10 20 40 µA µA µA µA V V V V UNIT IO OZ 3-State output OFF-state current output OFF current ICC Quiescent supply current Quiescent supply current NOTE: 1. All typical values are at Tamb = 25 °C. 2002 Sep 11 6 Philips Semiconductors Product data 18-bit registered driver with inverted register enable and Dynamic Controlled Outputs™ (3-State) 74AVC16834A AC CHARACTERISTICS GND = 0 V; tr = tf ≤ 2.0 ns; CL = 30 pF LIMITS SYMBOL PARAMETER WAVEFORM VCC = 3.3 ± 0.3 V MIN TYP1 MAX VCC = 2.5 ± 0.2 V MIN TYP1 MAX VCC = 1.8 ± 0.15 V MIN TYP1 MAX VCC = 1.5 ± 0.1 V MIN MAX VCC = 1.5 V TYP VCC = 1.2 V TYP UNIT Propagation delay An to Yn tPHL/tPLH Propagation delay LE to Yn Propagation delay CP to Yn tPZH/tPZL 3-State output enable time OE to Yn 3-State output disable time OE to Yn CP pulse width HIGH or LOW LE pulse width HIGH Set-up time An to CP Set-up time An to LE Hold time An to CP Hold time An to LE Maximum clock pulse frequency 1, 7 0.9 0.7 1.2 0.7 0.8 0.7 1.3 1.0 1.5 1.0 1.0 1.0 0.3 0.5 0.9 0.6 500 1.7 2.0 1.9 1.7 2.5 2.3 3.0 2.3 – – –0.5 0.1 0.6 0.4 – 2.6 2.5 3.0 2.9 2.5 4.3 4.0 4.7 3.5 – – – – – – – 1.0 0.8 1.5 0.8 1.1 0.8 1.6 1.0 1.5 1.0 1.2 1.2 0.1 0.6 0.7 0.2 400 2.0 2.4 2.3 2.0 2.8 2.5 3.4 2.2 – – –0.2 0.1 0.3 0.1 – 3.2 3.0 3.7 3.5 3.0 4.8 4.5 5.6 4.0 – – – – – – – 1.5 1.0 1.8 1.0 1.6 1.0 2.2 1.5 2.4 1.5 2.0 2.0 0 1.0 0.7 0.1 250 2.8 2.6 3.4 2.9 2.8 2.6 4.0 3.0 4.6 3.5 – – –0.2 0.5 0.3 0 – 4.9 4.5 5.3 4.4 4.5 6.7 6.5 7.2 6.5 – – – – – – – 2.0 5.8 3.6 5.9 5.2 6.5 5.8 4.9 5.2 8.0 5.5 6.5 5.5 – ns – 0 ns 1.5 0.1 ns –0.7 – MHz ns ns 2, 7 2.3 6.5 4.0 3, 7 2.0 5.1 3.7 6, 7 2.8 8.2 5.0 tPHZ/tPLZ 6, 7 3, 7 2, 7 5, 7 4, 7 5, 7 4, 7 3, 7 2.1 – – 0.2 1.5 0.6 0.1 – 6.9 – – – – – – – 4.5 – – 0 0.8 0.3 0 – ns tW tS SU th fmax NOTE: 1. All typical values are measured at Tamb = 25 °C and at VCC = 1.8 V, 2.5 V, 3.3 V. 2002 Sep 11 7 Philips Semiconductors Product data 18-bit registered driver with inverted register enable and Dynamic Controlled Outputs™ (3-State) 74AVC16834A VM = 0.5 VCC VX = VOL + 0.300 V VY = VOH – 0.300 V VOL and VOH are the typical output voltage drop that occur with the output load. VI = VCC An INPUT GND LE INPUT AC WAVEFORMS FOR VCC = 2.3 V TO 2.7 V AND VCC < 2.3 V RANGE VM = 0.5 VCC VX = VOL + 0.15 V VY = VOH – 0.15 V VOL and VOH are the typical output voltage drop that occur with the output load. VI = VCC VI An INPUT GND VM GND NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. VM = 0.5VCC at VCC = 2.3 to 2.7 V SH00166 Waveform 4. Data set-up and hold times for the An input to the LE input CP INPUT GND VOH Yn OUTPUT VOL NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V VM VI An INPUT GND VOH SH00132 Yn OUTPUT VOL NOTE: Waveform 1. Input (An) to output (Yn) propagation delay VI LE INPUT GND VM tW VM The shaded areas indicate when the input is permitted to change for predictable output performance. VM = 0.5VCC at VCC = 2.3 to 2.7 V SH00136 Waveform 5. Data set-up and hold times for the An input to the clock CP input tPHL VOH Yn OUTPUT VOL VM tPLH VI nOE INPUT VM NOTE: VM = 0.5 VCC at VCC = 2.3 to 2.7 V GND SH00165 Waveform 2. Latch enable input (LE) pulse width, the latch enable input to output (Yn) propagation delays. VCC OUTPUT LOW-to-OFF OFF-to-LOW VM VX VOL 1/fMAX VI CP INPUT GND VM tW VM VOH tPHL VOH Yn OUTPUT VOL VM tPLH OUTPUT HIGH-to-OFF OFF-to-HIGH GND outputs enabled NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V SH00135 NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V Waveform 3. The clock (CP) to Yn propagation delays, the clock pulse width and the maximum clock frequency. Waveform 6. 3-State enable and disable times 2002 Sep 11 8 ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉ tPHL tPLH ÉÉÉ É ÉÉÉÉÉÉÉÉÉÉ ÉÉÉ É ÉÉÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉ VI VM th th tSU tSU VI VM VI VM tsu th tsu th VM tPLZ tPZL tPHZ tPZH VY VM outputs disabled outputs enabled AC WAVEFORMS FOR VCC = 3.0 V TO 3.6 V RANGE SH00137 Philips Semiconductors Product data 18-bit registered driver with inverted register enable and Dynamic Controlled Outputs™ (3-State) 74AVC16834A TEST CIRCUIT VCC S1 2 * VCC Open GND GRAPHS 3.5 VOL OUTPUT VOLTAGE (V) 3 2.5 2 1.5 1 0.5 0 0 50 100 150 200 250 I OL OUTPUT CURRENT (mA) VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VI PULSE GENERATOR RT D.U.T. VO RL CL RL Test Circuit for switching times DEFINITIONS RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators. SWITCH POSITION TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 2 < VCC GND SH00204 VCC < 2.3 V 2.3–2.7 V 3.0 V VI VCC VCC VCC RL 1000 Ω 500 Ω 500 Ω VOH OUTPUT VOLTAGE (V) 3.5 3.0 2.5 2.0 1.5 1.0 V = 3.3 V 0.5 CC 0.0 –250 VCC = 2.5 V –150 VCC = 1.8 V –100 –50 0 Figure 1. Output voltage (VOL) vs. output current (IOL) SV01018 Waveform 7. Load circuitry for switching times –200 I OH OUTPUT CURRENT (mA) SH00205 Figure 2. Output voltage (VOH) vs. output current (IOH) A Dynamic Controlled Output (DCO) circuit is designed in. During the transition, it initially lowers the output impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figures 1 and 2 show VOL vs. IOL and VOH vs. IOH curves to illustrate the output impedance and drive capability of the circuit. At the beginning of the signal transition, the DCO circuit provides a maximum dynamic drive that is equivalent to a high drive standard output device. 2002 Sep 11 9 Philips Semiconductors Product data 18-bit registered driver with inverted register enable and Dynamic Controlled Outputs™ (3-State) 74AVC16834A TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm SOT364-1 2002 Sep 11 10 Philips Semiconductors Product data 18-bit registered driver with inverted register enable and Dynamic Controlled Outputs™ (3-State) 74AVC16834A TSSOP56: plastic thin shrink small outline package; 56 leads; body width 4.4 mm SOT481-2 2002 Sep 11 11 Philips Semiconductors Product data 18-bit registered driver with inverted register enable and Dynamic Controlled Outputs™ (3-State) 74AVC16834A REVISION HISTORY Rev Date _4 _5 2000 Jul 25 2002 Sep 11 Description Product specification (9397 750 07353); fourth version. Engineering Change Notice: 853-2207 24201: Product data (9397 750 10331); fifth version supersedes Product specification 2000 Jul 25. Engineering Change Notice: 853-2207 28874 (2002 Sep 09). Modifications: Add new package option (TVSOP) to existing product data sheet. 2002 Sep 11 12 Philips Semiconductors Product data 18-bit registered driver with inverted register enable and Dynamic Controlled Outputs™ (3-State) 74AVC16834A Data sheet status Data sheet status [1] Objective data Preliminary data Product status [2] Development Qualification Definitions This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 © Koninklijke Philips Electronics N.V. 2002 All rights reserved. Printed in U.S.A. Date of release: 09-02 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. Document order number: 9397 750 10331 Philips Semiconductors 2002 Sep 11 13