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74F350

74F350

  • 厂商:

    PHILIPS

  • 封装:

  • 描述:

    74F350 - 4-bit shifter - NXP Semiconductors

  • 数据手册
  • 价格&库存
74F350 数据手册
Philips Semiconductors FAST Products Product specification 4-bit shifter 74F350 FEATURES select lines • Shifts 4 bits of data to 0, 1, 2, 3 places under control of two • 3-State outputs for bus organized systems DESCRIPTION The 74F350 is a combination logic circuit that shifts a 4-bit word from 0 to 3 places. No clocking is required as with shift registers. The 74F350 can be used to shift any number of bits any number of places up or down by suitable interconnection. Shifting can be: 1. Logical — with logic zeros filled in at either end of the shifting field. 2. Arithmetic — where the sign bit is extended during a shift down. 3. End around — where the data word forms a continuous loop. The 3-State outputs are useful for bus interface applications or expansion to a larger number of shift positions in end around shifting. The active Low Output Enable (OE) controls the state of the outputs. The outputs are in the high impedance “off” state when OE is High, and they are active when OE is Low. PIN CONFIGURATION I–3 I–2 I–1 I0 I1 I2 I3 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC Y0 Y1 OE Y2 Y3 S0 S1 SF00205 ORDERING INFORMATION DESCRIPTION 16-pin plastic DIP 16-pin plastic SO COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F350N N74F350D TYPE 74F350 TYPICAL PROPAGATION DELAY 5.2ns TYPICAL SUPPLY CURRENT (TOTAL) 24mA INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS I–n, In S0, S1 OE Y0 – Y3 Data inputs Select inputs (active Low) Output Enable input (active Low) Data outputs DESCRIPTION 74F (U.L.) HIGH/LOW 1.0/2.0 1.0/2.0 1.0/2.0 150/40 LOAD VALUE HIGH/LOW 20µA/1.2mA 20µA/1.2mA 20µA/1.2mA 3.0mA/24mA NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. LOGIC SYMBOL 1 2 3 4 5 6 7 IEC/IEEE SYMBOL D MUX 10 9 13 I–3 I–2 I–1 I0 I1 I2 I3 10 11 12 13 11 12 13 14 12 13 14 15 13 14 15 16 3 2 1 0 3 2 1 0 3 2 1 0 3 2 1 0 0 1 EN G 0 [SHIFTER] 3 9 10 13 S1 S0 OE Y0 Y1 Y2 Y3 2 3 15 14 12 11 4 5 Z11 Z12 Z13 Z14 Z15 Z16 1 Z10 ≥1 15 ≥1 14 VCC = Pin 16 GND = Pin 8 ≥1 12 SF00206 6 7 ≥1 11 SF00207 March 20, 1989 1 853–0368 96093 Philips Semiconductors FAST Products Product specification 4-bit shifter 74F350 LOGIC DIAGRAM I–3 1 I–2 2 I–1 3 I0 4 I1 5 I2 6 I3 7 S1 9 S0 10 OE 13 15 VCC = Pin 16 GND = Pin 8 Y0 14 Y1 12 Y2 11 Y3 SF00208 FUNCTION TABLE INPUTS OE H L L L L H= L= X= Z= Dn = S1 X L L H H S0 X L H L H I3 X D3 X X X I2 X D2 D2 X X I1 X D1 D1 D1 X I0 X D0 D0 D0 D0 I–1 X X D–1 D–1 D–1 I–2 X X X D–2 D–2 I–3 X X X X D–3 Y3 Z D3 D2 D1 D0 OUTPUTS Y2 Z D2 D1 D0 D–1 Y1 Z D1 D0 D–1 D–2 Y0 Z D0 D–1 D–2 D–3 High voltage level Low voltage level Don’t care High impedance “off” state High or Low state of referenced In input March 20, 1989 2 Philips Semiconductors FAST Products Product specification 4-bit shifter 74F350 APPLICATION FOR 16-BIT SHIFT UP 0, 1, 2, OR 3 PLACES 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 GND I-3 I-2 I-1 I0 I1 I2 I3 S0 S1 OE Y0 Y1 Y2 Y3 S0 S1 OE 0 S0 L H L H S1 L L H H MODE No shift Shift 1 place Shift 2 places Shift 3 places 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 S0 S1 OE Y0 Y1 Y2 Y3 I-3 I-2 I-1 I0 I1 I2 I3 S0 S1 OE Y0 Y1 Y2 Y3 I-3 I-2 I-1 I0 I1 I2 I3 S0 S1 OE Y0 Y1 Y2 Y3 I-3 I-2 I-1 I0 I1 I2 I3 SF00209 APPLICATION FOR 8-BIT END AROUND SHIFT 0, 1, 2, 3, 4, 5, 6, OR 7 PLACES 0 1 2 3 4 5 6 7 I-3 I-2 I-1 I0 I1 I2 I3 S0 S1 OE Y0 Y1 Y2 Y3 S0 S1 S2 S3 S0 S1 I-3 I-2 I-1 I0 I1 I2 I3 S0 S1 I-3 I-2 I-1 I0 I1 I2 I3 S0 S1 I-3 I-2 I-1 I0 I1 I2 I3 OE Y0 Y1 Y2 Y3 OE Y0 Y1 Y2 Y3 OE Y0 Y1 Y2 Y3 0 S2 L L L L H H H H S1 L L H H L L H H S0 L H L H L H L H 1 2 3 4 5 6 7 MODE No shift Shift end around 1 Shift end around 2 Shift end around 3 Shift end around 4 Shift end around 5 Shift end around 6 Shift end around 7 SF00210 March 20, 1989 3 Philips Semiconductors FAST Products Product specification 4-bit shifter 74F350 APPLICATION FOR 13-BIT TWO’S COMPLEMENT SCALER 12 11 10 9 8 7 6 5 4 3 2 1 0 I-3 I-2 I-1 I0 I1 I2 I3 S0 S1 OE Y0 Y1 Y2 Y3 S0 S1 S0 S1 I-3 I-2 I-1 I0 I1 I2 I3 S0 S1 I-3 I-2 I-1 I0 I1 I2 I3 OE Y0 Y1 Y2 Y3 OE Y0 Y1 Y2 Y3 S1 L L H H S0 L H L H ÷8 ÷4 ÷2 No change SCALE 1/8 1/4 1/2 1 12 11 10 9 8 7 6 5 4 3 2 1 0 SF00211 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Current applied to output in Low output state Operating free-air temperature range Storage temperature range PARAMETER RATING –0.5 to +7.0 –0.5 to +7.0 –30 to +5 –0.5 to VCC 48 0 to +70 –65 to +150 UNIT V V mA V mA °C °C RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC VIH VIL IIK IOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current Operating free-air temperature range 0 PARAMETER MIN 4.5 2.0 0.8 –18 –3 24 +70 NOM 5.0 MAX 5.5 V V V mA mA mA °C UNIT March 20, 1989 4 Philips Semiconductors FAST Products Product specification 4-bit shifter 74F350 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS1 VCC = MIN, VIL = MAX VIH = MIN, IOH = MAX Low-level output voltage Input clamp voltage Input current at maximum input voltage High-level input current Low-level input current Off-state output current, High-level voltage applied Off-state output current, Low-level voltage applied Short-circuit output current3 ICCH ICC Supply current (total) ICCL ICCZ VCC = MAX VCC = MIN, VIL = MAX VIH = MIN, IOL = MAX VCC = MIN, II = IIK VCC = MAX, VI = 7.0V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.5V VCC = MAX, VO = 2.7V VCC = MAX, VO = 0.5V VCC = MAX –60 22 26 26 ±10%VCC ±5%VCC ±10%VCC ±5%VCC LIMITS MIN 2.4 V 2.7 3.4 0.35 0.35 –0.73 0.50 V 0.50 –1.2 100 20 –1.2 50 –50 –150 35 41 42 V µA µA mA µA µA mA mA mA mA TYP2 MAX UNIT VOH High-level output voltage VOL VIK II IIH IIL IOZH IOZL IOS NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITION VCC = +5.0V Tamb = +25°C CL = 50pF, RL = 500Ω MIN tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation delay In to Yn Propagation delay Sn to Yn Output Enable time to High or Low level Output Disable time to High or Low level Waveform 1 Waveform 1 Waveform 2 Waveform 3 Waveform 2 Waveform 3 3.0 2.5 4.0 3.0 2.5 4.0 2.0 2.0 TYP 4.5 4.0 7.8 6.5 5.0 7.0 3.9 4.0 MAX 6.0 5.5 10.0 8.5 7.0 9.0 5.5 5.5 VCC = +5.0V ± 10% Tamb = 0°C to +70°C CL = 50pF, RL = 500Ω MIN 3.0 2.5 4.0 3.0 2.5 4.0 2.0 2.0 MAX 7.0 6.5 11.0 9.5 8.0 10.0 6.5 6.5 ns ns ns ns UNIT March 20, 1989 5 Philips Semiconductors FAST Products Product specification 4-bit shifter 74F350 AC WAVEFORMS For all waveforms, VM = 1.5V. In, I–n, Sn VM tPLH VM tPHL Yn VM VM SF00212 Waveform 1. Propagation Delay Data and Select to Output OE VM tPZH VM tPHZ OE VM tPZL Yn VM VOH–0.3V 0V VM VOL+0.3V VM tPLZ Yn SF00213 SF00214 Waveform 2. 3-State Output Enable Time to High Level and Output Disable Time from High Level Waveform 3. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level TEST CIRCUIT AND WAVEFORMS VCC 7.0V VIN PULSE GENERATOR RT D.U.T. VOUT RL NEGATIVE PULSE 90% VM 10% tTHL (tf ) CL RL tTLH (tr ) 90% POSITIVE PULSE 10% tTHL (tf ) AMP (V) 90% VM tw 10% 0V tw VM 10% tTLH (tr ) 0V AMP (V) 90% Test Circuit for Open Collector Outputs SWITCH POSITION TEST tPLZ tPZL All other SWITCH closed closed open VM Input Pulse Definition DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tTHL 2.5ns SF00128 March 20, 1989 6
74F350 价格&库存

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