74HC237N

74HC237 3-to-8 line decoder, demultiplexer with address latches Rev. 03 — 12 November 2004 Product data sheet 1. General description The 74HC237 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC237 is specified in compliance with JEDEC standard no. 7A. The 74HC237 is a 3-to-8 line decoder, demultiplexer with latches at the three address inputs (An). The 74HC237 essentially combines the 3-to-8 decoder function with a 3-bit storage latch. When the latch is enabled (LE = LOW), the 74HC237 acts as a 3-to-8 active LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present at the inputs before this transition, is stored in the latches. Further address changes are ignored as long as LE remains HIGH. The output enable input (E1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH. The 74HC237 is ideally suited for implementing non-overlapping decoders in 3-state systems and strobed (stored address) applications in bus oriented systems. 2. Features s s s s s s Combines 3-to-8 decoder with 3-bit latch Multiple input enable for easy expansion or independent controls Active HIGH mutually exclusive outputs Low-power dissipation Complies with JEDEC standard no. 7A ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V. s Multiple package options s Specified from −40 °C to +80 °C and from −40 °C to +125 °C. Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches 3. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns. Symbol tPHL, tPLH Parameter propagation delay An to Yn LE to Yn E1 to Yn E2 to Yn CI CPD [1] Conditions CL = 15 pF; VCC = 5 V Min - Typ 16 19 14 14 3.5 60 Max - Unit ns ns ns ns pF pF input capacitance power dissipation capacitance VI = GND to VCC [1] - CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs. 4. Ordering information Table 2: Ordering information Package Temperature range 74HC237N 74HC237D 74HC237DB −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C Name DIP16 SO16 SSOP16 Description plastic dual in-line package; 16 leads (300 mil) plastic small outline package; 16 leads; body width 3.9 mm plastic shrink small outline package; 16 leads; body width 5.3 mm Version SOT38-4 SOT109-1 SOT338-1 Type number 9397 750 13807 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 2 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches 5. Functional diagram 4 LE Y0 15 Y1 14 1 A0 2 A1 3 A2 INPUT LATCHES 3 TO 8 DECODER Y2 13 Y3 12 Y4 11 Y5 10 Y6 9 Y7 7 5 E1 6 E2 001aab871 Fig 1. Functional diagram DX 4 1 2 4 LE Y0 Y1 1 2 3 A0 A1 A2 INPUT LATCHES Y2 Y3 3 TO 8 DECODER Y4 Y5 Y6 Y7 15 14 13 12 11 10 9 7 4 1 2 3 E1 5 6 E2 001aab869 C8 0 0 8D,G 7 2 0 1 2 3 4 5 15 14 13 12 11 10 9 7 3 5 6 & 6 7 X/Y C8 8D,1 8D,2 8D,4 0 1 2 3 4 5 5 6 EN 001aab870 15 14 13 12 11 10 9 7 & 6 7 Fig 2. Logic symbol Fig 3. IEC logic symbol 9397 750 13807 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 3 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches A0 A0 LE LATCH A0 LE Y0 Y1 A1 A1 LE LATCH A1 LE Y2 A2 A2 LE LATCH A2 LE Y3 Y4 LE Y5 Y6 Y7 E1 001aab872 E2 Fig 4. Logic diagram 6. Pinning information 6.1 Pinning A0 A1 A2 LE E1 E2 Y7 GND 1 2 3 4 16 VCC 15 Y0 14 Y1 13 Y2 237 5 6 7 8 001aab868 12 Y3 11 Y4 10 Y5 9 Y6 Fig 5. Pin configuration 9397 750 13807 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 4 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches 6.2 Pin description Table 3: Symbol A0 A1 A2 LE E1 E2 Y7 GND Y6 Y5 Y4 Y3 Y2 Y1 Y0 VCC Pin description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Description data input 0 data input 1 data input 2 latch enable input (active LOW) data enable input 1 (active LOW) data enable input 2 (active HIGH) multiplexer output 7 ground (0 V) multiplexer output 6 multiplexer output 5 multiplexer output 4 multiplexer output 3 multiplexer output 2 multiplexer output 1 multiplexer output 0 positive supply voltage 7. Functional description 7.1 Function table Table 4: Enable LE H X X L E1 L H X L E2 H X L H Function table Input A0 X X X L H L H L H L H [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care. Output A1 X X X L L H H L L H H A2 X X X L L L L H H H H Y0 stable L L H L L L L L L L L L L H L L L L L L L L L L H L L L L L L L L L L H L L L L L L L L L L H L L L L L L L L L L H L L L L L L L L L L H L L L L L L L L L L H Y1 Y2 Y3 Y4 Y5 Y6 Y7 9397 750 13807 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 5 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches 8. Limiting values Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK IOK IO ICC, IGND Tstg Ptot Parameter supply voltage input diode current output diode current output source or sink current VCC or GND current storage temperature power dissipation DIP16 package SO16 and SSOP16 packages [1] [2] [1] [2] Conditions VI < −0.5 V or VI > VCC + 0.5 V VO < −0.5 V or VO > VCC + 0.5 V VO = −0.5 V to VCC + 0.5 V Min −0.5 −65 - Max +7 ±20 ±20 ±25 ±50 +150 750 500 Unit V mA mA mA mA °C mW mW Above 70 °C: Ptot derates linearly with 12 mW/K. Above 70 °C: Ptot derates linearly with 8 mW/K. 9. Recommended operating conditions Table 6: Symbol VCC VI VO tr, tf Recommended operating conditions Parameter supply voltage input voltage output voltage input rise and fall times VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V Tamb ambient temperature Conditions Min 2.0 0 0 −40 Typ 5.0 6.0 Max 6.0 VCC VCC 1000 500 400 +125 Unit V V V ns ns ns °C 9397 750 13807 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 6 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches 10. Static characteristics Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Tamb = 25 °C VIH HIGH-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 2.0 V IO = −20 µA; VCC = 4.5 V IO = −20 µA; VCC = 6.0 V IO = −4 mA; VCC = 4.5 V IO = −5.2 mA; VCC = 6.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 µA; VCC = 2.0 V IO = 20 µA; VCC = 4.5 V IO = 20 µA; VCC = 6.0 V IO = 4 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V ILI ICC CI VIH input leakage current quiescent supply current input capacitance HIGH-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 2.0 V IO = −20 µA; VCC = 4.5 V IO = −20 µA; VCC = 6.0 V IO = −4 mA; VCC = 4.5 V IO = −5.2 mA; VCC = 6.0 V 1.9 4.4 5.9 3.84 5.34 V V V V V VI = VCC or GND; VCC = 6.0 V VI = VCC or GND; IO = 0 A; VCC = 6.0 V 1.5 3.15 4.2 0 0 0 0.15 0.16 3.5 0.1 0.1 0.1 0.26 0.26 ±0.1 8.0 0.5 1.35 1.8 V V V V V µA µA pF V V V V V V 1.9 4.4 5.9 3.98 5.48 2.0 4.5 6.0 4.32 5.81 V V V V V 1.5 3.15 4.2 1.2 2.4 3.2 0.8 2.1 2.8 0.5 1.35 1.8 V V V V V V Parameter Conditions Min Typ Max Unit Tamb = −40 °C to +85 °C 9397 750 13807 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 7 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches Table 7: Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VOL Parameter LOW-level output voltage Conditions VI = VIH or VIL IO = 20 µA; VCC = 2.0 V IO = 20 µA; VCC = 4.5 V IO = 20 µA; VCC = 6.0 V IO = 4 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V ILI ICC input leakage current quiescent supply current VI = VCC or GND; VCC = 6.0 V VI = VCC or GND; IO = 0 A; VCC = 6.0 V VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 2.0 V IO = −20 µA; VCC = 4.5 V IO = −20 µA; VCC = 6.0 V IO = −4 mA; VCC = 4.5 V IO = −5.2 mA; VCC = 6.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 µA; VCC = 2.0 V IO = 20 µA; VCC = 4.5 V IO = 20 µA; VCC = 6.0 V IO = 4 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V ILI ICC input leakage current quiescent supply current VI = VCC or GND; VCC = 6.0 V VI = VCC or GND; IO = 0 A; VCC = 6.0 V 0.1 0.1 0.1 0.4 0.4 ±1.0 160 V V V V V µA µA 1.9 4.4 5.9 3.7 5.2 V V V V V 0.1 0.1 0.1 0.33 0.33 ±1.0 80 V V V V V µA µA Min Typ Max Unit Tamb = −40 °C to +125 °C VIH HIGH-level input voltage 1.5 3.15 4.2 0.5 1.35 1.8 V V V V V V 9397 750 13807 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 8 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches 11. Dynamic characteristics Table 8: Dynamic characteristics GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 9. Symbol Tamb = 25 °C tPHL, tPLH propagation delay An to Yn see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VCC = 5.0 V; CL = 15 pF propagation delay LE to Yn see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VCC = 5.0 V; CL = 15 pF propagation delay E1to Yn see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VCC = 5.0 V; CL = 15 pF propagation delay E2 to Yn see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VCC = 5.0 V; CL = 15 pF tTHL, tTLH output transition time see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tW LE pulse width HIGH see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tsu set-up time An to LE see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V th hold time An to LE see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V CPD 9397 750 13807 Parameter Conditions Min Typ Max Unit 50 10 9 50 10 9 30 6 5 [1] 52 19 15 16 61 22 18 19 47 17 14 14 47 17 14 14 19 7 6 11 4 3 6 2 2 3 1 1 60 160 32 27 190 38 32 145 29 25 145 29 25 75 15 13 - ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns pF power dissipation capacitance VI = GND to VCC - © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 9 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches Table 8: Dynamic characteristics …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 9. Symbol tPHL, tPLH Parameter propagation delay An to Yn Conditions see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V propagation delay LE to Yn see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V propagation delay E1 to Yn see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V propagation delay E2 to Yn see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tTHL, tTLH output transition time see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tW LE pulse width HIGH see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tsu set-up time An to LE see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V th hold time An to LE see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 40 8 7 ns ns ns 65 13 11 ns ns ns 65 13 11 ns ns ns 95 19 16 ns ns ns 180 36 31 ns ns ns 180 36 31 ns ns ns 240 48 41 ns ns ns 200 40 34 ns ns ns Min Typ Max Unit Tamb = −40 °C to +85 °C 9397 750 13807 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 10 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches Table 8: Dynamic characteristics …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 9. Symbol tPHL, tPLH Parameter propagation delay An to Yn Conditions see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V propagation delay LE to Yn see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V propagation delay E1 to Yn see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V propagation delay E2 to Yn see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tTHL, tTLH output transition time see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tW LE pulse width HIGH see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tsu set-up time An to LE see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V th hold time An to LE see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V [1] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs. © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Min Typ Max Unit Tamb = −40 °C to +125 °C 75 15 13 75 15 13 45 9 8 240 48 41 285 57 48 220 44 38 220 44 38 110 22 19 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 9397 750 13807 Product data sheet Rev. 03 — 12 November 2004 11 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches 12. Waveforms An, E2, LE input VM tPHL Yn output tPLH VM tTHL tTLH 001aab873 VM = 0.5 × VI. Fig 6. Waveforms showing the address input (An) and enable inputs (E2, LE) to output (Yn) propagation delays and the output transition times E1 input VM tPHL Yn output tPLH VM tTHL tTLH 001aab874 VM = 0.5 × VI. Fig 7. Waveforms showing the enable input (E1) to output (Yn) propagation delays and the output transition times An input VM th VM latched th tsu LE input transparant tsu transparant tW latched 001aab875 The shaded areas indicate when the input is permitted to change for predictable output performance. VM = 0.5 × VI. Fig 8. Waveforms showing the data set-up, hold times for An input to LE input and the latch enable pulse width 9397 750 13807 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 12 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches VCC PULSE GENERATOR VI D.U.T. RT CL mna101 VO Test data is given in Table 9. Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. Fig 9. Load circuitry for switching times Table 9: Supply VCC 2.0 V 4.5 V 6.0 V 5.0 V Test data Input VI VCC VCC VCC VCC tr, tf 6 ns 6 ns 6 ns 6 ns Load CL 50 pF 50 pF 50 pF 15 pF 13. Application information strobe decoder enable X0 X1 X2 LE A2 A1 A0 237 E1 E2 input address Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 01234567 X3 X4 X5 to five other decoders LE A2 A1 A0 237 E1 E2 LE A2 A1 A0 237 E1 E2 LE A2 A1 A0 237 E1 E2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 01234567 outputs Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 8 9 10 11 12 13 14 15 outputs Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 16 17 18 19 20 21 22 23 outputs 001aab876 Fig 10. 6-to-64 line decoder with input address storage 9397 750 13807 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 13 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches 14. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 D seating plane ME A2 A L A1 c Z e b1 b 16 9 b2 MH wM (e 1) pin 1 index E 1 8 0 5 scale 10 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.02 A2 max. 3.2 0.13 b 1.73 1.30 0.068 0.051 b1 0.53 0.38 0.021 0.015 b2 1.25 0.85 0.049 0.033 c 0.36 0.23 0.014 0.009 D (1) 19.50 18.55 0.77 0.73 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.1 e1 7.62 0.3 L 3.60 3.05 0.14 0.12 ME 8.25 7.80 0.32 0.31 MH 10.0 8.3 0.39 0.33 w 0.254 0.01 Z (1) max. 0.76 0.03 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT38-4 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 95-01-14 03-02-13 Fig 11. Package outline SOT38-4 (DIP16) 9397 750 13807 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 14 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE vMA Z 16 9 Q A2 pin 1 index θ Lp 1 e bp 8 wM L detail X A1 (A 3) A 0 2.5 scale 5 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT109-1 REFERENCES IEC 076E07 JEDEC MS-012 JEITA EUROPEAN PROJECTION A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 10.0 9.8 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 0.039 0.016 Q 0.7 0.6 0.028 0.020 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3 θ 0.010 0.057 0.069 0.004 0.049 0.019 0.0100 0.39 0.014 0.0075 0.38 0.244 0.041 0.228 0.028 0.004 0.012 8 o 0 o ISSUE DATE 99-12-27 03-02-19 Fig 12. Package outline SOT109-1 (SO16) 9397 750 13807 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 15 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 D E A X c y HE vM A Z 16 9 Q A2 A1 pin 1 index Lp L 1 bp 8 wM detail X (A 3) θ A e 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 6.4 6.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 1.00 0.55 θ 8 o 0 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC MO-150 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 13. Package outline SOT338-1 (SSOP16) 9397 750 13807 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 16 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches 15. Revision history Table 10: Revision history Release date 20041112 Data sheet status Product data sheet Change notice Doc. number Supersedes Document ID 74HC237_3 Modifications: 9397 750 13807 74HC_HCT237_CNV_2 • • • The format of this data sheet has been redesigned to comply with the current presentation and information standard of Philips Semiconductors. Removed type number 74HCT237. Inserted family specification. Product specification Product specification 74HC_HCT237_1 - 74HC_HCT237_CNV_2 19970828 74HC_HCT237_1 19901201 9397 750 13807 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 17 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches 16. Data sheet status Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). III Product data Production [1] [2] [3] Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 17. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 18. Disclaimers Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 19. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com 9397 750 13807 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 12 November 2004 18 of 19 Philips Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches 20. Contents 1 2 3 4 5 6 6.1 6.2 7 7.1 8 9 10 11 12 13 14 15 16 17 18 19 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 Functional description . . . . . . . . . . . . . . . . . . . 5 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 7 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Application information. . . . . . . . . . . . . . . . . . 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Contact information . . . . . . . . . . . . . . . . . . . . 18 © Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 12 November 2004 Document number: 9397 750 13807 Published in The Netherlands