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74HCT1G66GW

74HCT1G66GW

  • 厂商:

    PHILIPS

  • 封装:

  • 描述:

    74HCT1G66GW - Bilateral switch - NXP Semiconductors

  • 数据手册
  • 价格&库存
74HCT1G66GW 数据手册
INTEGRATED CIRCUITS DATA SHEET 74HC1G66; 74HCT1G66 Bilateral switch Product specification Supersedes data of 2001 Mar 02 2002 May 15 Philips Semiconductors Product specification Bilateral switch FEATURES • Wide operating voltage range from 2.0 to 9.0 V • Very low ON-resistance: – 45 Ω (typical) at VCC = 4.5 V – 30 Ω (typical) at VCC = 6.0 V – 25 Ω (typical) at VCC = 9.0 V. • High noise immunity • Low power dissipation • Very small 5 pins package • Output capability: non standard. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6.0 ns. DESCRIPTION 74HC1G66; 74HCT1G66 The 74HC1G/HCT1G66 is a high-speed Si-gate CMOS device. The 74HC1G/HCT1G66 provides an analog switch. The switch has two input/output pins (Y and Z) and an active HIGH enable input pin (E). When pin E is LOW, the analog switch is turned off. The non standard output currents are equal compared to the 74HC/HCT4066. TYPICAL SYMBOL tPZH/tPZL tPHZ/tPLZ CI CPD CS Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + ∑ ((CL +CS)× VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; CS = maximum switch capacitance in pF; VCC = supply voltage in Volts; ∑ ((CL +CS)× VCC2 × fo) = sum of outputs. 2. For HC1G the condition is VI = GND to VCC. For HCT1G the condition is VI = GND to VCC − 1.5 V. FUNCTION TABLE See note 1. INPUT E L H Note 1. H = HIGH voltage level; L = LOW voltage level. 2002 May 15 2 SWITCH OFF ON PARAMETER turn-on time E to Vos turn-off time E to Vos input capacitance power dissipation capacitance maximum switch capacitance notes 1 and 2 CONDITIONS HC1G CL = 15 pF; RL = 1 kΩ; VCC = 5 V 11 CL = 15 pF; RL = 1 kΩ; VCC = 5 V 11 1.5 9 8 HCT1G 12 12 1.5 9 8 ns ns pF pF pF UNIT Philips Semiconductors Product specification Bilateral switch ORDERING INFORMATION PACKAGE OUTSIDE NORTH AMERICA 74HC1G66GW 74HCT1G66GW 74HC1G66GV 74HCT1G66GV PINNING PIN 1 2 3 4 5 Y Z GND E VCC SYMBOL TEMPERATURE RANGE −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C PINS 5 5 5 5 PACKAGE SC-88A SC-88A SC-74A SC-74A 74HC1G66; 74HCT1G66 MATERIAL plastic plastic plastic plastic CODE SOT353 SOT353 SOT753 SOT753 MARKING HL TL H66 T66 DESCRIPTION independent input/output Y independent input/output Z ground (0 V) enable input E (active HIGH) supply voltage handbook, halfpage Y1 Z2 GND 3 MNA074 5 VCC handbook, halfpage 66 4 E 4 Y E Z 1 2 MNA075 Fig.1 Pin configuration. Fig.2 Logic symbol. handbook, halfpage Y E handbook, halfpage 1 4# 1 1 X1 MNA076 2 VCC VCC GND Z MNA077 Fig.3 IEC logic symbol. Fig.4 Logic diagram. 2002 May 15 3 Philips Semiconductors Product specification Bilateral switch RECOMMENDED OPERATING CONDITIONS 74HC1G66 SYMBOL VCC VI VS Tamb PARAMETER supply voltage input voltage switch voltage operating ambient temperature input rise and fall times see DC and AC characteristics per device VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VCC = 10.0 V CONDITIONS MIN. 2.0 GND GND −40 TYP. 5.0 − − − 74HC1G66; 74HCT1G66 74HCT1G66 UNIT MIN. 4.5 GND GND −40 TYP. 5.0 − − − MAX. 5.5 VCC VCC +125 V V V °C MAX. 10.0 VCC VCC +125 tr, tf − − − − − 6.0 − − 1000 500 400 250 − − − − − 6.0 − − − 500 − − ns ns ns ns LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V); see note 1. SYMBOL VCC IIK ISK IS ICC Tstg PD PS Notes 1. To avoid drawing VCC current out of pin Z, when switch current flows in pin Y, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into pin Z, no VCC current will flow out of terminal Y. In this case there is no limit for the voltage drop across the switch, but the voltage at pins Y and Z may not exceed VCC or GND. 2. Above 55 °C the value of PD derates linearly with 2.5 mW/K. PARAMETER supply voltage input diode current switch diode current switch source or sink current VCC or GND current storage temperature power dissipation per package power dissipation per switch for temperature range from −40 to + 125 °C; note 2 VI < − 0.5 V or VI > VCC + 0.5 V VS < − 0.5 V or VS > VCC + 0.5 V −0.5 V < VS < VCC + 0.5 V CONDITIONS MIN. −0.5 − − − − −65 − − MAX. +11.0 ±20 ±20 ±25 ±50 +150 200 100 UNIT V mA mA mA mA °C mW mW 2002 May 15 4 Philips Semiconductors Product specification Bilateral switch DC CHARACTERISTICS 74HC1G66; 74HCT1G66 Family 74HC1G66 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER VIH HIGH-level input voltage VCC (V) 2.0 4.5 6.0 9.0 VIL LOW-level input voltage 2.0 4.5 6.0 9.0 ILI IS input leakage current analog switch current, OFF-state analog switch current, ON-state ICC quiescent supply current VI = VCC or GND VI = VIH or VIL; VS = VCC − GND; see Fig.6 VI = VIH or VIL; VS = VCC − GND; see Fig.7 VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND 6.0 10.0 10.0 MIN. 1.5 3.15 4.2 6.3 − − − − − − − Tamb (°C) −40 to +85 TYP.(1) 1.2 2.4 3.2 4.7 0.8 2.1 2.8 4.3 0.1 0.2 0.1 MAX. − − − − 0.5 1.35 1.8 2.7 1.0 2.0 1.0 −40 to +125 MIN. 1.5 3.15 4.2 6.3 − − − − − − − MAX. − − − − 0.5 1.35 1.8 2.7 1.0 2.0 1.0 V V V V V V V V µA µA µA UNIT 10.0 − 0.1 1.0 − 1.0 µA 6.0 10.0 − − 1.0 2.0 10 20 − − 20 40 µA µA Note 1. All typical values are measured at Tamb = 25 °C. 2002 May 15 5 Philips Semiconductors Product specification Bilateral switch 74HC1G66; 74HCT1G66 Family 74HCT1G66 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER VIH VIL ILI IS HIGH-level input voltage LOW-level input voltage input leakage current analog switch current, OFF-state analog switch current, ON-state ICC quiescent supply current additional supply current per input VI = VCC or GND VI = VIH or VIL; VS = VCC − GND; see Fig.6 VI = VIH or VIL; VS = VCC − GND; see Fig.7 VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND VI = VCC − 2.1 V VCC (V) 4.5 to 5.5 4.5 to 5.5 5.5 5.5 Tamb (°C) −40 to +85 MIN. TYP.(1) 2.0 0.1 − − 1.6 1.2 0.1 0.1 MAX. − 0.8 1.0 1.0 −40 to +125 MIN. 2.0 − − − MAX. − 0.8 1.0 1.0 V V µA µA UNIT 5.5 − 0.1 1.0 − 1.0 µA 4.5 to 5.5 − 1 10 − 20 µA ∆ICC Note 4.5 to 5.5 − − 500 − 850 µA 1. All typical values are measured at Tamb = 25 °C. 2002 May 15 6 Philips Semiconductors Product specification Bilateral switch Family 74HC1G66 and 74HCT1G66 For 74HC1G66: VCC = 2.0, 4.5, 6.0 or 9.0 V; note 1. For 74HCT1G66: VCC = 4.5 V. TEST CONDITIONS SYMBOL PARAMETER OTHER RON ON-resistance (peak) Vis = VCC to GND; VI = VIH or VIL; see Fig.5 VCC (V) 2.0 4.5 6.0 9.0 ON-resistance (rail) Vis = GND; VI = VIH or VIL; see Fig.5 2.0 4.5 6.0 9.0 Vis = VCC; VI = VIH or VIL; see Fig.5 2.0 4.5 6.0 9.0 Notes IS (µA) 100 74HC1G66; 74HCT1G66 Tamb (°C) −40 to +85 MIN. − TYP.(2) MAX. − 42 31 23 75 29 23 18 75 35 27 21 − 118 105 88 − 95 82 70 − 106 94 78 −40 to +125 MIN. − − − − − − − − − − − − MAX. − 142 126 105 − 115 100 80 − 128 113 95 Ω Ω Ω Ω Ω Ω Ω Ω Ω Ω Ω Ω UNIT 1000 − 1000 − 1000 − 100 − 1000 − 1000 − 1000 − 100 − 1000 − 1000 − 1000 − 1. At supply voltages approaching 2 V, the analog switch ON-resistance becomes extremely non-linear. Therefore it is recommended that these devices be used to transmit digital signals only, when using this supply voltage. 2. All typical values are measured at Tamb = 25 °C. 2002 May 15 7 Philips Semiconductors Product specification Bilateral switch 74HC1G66; 74HCT1G66 HIGH (from enable inputs) LOW (from enable input) V Y Y Z A A VO = GND or VCC GND MNA079 Z Vis = 0 to VCC - GND Iis VI = VCC or GND GND MNA078 Fig.5 Test circuit for measuring ON-resistance (RON). Fig.6 Test circuit for measuring OFF-state current. handbook, halfpage 80 MNA081 RON (Ω) HIGH (from enable input) 60 Y A VI = VCC or GND Z 40 A VCE = 4.5 V 6.0 V VO (open circuit) GND MNA080 9.0 V 20 0 0 2 4 6 6 V (V) 10 is Fig.8 Fig.7 Test circuit for measuring ON-state current. Typical ON-resistance (RON) as a function of input voltage (Vis) for Vis = 0 to VCC. 2002 May 15 8 Philips Semiconductors Product specification Bilateral switch AC CHARACTERISTICS Type 74HC1G66 GND = 0 V; tr = tf = 6 ns. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS tPHL/tPLH propagation delay Vis to Vos RL = ∞; CL = 50 pF; see Fig.12 VCC (V) 2.0 4.5 6.0 9.0 tPZH/tPZL turn-on time E to Vos RL = 1 kΩ; CL = 50 pF; 2.0 see Figs 13 and 14 4.5 6.0 9.0 tPHZ/tPLZ turn-off time E to Vos RL = 1 kΩ; CL = 50 pF: 2.0 see Figs 13 and 14 4.5 6.0 9.0 Note 1. All typical values are measured at Tamb = 25 °C. MIN. − − − − − − − − − − − − 74HC1G66; 74HCT1G66 Tamb (°C) −40 to +85 TYP.(1) 8 3 2 1 50 16 13 9 27 16 14 12 MAX. 75 15 13 10 125 25 21 16 190 38 33 16 − − − − − − − − − − − − −40 to +125 MIN. MAX. 90 18 15 12 150 30 26 20 225 45 38 20 ns ns ns ns ns ns ns ns ns ns ns ns UNIT Type 74HCT1G66 GND = 0 V; tr = tf = 6 ns; Vis is the input voltage at pins Y or Z, whichever is assigned as an input. Vos is the output voltage at pins Y or Z, whichever is assigned as an output. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS tPHL/tPLH tPZH/tPZL tPHZ/tPLZ Note 1. All typical values are measured at Tamb = 25 °C. propagation delay Vis to Vos turn-on time E to Vos turn-off time E to Vos RL = ∞; CL = 50 pF; see Fig.12. VCC (V) 4.5 MIN. − − − Tamb (°C) −40 to +85 TYP.(1) 3 15 13 MAX. 15 30 44 − − − −40 to +125 MIN. MAX. 18 36 53 ns ns ns UNIT RL = 1 kΩ; CL = 50 pF; 4.5 see Figs 15 and 16. RL = 1 kΩ; CL = 50 pF; 4.5 see Figs 15 and 16. 2002 May 15 9 Philips Semiconductors Product specification Bilateral switch 74HC1G66; 74HCT1G66 Type 74HC1G66 and 74HCT1G66 At recommended conditions and typical values. GND = 0 V; tr = tf = 6.0 ns. Vis is the input voltage at pins Y or Z, whichever is assigned as an input; Vos is the output voltage at pins Y or Z, whichever is assigned as an output. SYMBOL PARAMETER sine-wave distortion f = 1 kHz sine-wave distortion f = 10 kHz switch OFF signal feed-through fmax CS Notes 1. Adjust input voltage Vis is 0 dBm level (0 dBM = 1 mW into 600 Ω). 2. Adjust input voltage Vis is 0 dBm level at Vos for 1 MHz (0 dBM = 1 mW into 50 Ω). minimum frequency response (−3 dB) maximum switch capacitance TEST CONDITIONS RL = 10 kΩ; CL = 50 pF; see Fig.12 RL = 10 kΩ; CL = 50 pF; see Fig.12 RL = 600 Ω; CL = 50 pF; f = 1 MHz; see Figs 9 and 13 RL = 50 Ω; CL = 10 pF; see Figs 10 and 11 Vis(p-p) (V) 4.0 8.0 4.0 8.0 note 1 note 2 VCC (V) 4.5 9.0 4.5 9.0 4.5 9.0 4.5 9.0 TYP. 0.04 0.02 0.12 0.06 −50 −50 180 200 8 UNIT % % % % dB dB MHz MHz pF 2002 May 15 10 Philips Semiconductors Product specification Bilateral switch 74HC1G66; 74HCT1G66 MNA082 handbook, full pagewidth 0 (dB) −20 −40 −60 −80 −100 10 102 103 104 105 f (kHz) 106 Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 Ω; RSOURCE = 1 kΩ. Fig.9 Typical switch OFF signal feed-through as a function of frequency. MNA083 handbook, full pagewidth 5 (dB) 0 −5 10 102 103 104 105 f (kHz) 106 Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 Ω; RSOURCE = 1 kΩ. Fig.10 Typical frequency response. 2002 May 15 11 Philips Semiconductors Product specification Bilateral switch 74HC1G66; 74HCT1G66 handbook, full pagewidth VCC 2RL Y/Z 2RL channel ON MNA084 0.1 µF Vis sine-wave Z/Y CL dB Vos GND Adjust input voltage to obtain 0 dBm at Vos when fin = 1 MHz. After set-up, frequency of fin is increased to obtain a reading of −3 db at Vos. Fig.11 Test circuit for measuring minimum frequency response. handbook, full pagewidth VCC 2RL Y/Z Z/Y DISTORTION METER GND MNA085 10 µF Vis fin = 1 kHz sine-wave Vos 2RL channel ON CL Fig.12 Test circuit for measuring sine-wave distortion. handbook, full pagewidth VCC 2RL Y/Z 2RL channel OFF MNA086 0.1 µF Vis Z/Y CL dB Vos GND Fig.13 Test circuit for measuring switch OFF signal feed-through. 2002 May 15 12 Philips Semiconductors Product specification Bilateral switch AC WAVEFORMS 74HC1G66; 74HCT1G66 VI E INPUT handbook, halfpageVI VM(1) GND Vis GND VM(1) VCC OUTPUT LOW-to-OFF OFF-to-LOW tPLZ tPZL tPLH VOH(2) Vos VOL(2) VM(1) tPHL VM(1) VX(2) tPHZ tPZH VY(3) VM(1) GND outputs enabled outputs disabled outputs enabled MNA088 MNA087 OUTPUT HIGH-to-OFF OFF-to-HIGH (1) For HC1G VM = 50% For HCT1G VM = 1.3 V. (2) VOL and VOH are the typical output voltage drop that occur with the output load. (1) For HC1G VM = 50%; VI = GND to VCC For HCT1G VM = 1.3 V; VI = GND to 3.0 V. (2) VX = 10% of signal amplitude. (3) VY = 90% of signal amplitude. Fig.14 The input (Vis) to output (Vos) propagation delays. Fig.15 The turn-on and turn-off times. handbook, halfpage VCC VI D.U.T. RT CL 50 pF VO RL = 1 kΩ S1 VCC open tW 90% NEGATIVE INPUT PULSE 10% VM (1) PULSE GENERATOR AMPLITUDE 0V tTHL (tf) tTLH (tr) tTLH (tr) tTHL (tf) AMPLITUDE VM (1) MNA090 90% Definitions for test circuit: CL = load capacitance including jig and probe capacitance (see “AC characteristics” for values) RT = termination resistance should be equal to the output impedance Zo of the pulse generator. POSITIVE INPUT PULSE 10% 0V tW MNA089 TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH VCC S1 open GND tr = tf = 6 ns, when measuring fmax, there is no constraint on tr, tf with 50% duty factor. (1) For HC1G66: VM = 50%; VI = GND to VCC For HCT1G66: VM = 1.3 V; VI = GND to 3.0 V. Fig.16 Test circuit for measuring AC performance. Fig.17 Input pulse definitions. 2002 May 15 13 Philips Semiconductors Product specification Bilateral switch PACKAGE OUTLINES Plastic surface mounted package; 5 leads 74HC1G66; 74HCT1G66 SOT353 D B E A X y HE vMA 5 4 Q A A1 1 e1 e 2 bp 3 wM B detail X Lp c 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E (2) 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT353 REFERENCES IEC JEDEC EIAJ SC-88A EUROPEAN PROJECTION ISSUE DATE 97-02-28 2002 May 15 14 Philips Semiconductors Product specification Bilateral switch 74HC1G66; 74HCT1G66 Plastic surface mounted package; 5 leads SOT753 D B E A X y HE vMA 5 4 Q A A1 c 1 2 3 detail X Lp e bp wM B 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 0.100 0.013 bp 0.40 0.25 c 0.26 0.10 D 3.1 2.7 E 1.7 1.3 e 0.95 HE 3.0 2.5 Lp 0.6 0.2 Q 0.33 0.23 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT753 REFERENCES IEC JEDEC JEITA SC-74A EUROPEAN PROJECTION ISSUE DATE 02-04-16 2002 May 15 15 Philips Semiconductors Product specification Bilateral switch SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 220 °C for thick/large packages, and below 235 °C for small/thin packages. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. 74HC1G66; 74HCT1G66 If wave soldering is used the following conditions must be observed for optimal results: • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. 2002 May 15 16 Philips Semiconductors Product specification Bilateral switch 74HC1G66; 74HCT1G66 Suitability of surface mount IC packages for wave and reflow soldering methods PACKAGE(1) BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC(4), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy from your Philips Semiconductors sales office. 2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. not suitable not suitable(3) SOLDERING METHOD WAVE REFLOW(2) suitable suitable suitable suitable suitable suitable not not recommended(4)(5) recommended(6) 2002 May 15 17 Philips Semiconductors Product specification Bilateral switch DATA SHEET STATUS DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2) Development 74HC1G66; 74HCT1G66 DEFINITIONS This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. Preliminary data Qualification Product data Production Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. DEFINITIONS Short-form specification  The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition  Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information  Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications  These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes  Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 2002 May 15 18 Philips Semiconductors Product specification Bilateral switch NOTES 74HC1G66; 74HCT1G66 2002 May 15 19 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2002 SCA74 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613508/03/pp20 Date of release: 2002 May 15 Document order number: 9397 750 09723
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