74LV157N

INTEGRATED CIRCUITS 74LV157 Quad 2-input multiplexer Product specification Supersedes data of 1997 May 15 IC24 Data Handbook 1998 Apr 30 Philips Semiconductors Philips Semiconductors Product specification Quad 2-input multiplexer 74LV157 FEATURES • Optimized for low voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, • Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, • Output capability: standard • ICC category: MSI DESCRIPTION The 74LV157 is a low-voltage CMOS device and is pin and function compatible with 74HC/HCT157. The 74LV157 is a quad 2-input multiplexer which selects 4 bits of data from two sources under the control of a common data select input (S). Tamb = 25°C Tamb = 25°C The four outputs present the selected data in the true (non-inverted) form. The enable input (E) is active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all other input conditions. Moving the data from two groups of registers to four common output buses is a common use of the 74LV157. The state of the common data select input (S) determines the particular register from which the data comes. It can also be used as function generator. The device is useful for implementing highly irregular logic by generating any four of the 16 different functions of two variables with one variable common. The 74LV157 is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns SYMBOL PARAMETER Propagation delay nl0, nl1, to nY E to nY S to nY Input capacitance Power dissipation capacitance per gate VI = GND to VCC 1 CONDITIONS CL = 15 pF; VCC = 3.3 V TYPICAL 10 11 12 3.5 70 UNIT tPHL/tPLH CI CPD ns pF pF NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi ) (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL × VCC2 × fo) = sum of the outputs. ORDERING INFORMATION PACKAGES 16-Pin Plastic DIL 16-Pin Plastic SO 16-Pin Plastic SSOP Type II 16-Pin Plastic TSSOP Type I TEMPERATURE RANGE –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C OUTSIDE NORTH AMERICA 74LV157 N 74LV157 D 74LV157 DB 74LV157 PW NORTH AMERICA 74LV157 N 74LV157 D 74LV157 DB 74LV157PW DH PKG. DWG. # SOT38-4 SOT109-1 SOT338-1 SOT403-1 1998 Apr 30 2 853–1920 19318 Philips Semiconductors Product specification Quad 2-input multiplexer 74LV157 PIN CONFIGURATION S 1I 1I 0 1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 V CC E 4I 4I 0 1 LOGIC SYMBOL 2 3 5 6 11 10 14 13 1I0 1 15 S E 1I1 2I0 2I1 3I0 3I1 4I0 4I1 1Y 2I 2I 0 1 4Y 3I 3I 0 1Y 2Y GND 1 2Y 3Y 4Y 3Y 4 7 9 12 SV00563 SV00564 PIN DESCRIPTION PIN NUMBER 1 2, 5, 11, 14 3, 6, 10, 13 4, 7, 9, 12 8 15 16 SYMBOL S 1l0 to 4l0 1l1 to 4l1 1Y to 4Y GND E VCC FUNCTION Common data select input Data inputs from source 0 Data inputs from source 1 Multiplexer outputs Ground (0 V) Enable inputs (active LOW) Positive supply voltage FUNCTIONAL DIAGRAM 2 3 1I 0 1I 1 1Y 4 5 6 2I 0 2I 1 SELECTOR MULTIPLEXER OUTPUTS 3Y 9 2Y 7 11 10 3I 0 3I 1 4I 0 4I 1 LOGIC SYMBOL (IEEE/IEC) 1 15 G1 EN 14 13 4Y 12 S 1 E 15 2 3 5 1 1 MUX 4 SV00566 7 6 11 9 10 14 12 13 SV00565 1998 Apr 30 3 Philips Semiconductors Product specification Quad 2-input multiplexer 74LV157 RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO Tamb tr, tf PARAMETER DC supply voltage Input voltage Output voltage Operating ambient temperature range in free air See DC and AC characteristics VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V CONDITIONS See Note 1 MIN 1.0 0 0 –40 –40 – – – – – – TYP 3.3 – – MAX 3.6 VCC VCC +85 +125 500 200 100 UNIT V V V °C ns/V Input rise and fall times NOTE: 1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 3.6V. ABSOLUTE MAXIMUM RATINGS1, 2 In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). SYMBOL VCC "IIK "IOK "IO "IGND, "ICC Tstg PTOT PARAMETER DC supply voltage DC input diode current DC output diode current DC output source or sink current – standard outputs DC VCC or GND current for types with – standard outputs Storage temperature range Power dissipation per package – plastic DIL – plastic mini-pack (SO) – plastic shrink mini-pack (SSOP and TSSOP) for temperature range: –40 to +125°C above +70°C derate linearly with 12 mW/K above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K VI < –0.5 or VI > VCC + 0.5V VO < –0.5 or VO > VCC + 0.5V –0.5V < VO < VCC + 0.5V CONDITIONS RATING –0.5 to +4.6 20 50 25 UNIT V mA mA mA 50 –65 to +150 750 500 400 mA °C mW NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1998 Apr 30 4 Philips Semiconductors Product specification Quad 2-input multiplexer 74LV157 DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions. Voltages are referenced to GND (ground = 0 V). LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN VCC = 1.2 V VIH HIGH l level I l Input t voltage VCC = 2.0 V VCC = 2.7 to 3.6 V VCC = 1.2 V VIL LOW l level I l Input t voltage VCC = 2.0 V VCC = 2.7 to 3.6 V VCC = 1.2 V; VI = VIH or VIL; –IO = 100µA VO OH HIGH level output voltage; all outputs VCC = 2.0 V; VI = VIH or VIL; –IO = 100µA VCC = 2.7 V; VI = VIH or VIL; –IO = 100µA VCC = 3.0 V; VI = VIH or VIL; –IO = 100µA VOH HIGH level output voltage; STANDARD outputs VCC = 3.0 V; VI = VIH or VIL; –IO = 6mA VCC = 1.2 V; VI = VIH or VIL; IO = 100µA VO OL LOW level output voltage; all outputs VCC = 2.0 V; VI = VIH or VIL; IO = 100µA VCC = 2.7 V; VI = VIH or VIL; IO = 100µA VCC = 3.0 V; VI = VIH or VIL; IO = 100µA VOL LOW level output voltage; STANDARD outputs Input leakage current Quiescent supply current; MSI Additional quiescent supply current per input VCC = 3.0 V; VI = VIH or VIL; IO = 6mA 1.8 2.5 2.8 2.40 1.2 2.0 2.7 3.0 2.82 0 0 0 0 0.25 0.2 0.2 0.2 0.40 0.2 0.2 0.2 0.50 V V 1.8 2.5 2.8 2.20 V V 0.9 1.4 2.0 0.3 0.6 0.8 -40°C to +85°C TYP1 MAX -40°C to +125°C MIN 0.9 1.4 2.0 0.3 0.6 0.8 V V MAX UNIT II ICC ∆ICC VCC = 3.6 V; VI = VCC or GND VCC = 3.6 V; VI = VCC or GND; IO = 0 VCC = 2.7 V to 3.6 V; VI = VCC – 0.6 V 1.0 20.0 500 1.0 160 850 µA µA µA NOTE: 1. All typical values are measured at Tamb = 25°C. 1998 Apr 30 5 Philips Semiconductors Product specification Quad 2-input multiplexer 74LV157 AC CHARACTERISTICS GND = 0V; tr = tf = 2.5ns; CL = 50pF; RL = KΩ SYMBOL PARAMETER WAVEFORM CONDITION VCC(V) 1.2 tPHL/tPLH Propagation delay to nY; nl0 to nY; nl1 to nY Figures 1, 2 2.0 2.7 3.0 to 3.6 1.2 tPHL/tPLH Propagation delay g y E to nY Figures 1, 2 2.0 2.7 3.0 to 3.6 1.2 tPHL/tPLH / Propagation delay g y S to nY Figures Figures 1, 2 2.0 2.7 3.0 to 3.6 NOTES: 1. Unless otherwise stated, all typical values are measured at Tamb = 25°C 2. Typical values are measured at VCC = 3.3 V. MIN LIMITS –40 to +85 °C TYP1 65 22 16 122 70 24 18 132 75 26 19 142 49 36 29 60 44 35 ns 44 33 26 54 40 32 ns 43 31 25 51 38 30 ns MAX –40 to +125 °C MIN MAX UNIT AC WAVEFORMS VM = 1.5 V at VCC ≥ 2.7 V; VM = 0.5 V × VCC at VCC < 2.7 V. VOL and VOH are the typical output voltage drop that occur with the output load. V CC E INPUT VM TEST CIRCUIT VCC VI PULSE GENERATOR RT D.U.T. VO 50pF CL RL = 1k GND t PHL V OH nY OUTPUT V OL VM t PLH Test Circuit for switching times DEFINITIONS RL = Load resistor SV00567 CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators. TEST tPLH/tPHL VCC < 2.7V 2.7–3.6V VI VCC 2.7V Figure 1. Enable input (E) to output (nY) propagation delays and output transition times. V CC nI 0 , nI1 , S INPUT GND t PHL V OH nY OUTPUT V OL VM t PLH SV00901 VM Figure 3. Load circuitry for switching times. SV00568 Figure 2. Data inputs (nln) and common data select input (S) to output (nY) propagation delays. 1998 Apr 30 6 Philips Semiconductors Product specification Quad 2-input multiplexer 74LV157 DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 1998 Apr 30 7 Philips Semiconductors Product specification Quad 2-input multiplexer 74LV157 SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 1998 Apr 30 8 Philips Semiconductors Product specification Quad 2-input multiplexer 74LV157 SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 1998 Apr 30 9 Philips Semiconductors Product specification Quad 2-input multiplexer 74LV157 TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 1998 Apr 30 10 Philips Semiconductors Product specification Quad 2-input multiplexer 74LV157 NOTES 1998 Apr 30 11 Philips Semiconductors Product specification Quad 2-input multiplexer 74LV157 DEFINITIONS Data Sheet Identification Objective Specification Product Status Formative or in Design Definition This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Preliminary Specification Preproduction Product Product Specification Full Production Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 © Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 05-96 9397-750-04427 Philips Semiconductors 1998 Apr 30 12