INTEGRATED CIRCUITS
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74LVC126A Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state
Product specification Supersedes data of 2002 Mar 8 2003 Feb 28
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state
FEATURES • 5 V tolerant inputs/outputs for interfacing with 5 V logic • Wide supply voltage range from 1.2 to 3.6 V • CMOS low power consumption • Direct interface with TTL levels • Inputs accept voltages up to 5.5 V • Complies with JEDEC standard no. 8-1A • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. • Specified from −40 to +85 °C and −40 to +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns. SYMBOL tPHL/tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. ORDERING INFORMATION PACKAGE TYPE NUMBER 74LVC126AD 74LVC126ADB 74LVC126APW 74LVC126ABQ TEMPERATURE RANGE PINS −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C 14 14 14 14 PACKAGE SO14 SSOP14 TSSOP14 DHVQFN14 PARAMETER propagation delay nA to nY input capacitance power dissipation capacitance per gate VCC = 3.3 V; notes 1 and 2 CONDITIONS CL = 50 pF; VCC = 3.3 V DESCRIPTION
74LVC126A
The 74LVC126A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. The 74LVC126A consists of four non-inverting buffers/line drivers with 3-state outputs (nY) which are controlled by the output enable input (nOE). A LOW at nOE causes the outputs to assume a high-impedance OFF-state.
TYPICAL 2.4 4.0 12 ns pF pF
UNIT
MATERIAL plastic plastic plastic plastic
CODE SOT108-1 SOT337-1 SOT402-1 SOT762-1
2003 Feb 28
2
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state
FUNCTION TABLE See note 1. INPUT nOE H H L Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. PINNING PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1OE 1A 1Y 2OE 2A 2Y GND 3Y 3A 3OE 4Y 4A 4OE VCC SYMBOL data input data output nA L H X
74LVC126A
OUTPUT nY L H Z
DESCRIPTION data enable input (active HIGH)
data enable input (active HIGH) data input data output ground (0 V) data output data input data enable input (active HIGH) data output data input data enable input (active HIGH) supply voltage
2003 Feb 28
3
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state
74LVC126A
handbook, halfpage
1OE 1
VCC 14 13 12 4OE 4A 4Y 3OE 3A
1OE 1A 1Y 2OE 2A 2Y GND
1 2 3 4 5 6 7
MNA233
14 VCC 13 4OE 12 4A
1A 1Y 2OE 2 3 4 5 6
126
11 4Y 10 3OE 9 3A
2A 2Y
GND(1)
11 10 9
8 3Y
7 Top view GND
8 3Y
MCE197
* The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input.
Fig.1 Pin configuration SO14 and (T)SSOP14.
Fig.2 Pin configuration DHVQFN14.
handbook, halfpage
2 1 5 4 9 10 12 13
1A 1OE 2A 2OE 3A 3OE 4A 4OE
1Y
3
handbook, halfpage
2 1 EN1
1
3
2Y
6
5 6 4
3Y
8
9 8 10
4Y
11
12 11 13
MNA236
MNA235
Fig.3 Logic symbol.
Fig.4 Logic symbol (IEEE/IEC).
2003 Feb 28
4
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state
74LVC126A
handbook, halfpage
nA
nY
nOE
MNA234
Fig.5 Logic diagram.
RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO Tamb tr, tf PARAMETER supply voltage input voltage output voltage operating ambient temperature input rise and fall times VCC = 1.2 to 2.7 V VCC = 2.7 to 3.6 V output HIGH or LOW state output 3-state CONDITIONS for maximum speed performance for low voltage applications MIN. 2.7 1.2 0 0 0 −40 0 0 MAX. 3.6 3.6 5.5 VCC 5.5 +125 20 10 V V V V V °C ns/V ns/V UNIT
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO IO IGND, ICC Tstg Ptot Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. For SO14 packages: above 70 °C the value of Ptot derates linearly with 8 mW/K. For (T)SSOP14 packages: above 60 °C the value of Ptot derates linearly with 5.5 mW/K. For DHVQFN14 packages: above 60 °C the value of Ptot derates linearly with 4.5 mW/K. 2003 Feb 28 5 PARAMETER supply voltage input diode current input voltage output diode current output voltage output source or sink current VCC or GND current storage temperature power dissipation per package Tamb = −40 to +125 °C; note 2 VI < 0 note 1 VO > VCC or VO < 0 output HIGH or LOW state; note 1 output 3-state; note 1 VO = 0 to VCC CONDITIONS − −0.5 − −0.5 −0.5 − − −65 − MIN. −0.5 MAX. +6.5 −50 +6.5 ±50 +6.5 ±50 ±100 +150 500 V mA V mA V mA mA °C mW UNIT
VCC + 0.5 V
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state
DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = −40 to +85 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VI = VIH or VIL IO = −100 µA IO = −12 mA IO = −18 mA IO = −24 mA VOL LOW-level output voltage VI = VIH or VIL IO = 100 µA IO = 12 mA IO = 24 mA ILI IOZ input leakage current 3-state output OFF-state current power off leakage supply quiescent supply current VI = 5.5 V or GND VI = VIH or VIL; VO = 5.5 V or GND; note 2 VI or VO = 5.5 V VI = VCC or GND; IO = 0 2.7 to 3.6 2.7 3.0 3.6 3.6 − − − − − GND − − ±0.1 ±0.1 2.7 to 3.6 2.7 3.0 3.0 VCC − 0.2 VCC − 0.5 VCC − 0.6 VCC − 0.8 VCC − − − 1.2 2.7 to 3.6 1.2 2.7 to 3.6 VCC 2.0 − − − − − − VCC (V) MIN. TYP.(1)
74LVC126A
MAX.
UNIT
− − GND 0.8 − − − − 0.2 0.4 0.55 ±5 ±5
V V V V V V V V V V V µA µA
Ioff ICC ∆ICC
0 3.6 2.7 to 3.6
− − −
±0.1 0.1 5
±10 10 500
µA µA µA
additional quiescent VI =VCC − 0.6 V; supply current per IO = 0 input pin
2003 Feb 28
6
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state
TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = −40 to +125 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VI = VIH or VIL IO = −100 µA IO = −12 mA IO = −18 mA IO = −24 mA VOL LOW-level output voltage VI = VIH or VIL IO = 100 µA IO = 12 mA IO = 24 mA ILI IOZ input leakage current 3-state output OFF-state current power off leakage supply quiescent supply current VI = 5.5 V or GND VI = VIH or VIL; VO = 5.5 V or GND; note 2 VI or VO = 5.5 V VI = VCC or GND; IO = 0 2.7 to 3.6 2.7 3.0 3.6 3.6 − − − − − − − − − − 2.7 to 3.6 2.7 3.0 3.0 VCC − 0.3 − 1.2 2.7 to 3.6 1.2 2.7 to 3.6 VCC 2.0 − − − − − − VCC (V) MIN.
74LVC126A
TYP.(1)
MAX.
UNIT
− − GND 0.8 − − − − 0.3 0.6 0.8 ±20 ±20
V V V V V V V V V V V µA µA
VCC − 0.65 − VCC − 0.75 − VCC − 1 −
Ioff ICC ∆ICC
0.0 3.6 2.7 to 3.6
− − −
− − −
±20 40 5000
µA µA µA
additional quiescent VI =VCC − 0.6 V; supply current per IO = 0 input pin
Notes 1. All typical values are measured at Tamb = 25 °C. 2. For I/O ports the parameter IOZ includes the input leakage current.
2003 Feb 28
7
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state
AC CHARACTERISTICS GND = 0 V; tr = tf ≤ 2.5 ns. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS Tamb = −40 to +85 °C tPHL/tPLH propagation delay nA to nY see Figs 6 and 8 1.2 2.7 3.0 to 3.6 tPZH/tPZL 3-state output enable time nOE to nY see Figs 7 and 8 1.2 2.7 3.0 to 3.6 tPHZ/tPLZ 3-state output disable time nOE to nY see Figs 7 and 8 1.2 2.7 3.0 to 3.6 tsk(0) skew note 3 3.0 to 3.6 Tamb = −40 to +125 °C tPHL/tPLH propagation delay nA to nY see Figs 6 and 8 1.2 2.7 3.0 to 3.6 tPZH/tPZL 3-state output enable time nOE to nY see Figs 7 and 8 1.2 2.7 3.0 to 3.6 tPHZ/tPLZ 3-state output disable time nOE to nY see Figs 7 and 8 1.2 2.7 3.0 to 3.6 tsk(0) Notes 1. Typical values are measured at Tamb = 25 °C. 2. Typical values are measured at VCC = 3.3 V. skew note 3 3.0 to 3.6 − 1.5 1.0 − 1.5 1.0 − 1.5 1.3 − − − − − − − − − − − − 1.5 1.0 − 1.5 1.0 − 1.5 1.3 − 11 2.7 2.4(2) 15 3.1 2.9(2) 8.0 3.8 2.8(2) − VCC (V) MIN. TYP.(1)
74LVC126A
MAX.
UNIT
− 5.2 4.7 − 6.3 5.7 − 6.7 6.0 1.0 − 6.5 6.0 − 8.0 7.5 − 8.5 7.5 1.5
ns ns ns ns ns ns ns ns ns ns
ns ns ns ns ns ns ns ns ns ns
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
2003 Feb 28
8
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state
AC WAVEFORMS
74LVC126A
handbook, halfpage
VI VM GND tPHL VOH tPLH
nA input
nY output VOL
VM
MNA237
VM = 1.5 V at VCC ≥ 2.7 V; VM = 0.5VCC at VCC < 2.7 V; VOL and VOH are typical output voltage drop that occur with the output load.
Fig.6 The input nA to output nY propagation delays.
handbook, full pagewidth
VI nOE input GND tPLZ output LOW-to-OFF OFF-to-LOW VCC VM VOL tPHZ VOH output HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs disabled outputs enabled
MNA684
VM
tPZL
VX tPZH VY VM
VM = 1.5 V at VCC ≥ 2.7 V; VM = 0.5VCC at VCC < 2.7 V; VX = VOL + 0.3 V at VCC ≥ 2.7 V; VX = VOL + 0.1 V at VCC < 2.7 V; VY = VOH + 0.3 V at VCC ≥ 2.7 V; VY = VOH + 0.1 V at VCC < 2.7 V.
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.7 3-state enable and disable times.
2003 Feb 28
9
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state
74LVC126A
handbook, full pagewidth
S1 VCC PULSE GENERATOR VI D.U.T. RT CL 50 pF RL 500 Ω VO RL 500 Ω
2 × VCC open GND
MNA368
SWITCH POSITION TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH open 2 × VCC GND S1
VCC
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