74LVC1G386GW

INTEGRATED CIRCUITS DATA SHEET 74LVC1G386 3-input EXCLUSIVE-OR gate Product specification 2003 Nov 04 Philips Semiconductors Product specification 3-input EXCLUSIVE-OR gate FEATURES • Wide supply voltage range from 1.65 to 5.5 V • High noise immunity • Complies with JEDEC standard: – JESD8-7 (1.65 to 1.95 V) – JESD8-5 (2.3 to 2.7 V) – JESD8B/JESD36 (2.7 to 3.6 V). • ±24 mA output drive (VCC = 3.0 V) • CMOS low power consumption • Latch-up performance exceeds 250 mA • Direct interface with TTL levels • Inputs accept voltages up to 5 V • ESD protection: – HBM EIA/JESD22-A114-A exceeds 2000 V – MM EIA/JESD22-A115-A exceeds 200 V. • Specified from −40 to +125 °C • SOT363 and SOT457. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns. SYMBOL tPHL/tPLH PARAMETER propagation delay inputs A, B, C to output Y CONDITIONS VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ VCC = 2.5 V; CL = 30 pF; RL = 500 Ω VCC = 2.7 V; CL = 50 pF; RL = 500 Ω VCC = 3.3 V; CL = 50 pF; RL = 500 Ω VCC = 5.0 V; CL = 50 pF; RL = 500 Ω CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. input capacitance power dissipation capacitance per buffer VCC = 3.3 V; notes 1 and 2 DESCRIPTION 74LVC1G386 The 74LVC1G386 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The input can be driven from either 3.3 or 5 V devices. This feature allows the use of these devices in a mixed 3.3 and 5 V environment. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74LVC1G386 provides the 3-input EXCLUSIVE-OR function. TYPICAL 8.0 5.0 5.0 4.5 3.5 4 13 UNIT ns ns ns ns ns pF pF 2003 Nov 04 2 Philips Semiconductors Product specification 3-input EXCLUSIVE-OR gate FUNCTION TABLE See note 1. INPUT A L L L L H H H H Note 1. H = HIGH voltage level; L = LOW voltage level. ORDERING INFORMATION PACKAGE TYPE NUMBER 74LVC1G386GV 74LVC1G386GW PINNING PIN 1 2 3 4 5 6 A GND B Y VCC C SYMBOL data input ground (0 V) data input data output supply voltage data input DESCRIPTION TEMPERATURE RANGE −40 to +125 °C −40 to +125 °C PINS 6 6 PACKAGE SC-74 SC-88 MATERIAL plastic plastic B L L H H L L H H C L H L H L H L H 74LVC1G386 OUTPUT Y L H H L H L L H CODE SOT457 SOT363 MARKING YH YH 2003 Nov 04 3 Philips Semiconductors Product specification 3-input EXCLUSIVE-OR gate 74LVC1G386 handbook, halfpage A1 GND 2 6C handbook, halfpage 1 3 6 A B C MNB143 386 5 VCC 4 Y Y 4 B3 MNB146 Fig.1 Pin configuration. Fig.2 Logic symbol. handbook, halfpage 1 3 6 =1 4 MNB145 Fig.3 Logic symbol. 2003 Nov 04 4 Philips Semiconductors Product specification 3-input EXCLUSIVE-OR gate 74LVC1G386 handbook, full pagewidth A B Y C MNB144 Fig.4 Logic diagram. 2003 Nov 04 5 Philips Semiconductors Product specification 3-input EXCLUSIVE-OR gate RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO Tamb tr, tf PARAMETER supply voltage input voltage output voltage operating ambient temperature input rise and fall times VCC = 1.65 to 2.7 V VCC = 2.7 to 5.5 V active mode VCC = 0 V; Power-down mode CONDITIONS 0 0 0 −40 0 0 MIN. 1.65 74LVC1G386 MAX. 5.5 5.5 VCC 5.5 +125 20 10 V V V V UNIT °C ns/V ns/V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO PARAMETER supply voltage input diode current input voltage output diode current output voltage VI < 0 note 1 VO > VCC or VO < 0 active mode; notes 1 and 2 Power-down mode; notes 1 and 2 IO ICC, IGND Tstg PD Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. output source or sink current VCC or GND current storage temperature power dissipation Tamb = −40 to +125 °C VO = 0 to VCC − − −65 − ±50 ±100 +150 250 mA mA °C mW CONDITIONS − −0.5 − −0.5 −0.5 MIN. −0.5 MAX. +6.5 −50 +6.5 ±50 +6.5 V mA V mA V UNIT VCC + 0.5 V 2003 Nov 04 6 Philips Semiconductors Product specification 3-input EXCLUSIVE-OR gate DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = −40 to +85 °C VIH HIGH-level input voltage 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VIL LOW-level input voltage 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VOL LOW-level output voltage VI = VIH or VIL IO = 100 µA IO = 4 mA IO = 8 mA IO = 12 mA IO = 24 mA IO = 32 mA VOH HIGH-level output voltage VI = VIH or VIL IO = −100 µA IO = −4 mA IO = −8 mA IO = −12 mA IO = −24 mA IO = −32 mA ILI Ioff ICC ∆ICC input leakage current power OFF leakage current quiescent supply current additional quiescent supply current per pin VI or VO = 5.5 V VI = VCC or GND; IO = 0 VI = VCC − 0.6 V; IO = 0 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 0 5.5 2.3 to 5.5 VCC − 0.1 1.2 1.9 2.2 2.3 3.8 − − − − − − − − − − ±0.1 ±0.1 0.1 5 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 − − − − − − − − − − − − 0.65 × VCC 1.7 2.0 0.7 × VCC − − − − − − − − − − − − VCC (V) MIN. TYP.(1) 74LVC1G386 MAX. UNIT − − − − 0.7 0.8 0.3 × VCC 0.1 0.45 0.3 0.4 0.55 0.55 − − − − − − ±5 ±10 10 500 V V V V V V V V V V V V V V V V V V V µA µA µA µA 0.35 × VCC V VI = 5.5 V or GND 5.5 2003 Nov 04 7 Philips Semiconductors Product specification 3-input EXCLUSIVE-OR gate 74LVC1G386 TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = −40 to +125 °C VIH HIGH-level input voltage 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VIL LOW-level input voltage 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VOL LOW-level output voltage VI = VIH or VIL IO = 100 µA IO = 4 mA IO = 8 mA IO = 12 mA IO = 24 mA IO = 32 mA VOH HIGH-level output voltage VI = VIH or VIL IO = −100 µA IO = −4 mA IO = −8 mA IO = −12 mA IO = −24 mA IO = −32 mA ILI Ioff ICC ∆ICC Note 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C. input leakage current power OFF leakage current quiescent supply current additional quiescent supply current per pin VI or VO = 5.5 V VI = VCC or GND; IO = 0 VI = VCC − 0.6 V; IO = 0 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 0 5.5 2.3 to 5.5 VCC − 0.1 0.95 1.7 1.9 2.0 3.4 − − − − − − − − − − − − − − 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 − − − − − − − − − − − − 0.65 × VCC 1.7 2.0 0.7 × VCC − − − − − − − − − − − − VCC (V) MIN. TYP.(1) MAX. UNIT − − − − 0.7 0.8 0.3 × VCC 0.1 0.70 0.45 0.60 0.80 0.80 − − − − − − ±100 ±200 200 5000 V V V V V V V V V V V V V V V V V V V µA µA µA µA 0.35 × VCC V VI = 5.5 V or GND 5.5 2003 Nov 04 8 Philips Semiconductors Product specification 3-input EXCLUSIVE-OR gate AC CHARACTERISTICS GND = 0 V. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS Tamb = −40 to +85 °C tPHL/tPLH propagation delay A, B, C to Y see Figs 5 and 6; note 1 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 Tamb = −40 to +125 °C tPHL/tPLH propagation delay A, B, C to Y see Figs 5 and 6 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 Note 1. All typical values are measured at Tamb = 25 °C. 2.0 1.5 1.5 1.0 1.0 − − − − − 2.0 1.5 1.5 1.0 1.0 8.0 5.0 5.0 4.5 3.5 VCC (V) MIN. TYP. 74LVC1G386 MAX. UNIT 17.0 9.0 8.5 7.5 5.5 ns ns ns ns ns 22.0 11.5 11.0 9.5 7.0 ns ns ns ns ns 2003 Nov 04 9 Philips Semiconductors Product specification 3-input EXCLUSIVE-OR gate AC WAVEFORMS VI A, B, C input GND t PHL VOH Y output in fase VOL t PLH VOH Y output out of fase VOL MNB147 74LVC1G386 handbook, full pagewidth VM t PLH VM tPHL VM INPUT VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V 4.5 to 5.5 V VM 0.5 × VCC 0.5 × VCC 1.5 V 1.5 V 0.5 × VCC VCC VCC 2.7 V 2.7 V VCC VI tr = tf ≤ 2.0 ns ≤ 2.0 ns ≤ 2.5 ns ≤ 2.5 ns ≤ 2.5 ns VOL and VOH are typical output voltage drop that occur with the output load. Fig.5 A, B, C to Y propagation delay times. 2003 Nov 04 10 Philips Semiconductors Product specification 3-input EXCLUSIVE-OR gate 74LVC1G386 handbook, full pagewidth VEXT VCC PULSE GENERATOR VI D.U.T. RT CL RL VO RL MNA616 VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V 4.5 to 5.5 V VI VCC VCC 2.7 V 2.7 V VCC CL 30 pF 30 pF 50 pF 50 pF 50 pF RL 1 kΩ 500 Ω 500 Ω 500 Ω 500 Ω VEXT tPLH/tPHL open open open open open tPZH/tPHZ GND GND GND GND GND tPZL/tPLZ 2 × VCC 2 × VCC 6V 6V 2 × VCC Definitions of test circuit: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig.6 Load circuitry for switching times. 2003 Nov 04 11 Philips Semiconductors Product specification 3-input EXCLUSIVE-OR gate PACKAGE OUTLINES Plastic surface mounted package; 6 leads 74LVC1G386 SOT363 D B E A X y HE vMA 6 5 4 Q pin 1 index A A1 1 e1 e 2 bp 3 wM B detail X Lp c 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT363 REFERENCES IEC JEDEC EIAJ SC-88 EUROPEAN PROJECTION ISSUE DATE 97-02-28 2003 Nov 04 12 Philips Semiconductors Product specification 3-input EXCLUSIVE-OR gate 74LVC1G386 Plastic surface mounted package; 6 leads SOT457 D B E A X y HE vMA 6 5 4 Q pin 1 index A A1 c 1 2 3 Lp e bp wM B detail X 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 0.1 0.013 bp 0.40 0.25 c 0.26 0.10 D 3.1 2.7 E 1.7 1.3 e 0.95 HE 3.0 2.5 Lp 0.6 0.2 Q 0.33 0.23 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT457 REFERENCES IEC JEDEC EIAJ SC-74 EUROPEAN PROJECTION ISSUE DATE 97-02-28 01-05-04 2003 Nov 04 13 Philips Semiconductors Product specification 3-input EXCLUSIVE-OR gate DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development DEFINITION 74LVC1G386 This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). II Preliminary data Qualification III Product data Production Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS Short-form specification  The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition  Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information  Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications  These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes  Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 2003 Nov 04 14 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2003 SCA75 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands R20/01/pp15 Date of release: 2003 Nov 04 Document order number: 9397 750 12169