74LVC2G06GM

INTEGRATED CIRCUITS DATA SHEET 74LVC2G06 Inverters with open-drain outputs Product specification Supersedes data of 2003 Aug 25 2004 Sep 10 Philips Semiconductors Product specification Inverters with open-drain outputs FEATURES • Wide supply voltage range from 1.65 V to 5.5 V • 5 V tolerant input/output for interfacing with 5 V logic • High noise immunity • Complies with JEDEC standard: – JESD8-7 (1.65 V to 1.95 V) – JESD8-5 (2.3 V to 2.7 V) – JESD8B/JESD36 (2.7 V to 3.6 V). • −24 mA output drive (VCC = 3.0 V) • CMOS low power consumption • Latch-up performance exceeds 250 mA • Direct interface with TTL levels • Inputs accept voltages up to 5 V • Multiple package options • ESD protection: – HBM EIA/JESD22-A114-B exceeds 2000 V – MM EIA/JESD22-A115-A exceeds 200 V. • Specified from −40 °C to +85 °C and −40 °C to +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C. SYMBOL tPLZ/tPZL PARAMETER propagation delay input nA to output nY CONDITIONS VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ VCC = 2.5 V; CL = 30 pF; RL = 500 Ω VCC = 2.7 V; CL = 50 pF; RL = 500 Ω VCC = 3.3 V; CL = 50 pF; RL = 500 Ω VCC = 5.0 V; CL = 50 pF; RL = 500 Ω CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; ∑(CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. input capacitance power dissipation capacitance per gate VCC = 3.3 V; notes 1 and 2 DESCRIPTION 74LVC2G06 The 74LVC2G06 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74LVC2G06 provides two inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. TYPICAL 3.2 2.0 2.6 2.3 1.6 2.5 5.9 UNIT ns ns ns ns ns pF pF 2004 Sep 10 2 Philips Semiconductors Product specification Inverters with open-drain outputs FUNCTION TABLE See note 1. INPUT nA L H Note 1. H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. ORDERING INFORMATION PACKAGE TYPE NUMBER TEMPERATURE RANGE 74LVC2G06GW 74LVC2G06GV 74LVC2G06GM PINNING PIN 1 2 3 4 5 6 1A GND 2A 2Y VCC 1Y SYMBOL data input ground (0 V) data input data output supply voltage data output DESCRIPTION −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C PINS 6 6 6 PACKAGE SC-88 SC-74 XSON6 MATERIAL plastic plastic plastic OUTPUT nY Z L 74LVC2G06 CODE SOT363 SOT457 SOT886 MARKING V6 V06 V6 06 1A 1A GND 1 2 6 1Y VCC 2Y GND 2 5 VCC 1 6 1Y 06 5 2A 3 001aab668 4 2A 3 4 2Y 001aab669 Transparent top view Fig.1 Pin configuration SC-88 and SC-74. Fig.2 Pin configuration XSON6. 2004 Sep 10 3 Philips Semiconductors Product specification Inverters with open-drain outputs 74LVC2G06 handbook, halfpage 1 1A 1Y 6 handbook, halfpage 1A 1 6 1Y 3 2A 2Y 4 2A 3 4 2Y MNB095 MNB096 Fig.3 Logic symbol. Fig.4 IEEE/IEC logic symbol. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO Tamb tr, tf PARAMETER supply voltage input voltage output voltage operating ambient temperature input rise and fall times VCC = 1.65 V to 2.7 V VCC = 2.7 V to 5.5 V active mode VCC = 0 V; Power-down mode CONDITIONS 0 0 0 −40 0 0 MIN. 1.65 MAX. 5.5 5.5 VCC 5.5 +125 20 10 V V V V °C ns/V ns/V UNIT 2004 Sep 10 4 Philips Semiconductors Product specification Inverters with open-drain outputs 74LVC2G06 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO IO ICC, IGND Tstg Ptot Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. PARAMETER supply voltage input diode current input voltage output diode current output voltage output source or sink current VCC or GND current storage temperature power dissipation Tamb = −40 °C to +125 °C VI < 0 V note 1 VO < 0 V active mode; notes 1 and 2 VO = 0 V to 6.5 V CONDITIONS − −0.5 − −0.5 − − −65 − MIN. −0.5 MAX. +6.5 −50 +6.5 −50 6.5 +6.5 50 ±100 +150 300 V mA V mA V V mA mA °C mW UNIT Power-down mode; notes 1 and 2 −0.5 2004 Sep 10 5 Philips Semiconductors Product specification Inverters with open-drain outputs DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = −40 °C to +85 °C; note 1 VIH HIGH-level input voltage 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VIL LOW-level input voltage 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VOL LOW-level output voltage VI = VIH or VIL IO = 100 µA IO = 4 mA IO = 8 mA IO = 12 mA IO = 24 mA IO = 32 mA ILI IOZ Ioff ICC ∆ICC input leakage current VI = 5.5 V or GND 3-state output OFF-state VI = VIH or VIL; current VO = VCC or GND power OFF leakage current VI or VO = 5.5 V 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 1.65 to 5.5 5.5 0 5.5 2.3 to 5.5 − − − − − − − − − − − − − − − − − ±0.1 ±0.1 ±0.1 0.1 5 0.65 × VCC 1.7 2.0 0.7 × VCC − − − − − − − − − − − − VCC (V) MIN. TYP. 74LVC2G06 MAX. UNIT − − − − 0.35 × VCC 0.7 0.8 0.3 × VCC 0.1 0.45 0.3 0.4 0.55 0.55 ±5 ±10 ±10 10 500 V V V V V V V V V V V V V V µA µA µA µA µA quiescent supply current VI = VCC or GND; IO = 0 A additional quiescent supply current per pin VI = VCC − 0.6 V; IO = 0 A 2004 Sep 10 6 Philips Semiconductors Product specification Inverters with open-drain outputs 74LVC2G06 TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = −40 °C to +125 °C VIH HIGH-level input voltage 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VIL LOW-level input voltage 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VOL LOW-level output voltage VI = VIH or VIL IO = 100 µA IO = 4 mA IO = 8 mA IO = 12 mA IO = 24 mA IO = 32 mA ILI IOZ Ioff ICC ∆ICC Note 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C. input leakage current VI = 5.5 V or GND 3-state output OFF-state VI = VIH or VIL; current VO = VCC or GND power OFF leakage current VI or VO = 5.5 V 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 1.65 to 5.5 5.5 0 5.5 2.3 to 5.5 − − − − − − − − − − − − − − − − − − − − − − 0.1 0.70 0.45 0.60 0.80 0.80 ±20 ±10 ±20 40 5000 V V V V V V µA µA µA µA µA 0.65 × VCC 1.7 2.0 0.7 × VCC − − − − − − − − − − − − − − − − 0.35 × VCC 0.7 0.8 0.3 × VCC V V V V V V V V VCC (V) MIN. TYP. MAX. UNIT quiescent supply current VI = VCC or GND; IO = 0 A additional quiescent supply current per pin VI = VCC − 0.6 V; IO = 0 A 2004 Sep 10 7 Philips Semiconductors Product specification Inverters with open-drain outputs AC CHARACTERISTICS GND = 0 V. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS Tamb = −40 °C to +85 °C; note 1 tPLZ/tPZL propagation delay input nA to output nY see Figs 5 and 6 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 Tamb = −40 °C to +125 °C tPLZ/tPZL propagation delay input nA to output nY see Figs 5 and 6 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 Note 1.0 0.5 1.0 0.5 0.5 − − − − − 1.0 0.5 1.0 0.5 0.5 3.2 2.0 2.6 2.3 1.6 VCC (V) MIN. 74LVC2G06 TYP. MAX. UNIT 6.5 3.9 4.2 3.4 2.9 ns ns ns ns ns 8.2 4.9 5.3 4.3 3.7 ns ns ns ns ns 1. All typical values are measured at Tamb = 25 °C and at VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively. AC WAVEFORMS handbook, full pagewidth VI nA input GND t PLZ VCC nY output VOL VX MNA529 VM t PZL VM INPUT VCC 1.65 V to 1.95 V 2.3 V to 2.7 V 2.7 V 3.0 V to 3.6 V 4.5 V to 5.5 V VM 0.5 × VCC 0.5 × VCC 1.5 V 1.5 V 0.5 × VCC VX VOL + 0.15 V VOL + 0.15 V VOL + 0.3 V VOL + 0.3 V VOL + 0.3 V VCC VCC 2.7 V 2.7 V VCC VI tr = tf ≤ 2.0 ns ≤ 2.0 ns ≤ 2.5 ns ≤ 2.5 ns ≤ 2.5 ns VOL and VOH are typical output voltage drop that occur with the output load. Fig.5 The input (nA) to output (nY) propagation delays. 2004 Sep 10 8 Philips Semiconductors Product specification Inverters with open-drain outputs 74LVC2G06 VEXT VCC PULSE GENERATOR VI D.U.T. RT CL RL VO RL mna616 VCC 1.65 V to 1.95 V 2.3 V to 2.7 V 2.7 V 3.0 V to 3.6 V 4.5 V to 5.5 V VI VCC VCC 2.7 V 2.7 V VCC CL 30 pF 30 pF 50 pF 50 pF 50 pF RL 1 kΩ 500 Ω 500 Ω 500 Ω 500 Ω VEXT tPZL/tPLZ 2 × VCC 2 × VCC 6V 6V 2 × VCC Definitions for test circuit: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig.6 Load circuitry for switching times. 2004 Sep 10 9 Philips Semiconductors Product specification Inverters with open-drain outputs PACKAGE OUTLINES Plastic surface mounted package; 6 leads 74LVC2G06 SOT363 D B E A X y HE vMA 6 5 4 Q pin 1 index A A1 1 e1 e 2 bp 3 wM B detail X Lp c 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT363 REFERENCES IEC JEDEC EIAJ SC-88 EUROPEAN PROJECTION ISSUE DATE 97-02-28 2004 Sep 10 10 Philips Semiconductors Product specification Inverters with open-drain outputs 74LVC2G06 Plastic surface mounted package; 6 leads SOT457 D B E A X y HE vMA 6 5 4 Q pin 1 index A A1 c 1 2 3 Lp e bp wM B detail X 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 0.1 0.013 bp 0.40 0.25 c 0.26 0.10 D 3.1 2.7 E 1.7 1.3 e 0.95 HE 3.0 2.5 Lp 0.6 0.2 Q 0.33 0.23 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT457 REFERENCES IEC JEDEC EIAJ SC-74 EUROPEAN PROJECTION ISSUE DATE 97-02-28 01-05-04 2004 Sep 10 11 Philips Semiconductors Product specification Inverters with open-drain outputs 74LVC2G06 XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm SOT886 b 1 2 3 4× L1 L (2) e 6 e1 5 e1 4 6× (2) A A1 D E terminal 1 index area 0 DIMENSIONS (mm are the original dimensions) UNIT mm A (1) max 0.5 A1 max 0.04 b 0.25 0.17 D 1.5 1.4 E 1.05 0.95 e 0.6 e1 0.5 L 0.35 0.27 L1 0.40 0.32 1 scale 2 mm Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT886 REFERENCES IEC JEDEC MO-252 JEITA EUROPEAN PROJECTION ISSUE DATE 04-07-15 04-07-22 2004 Sep 10 12 Philips Semiconductors Product specification Inverters with open-drain outputs DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development DEFINITION 74LVC2G06 This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). II Preliminary data Qualification III Product data Production Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS Short-form specification  The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition  Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information  Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications  These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes  Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 2004 Sep 10 13 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2004 SCA76 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands R20/02/pp14 Date of release: 2004 Sep 10 Document order number: 9397 750 13774