74LVCH244ADB

INTEGRATED CIRCUITS DATA SHEET 74LVC244A; 74LVCH244A Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) Product specification Supersedes data of 2003 May 20 2003 Oct 30 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) FEATURES • 5 V tolerant inputs/outputs for interfacing with 5 V logic • Wide supply voltage range from 1.2 to 3.6 V • CMOS low power consumption • Direct interface with TTL levels • Inputs accept voltages up to 5.5 V • High-impedance when VCC = 0 V • Bushold on all data inputs (74LVCH244A only) • Complies with JEDEC standard no. 8-1A • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. • Specified from −40 to +85 °C and −40 to +125 °C. DESCRIPTION 74LVC244A; 74LVCH244A The 74LVC244A/74LVCH244A is a high performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. These features allow the use of these devices as translators in a mixed 3.3 and 5 V environment. The 74LVC244A/74LVCH244A is an octal non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise and fall times. The 244 is functionally identical to the 240, but the 240 has inverting outputs. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns. SYMBOL tPHL/tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. PARAMETER propagation delay 1An to 1Yn, 2An to 2Yn input capacitance power dissipation capacitance per buffer VCC = 3.3 V; notes 1 and 2 CONDITIONS CL = 50 pF; VCC = 3.3 V TYPICAL 2.8 4.0 10 ns pF pF UNIT 2003 Oct 30 2 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) ORDERING INFORMATION 74LVC244A; 74LVCH244A PACKAGE TYPE NUMBER 74LVC244AD 74LVCH244AD 74LVC244ADB 74LVCH244ADB 74LVC244APW 74LVCH244APW 74LVC244ABQ 74LVCH244ABQ FUNCTION TABLE See note 1. INPUT nOE L L H Note 1. H = HIGH voltage level; a) L = LOW voltage level; b) X = don’t care; c) Z = high-impedance OFF-state. nAn L H X OUTPUT nYn L H Z TEMPERATURE RANGE −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C PINS 20 20 20 20 20 20 20 20 PACKAGE SO20 SO20 SSOP20 SSOP20 TSSOP20 TSSOP20 DHVQFN20 DHVQFN20 MATERIAL plastic plastic plastic plastic plastic plastic plastic plastic CODE SOT163-1 SOT163-1 SOT339-1 SOT339-1 SOT360-1 SOT360-1 SOT764-1 SOT764-1 2003 Oct 30 3 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) PINNING PIN 1 2 3 4 5 6 7 8 9 10 SYMBOL 1OE 1A0 2Y0 1A1 2Y1 1A2 2Y2 1A3 2Y3 GND DESCRIPTION output enable input (active LOW) data input bus output data input bus output data input bus output data input bus output ground (0 V) 20 PIN 11 12 13 14 15 16 17 18 19 74LVC244A; 74LVCH244A SYMBOL 2A3 1Y3 2A2 1Y2 2A1 1Y1 2A0 1Y0 2OE VCC DESCRIPTION bus input bus output bus input bus output bus input bus output bus input bus output output enable input (active LOW) supply voltage handbook, halfpage 1OE 1 VCC 20 19 18 17 16 2OE 1Y0 2A0 1Y1 2A1 1Y2 2A2 1Y3 handbook, halfpage 1OE 1 1A0 2 2Y0 3 1A1 4 2Y1 5 1A2 6 2Y2 7 1A3 8 2Y3 9 GND 10 MNA872 20 VCC 19 2OE 1A0 2Y0 2 3 4 5 18 1Y0 17 2A0 16 1Y1 15 2A1 14 1Y2 13 2A2 12 1Y3 11 2A3 1A1 2Y1 1A2 2Y2 1A3 2Y3 GND(1) 6 7 8 9 10 Top view GND 11 2A3 MBL761 15 14 13 12 (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig.1 Pin configuration SO and (T)SSOP. Fig.2 Pin configuration DHVQFN20. 2003 Oct 30 4 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A handbook, halfpage 1A0 2 1A1 4 handbook, halfpage 1Y0 18 1Y1 16 1 EN 18 16 14 12 6 1A2 1Y2 14 2 4 6 8 8 1 1A3 1OE 1Y3 12 2A0 17 19 EN 2A1 15 11 13 15 17 MNA873 2Y0 3 2Y1 5 9 7 5 3 11 19 2A3 2OE 2Y3 9 13 2A2 2Y2 7 MNA875 Fig.3 Logic symbol (IEEE/IEC). Fig.4 Functional diagram. 2 handbook, halfpage 1A0 18 1Y0 16 1Y1 2A1 2A0 17 3 2Y0 4 1A1 6 15 5 2Y1 14 1Y2 2A2 1A2 13 7 2Y2 1A3 1OE 8 1 12 1Y3 2A3 2OE 11 19 9 2Y3 MNA874 Fig.5 Logic symbol. 2003 Oct 30 5 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO Tamb tr, tf PARAMETER supply voltage input voltage output voltage operating ambient temperature input rise and fall times output HIGH or LOW state output 3-state in free air VCC = 1.2 to 2.7 V VCC = 2.7 to 3.6 V CONDITIONS 74LVC244A; 74LVCH244A MIN. 2.7 1.2 0 0 0 −40 0 0 MAX. 3.6 3.6 5.5 VCC 5.5 +125 20 10 V V V V V UNIT for maximum speed performance for low-voltage applications °C ns/V ns/V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO IO ICC, IGND Tstg Ptot Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. For SO20 packages: above 70 °C derate linearly with 8 mW/K. a) For SSOP20 and TSSOP20 packages: above 60 °C derate linearly with 5.5 mW/K. b) For DHVQFN20 packages: above 60 °C derate linearly with 5.5 mW/K. PARAMETER supply voltage input diode current input voltage output diode current output voltage output source or sink current VCC or GND current storage temperature power dissipation Tamb = −40 to +125 °C; note 2 VI < 0 note 1 VO > VCC or VO < 0 output 3-state; note 1 VO = 0 to VCC CONDITIONS − −0.5 − −0.5 − − −65 − MIN. −0.5 MAX. +6.5 −50 +6.5 ±50 +6.5 ±50 ±100 +150 500 V mA V mA V mA mA °C mW UNIT output HIGH or LOW state; note 1 −0.5 VCC + 0.5 V 2003 Oct 30 6 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = −40 to +85 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VI = VIH or VIL IO = −100 µA IO = −12 mA IO = −18 mA IO = −24 mA VOL LOW-level output voltage VI = VIH or VIL IO = 100 µA IO = 12 mA IO = 24 mA ILI IOZ input leakage current 3-state output OFF-state current power-off leakage supply current quiescent supply current VI = 5.5 V or GND; notes 2 VI = VIH or VIL; VO = 5.5 V or GND; notes 2 VI or VO = 5.5 V VI = VCC or GND; IO = 0 2.7 to 3.6 2.7 3.0 3.6 3.6 − − − − − GND − − ±0.1 0.1 0.20 0.40 0.55 ±5 ±5 V V V µA µA 2.7 to 3.6 2.7 3.0 3.0 VCC − 0.2 VCC − 0.5 VCC − 0.6 VCC − 0.8 VCC − − − − − − − V V V V 1.2 2.7 to 3.6 1.2 2.7 to 3.6 VCC 2.0 − − − − − − − − GND 0.8 V V V V VCC (V) MIN. TYP.(1) MAX. UNIT Ioff ICC ∆ICC IBH(L) IBH(H) IBH(LO) IBH(HO) 0.0 3.6 2.7 to 3.6 3.0 3.0 3.6 3.6 − − − 75 −75 500 −500 0.1 0.1 5 − − − − ±10 10 500 − − − − µA µA µA µA µA µA µA additional quiescent supply VI = VCC − 0.6 V; current per input pin IO = 0 bushold LOW sustaining current bushold HIGH sustaining current bushold LOW overdrive current bushold HIGH overdrive current VI = 0.8 V; notes 3 and 4 VI = 2.0 V; notes 3 and 4 notes 3 and 5 notes 3 and 5 2003 Oct 30 7 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = −40 to +125 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VI = VIH or VIL IO = −100 µA IO = −12 mA IO = −18 mA IO = −24 mA VOL LOW-level output voltage VI = VIH or VIL IO = 100 µA IO = 12 mA IO = 24 mA ILI IOZ input leakage current 3-state output OFF-state current power-off leakage supply current quiescent supply current VI = 5.5 V or GND; notes 2 VI = VIH or VIL; VO = 5.5 V or GND; notes 2 VI or VO = 5.5 V VI = VCC or GND; IO = 0 2.7 to 3.6 2.7 3.0 3.6 3.6 2.7 to 3.6 2.7 3.0 3.0 1.2 2.7 to 3.6 1.2 2.7 to 3.6 VCC (V) 74LVC244A; 74LVCH244A MIN. TYP.(1) MAX. UNIT VCC 2.0 − − VCC − 0.3 VCC − 0.65 VCC − 0.75 VCC − 1 − − − − − − − − − − − − − − − − − − − − GND 0.8 − − − − 0.3 0.6 0.8 ±20 ±20 V V V V V V V V V V V µA µA Ioff ICC ∆ICC IBH(L) IBH(H) IBH(LO) IBH(HO) Notes 0.0 3.6 2.7 to 3.6 3.0 3.0 3.6 3.6 − − − 60 −60 500 −500 − − − − − − − ±20 40 5000 − − − − µA µA µA µA µA µA µA additional quiescent supply VI = VCC − 0.6 V; current per input pin IO = 0 bushold LOW sustaining current bushold HIGH sustaining current bushold LOW overdrive current bushold HIGH overdrive current VI = 0.8 V; notes 3 and 4 VI = 2.0 V; notes 3 and 4 notes 3 and 5 notes 3 and 5 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C. 2. For bushold parts, the bushold circuit is switched off when VI > VCC allowing 5.5 V on the input pin. 3. Valid for data inputs of bushold parts (74LVCH244A) only. For data inputs only, control inputs do not have a bushold circuit. 4. The specified sustaining current at the data inputs do not have a bushold circuit. 5. The specified overdrive current at the data input forces the data input to the opposite logic input state. 2003 Oct 30 8 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) AC CHARACTERISTICS GND = 0 V; tr = tf ≤ 2.5 ns. 74LVC244A; 74LVCH244A TEST CONDITIONS SYMBOL Tamb = −40 to +85 °C tPHL/tPLH propagation delay 1An to 1Yn, 2An to 2Yn see Figs 6 and 8 1.2 2.7 3.0 to 3.6 tPZH/tPZL 3-state output enable time 1OE to 1Yn, 2OE to 2Yn see Figs 7 and 8 1.2 2.7 3.0 to 3.6 tPHZ/tPLZ 3-state output disable time 1OE to 1Yn, 2OE to 2Yn see Figs 7 and 8 1.2 2.7 3.0 to 3.6 tsk(0) skew note 2 Tamb = −40 to +125 °C tPHL/tPLH propagation delay 1An to 1Yn, 2An to 2Yn see Figs 6 and 8 1.2 2.7 3.0 to 3.6 tPZH/tPZL 3-state output enable time 1OE to 1Yn, 2OE to 2Yn see Figs 7 and 8 1.2 2.7 3.0 to 3.6 tPHZ/tPLZ 3-state output disable time 1OE to 1Yn, 2OE to 2Yn see Figs 7 and 8 1.2 2.7 3.0 to 3.6 tsk(0) Notes 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C. 2. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. skew note 2 − 1.5 1.5 − 1.5 1.0 − 1.5 1.5 − − − − − − − − − − − − 9.0 7.5 − 11 9.5 − 8.5 7.5 1.5 ns ns ns ns ns ns ns ns ns ns − 1.5 1.5 − 1.5 1.0 − 1.5 1.5 − 17.0 3.3 2.8(1) 24.0 3.3 3.4(1) 9.0 3.2 2.9(1) − − 6.9 5.9 − 8.6 7.6 − 6.8 5.8 1.0 ns ns ns ns ns ns ns ns ns ns PARAMETER WAVEFORMS VCC (V) MIN. TYP. MAX. UNIT 2003 Oct 30 9 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) AC WAVEFORMS 74LVC244A; 74LVCH244A handbook, halfpage VI nAn input GND tPLH VOH nYn output VOL VM VM tPHL VM VM MNA171 VM = 1.5 V at VCC ≥ 2.7 V. VM = 0.5VCC at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load. Fig.6 Input nAn to output nYn propagation delays. handbook, full pagewidth VI nOE input GND tPLZ VCC output LOW-to-OFF OFF-to-LOW VOL tPHZ VOH output HIGH-to-OFF OFF-to-HIGH GND outputs enabled VY VM VM VX tPZH tPZL VM outputs disabled outputs enabled MNA362 VM = 1.5 V at VCC ≥ 2.7 V. VM = 0.5VCC at VCC < 2.7 V. VX = VOL + 0.3 V at VCC ≥ 2.7 V; VX = VOL + 0.1VCC at VCC < 2.7 V. VY = VOH + 0.3 V at VCC ≥ 2.7 V; VY = VOH + 0.1VCC at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load. Fig.7 3-state enable and disable times. 2003 Oct 30 10 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC244A; 74LVCH244A handbook, full pagewidth S1 VCC PULSE GENERATOR VI D.U.T. RT CL 50 pF RL 500 Ω VO RL 500 Ω 2 × VCC open GND MNA368 SWITCH POSITION TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH open 2 × VCC GND S1 VCC