74LVT125PW

74LVT125 3.3 V quad buffer; 3-state Rev. 05 — 10 February 2005 Product data sheet 1. General description The LVT125 is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT125 device is a quad buffer that is ideal for driving bus lines. The device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one of the 3-state outputs. 2. Features s s s s s s s s s s s Quad bus interface 3-state buffers Output capability: +64 mA and −32 mA TTL input and output switching levels Input and output interface capability to systems at 5 V supply Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs Live insertion and extraction permitted No bus current loading when output is tied to 5 V bus Power-up 3-state Latch-up protection: x JESD78: exceeds 500 mA ESD protection: x MIL STD 883 method 3015: exceeds 2000 V x Machine model: exceeds 200 V 3. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 °C. Symbol Parameter tPLH tPHL CI CO ICC Conditions Min Typ 2.7 2.9 4 8 0.13 Max Unit ns ns pF pF mA propagation delay nA to nY CL = 50 pF; VCC = 3.3 V propagation delay nA to nY CL = 50 pF; VCC = 3.3 V input capacitance output capacitance quiescent supply current VI = 0 V or 3.0 V outputs disabled; VO = 0 V or 3.0 V outputs disabled; VCC = 3.6 V Philips Semiconductors 74LVT125 3.3 V quad buffer; 3-state 4. Ordering information Table 2: Ordering information Package Temperature range Name 74LVT125D 74LVT125DB 74LVT125PW 74LVT125BQ −40 °C to +85 °C −40 °C to +85 °C −40 °C to +85 °C −40 °C to +85 °C SO14 SSOP14 TSSOP14 Description plastic small outline package; 14 leads; body width 3.9 mm plastic shrink small outline package; 14 leads; body width 5.3 mm plastic thin shrink small outline package; 14 leads; body width 4.4 mm Version SOT108-1 SOT337-1 SOT402-1 Type number DHVQFN14 plastic dual in-line compatible thermal enhanced very thin SOT762-1 quad flat package; no leads; 14 leads terminals; body 2.5 × 3 × 0.85 mm 5. Functional diagram 2 1 5 4 9 10 12 13 1A 1OE 2A 2OE 3A 3OE 1Y 3 2 1 1 3 EN1 6 2Y 6 5 4 3Y 8 9 8 10 12 4A 4OE 4Y 11 13 mna229 11 mna228 Fig 1. Logic symbol Fig 2. IEC logic symbol nA nY nOE mna227 Fig 3. Logic diagram 9397 750 14703 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 05 — 10 February 2005 2 of 15 Philips Semiconductors 74LVT125 3.3 V quad buffer; 3-state 6. Pinning information 6.1 Pinning 1OE 2 3 4 5 6 7 GND 3Y 8 1 14 VCC 13 4OE 12 4A 11 4Y 10 3OE 9 3A terminal 1 index area 1OE 1A 1Y 2OE 2A 2Y GND 1 2 3 4 5 6 7 001aac476 14 VCC 13 4OE 12 4A 1A 1Y 2OE 2A 125 GND(1) 125 11 4Y 10 3OE 9 8 3A 3Y 2Y 001aac477 Transparent top view (1) The die substrate is attached to the exposed die pad using conductive die attach material. It can not be used as a supply pin or input. Fig 4. Pin configuration SO14, SSOP14 and TSSOP14 Fig 5. Pin configuration DHVQFN14 6.2 Pin description Table 3: Symbol 1OE 1A 1Y 2OE 2A 2Y GND 3Y 3A 3OE 4Y 4A 4OE VCC Pin description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Description 1 output enable input (active LOW) 1 data input 1 data output 2 output enable input (active LOW) 2 data input 2 data output ground (0 V) 3 data output 3 data input 3 output enable input (active LOW) 4 data output 4 data input 4 output enable input (active LOW) supply voltage 9397 750 14703 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 05 — 10 February 2005 3 of 15 Philips Semiconductors 74LVT125 3.3 V quad buffer; 3-state 7. Functional description 7.1 Function table Table 4: Input nOE L L H [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Function table [1] Output nA L H X nY L H Z 8. Limiting values Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC VI VO IIK IOK IO Tstg Tj [1] [2] Conditions [1] Min −0.5 −0.5 −0.5 −65 [2] Max +4.6 +7.0 +7.0 −50 −50 128 −64 +150 150 Unit V V V mA mA mA mA °C °C supply voltage input voltage output voltage input diode current output diode current output current storage temperature junction temperature output in OFF-state or HIGH-state VI < 0 V VO < 0 V output in LOW-state output in HIGH-state [1] - The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. 9397 750 14703 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 05 — 10 February 2005 4 of 15 Philips Semiconductors 74LVT125 3.3 V quad buffer; 3-state 9. Recommended operating conditions Table 6: VCC VI VIH VIL IOH IOL Recommended operating conditions Conditions Min 2.7 0 2.0 none current duty cycle ≤ 50 %; f ≥ 1 kHz ∆t/∆V Tamb input transition rise or fall rate ambient temperature in free air 0 −40 Typ Max 3.6 5.5 0.8 −32 32 64 10 +85 Unit V V V V mA mA mA ns/V °C supply voltage input voltage HIGH-level input voltage LOW-level input voltage HIGH-level output current LOW-level output current Symbol Parameter 10. Static characteristics Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = −40 °C to +85 VIK VOH °C [1] IIK = −18 mA; VCC = 2.7 V IOH = −100 µA; VCC = 2.7 V to 3.6 V; IOH = −8 mA; VCC = 2.7 V IOH = −32 mA; VCC = 3.0 V VOL LOW-level output voltage VCC = 2.7 V IOL = 100 µA IOL = 24 mA VCC = 3.0 V IOL = 16 mA IOL = 32 mA IOL = 64 mA ILI input leakage current all input pins control pins data pins IOFF IHOLD power-down output current bus hold current nA input VCC = 0 V or 3.6 V; VI = 5.5 V VCC = 3.6 V; VCC or GND VCC = 3.6 V; VI = VCC VCC = 3.6 V; VI = 0 V VCC = 0 V; VI or VO = 0 V to 4.5 V VCC = 3 V; VI = 0.8 V VCC = 3 V; VI = 2.0 V VCC = 0 V to 3.6 V; VI = 3.6 V [3] [2] [2] Conditions Min - Typ −0.9 Max −1.2 Unit V V V V V V V V V µA µA µA µA µA µA µA µA input diode voltage HIGH-level output voltage VCC − 0.2 VCC − 0.1 2.4 2.0 75 −75 ±500 2.5 2.2 0.1 0.3 0.25 0.3 0.4 1 ±0.1 0.1 −1 1 150 −150 0.2 0.5 0.4 0.5 0.55 10 ±1 1 −5 ±100 - 9397 750 14703 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 05 — 10 February 2005 5 of 15 Philips Semiconductors 74LVT125 3.3 V quad buffer; 3-state Table 7: Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter IEX external current into output Conditions output in HIGH-state when VO > VCC; VO = 5.5 V and VCC = 3.0 V VCC ≤ 1.2 V; VO = 0.5 V to VCC; VI = GND or VCC; nOE = don’t care VCC = 3.6 V; VI = VIH or VIL output HIGH: VO = 3.0 V output LOW: VO = 0.5 V ICC quiescent supply current VCC = 3.6 V; VI = GND or VCC; IO = 0 A outputs HIGH outputs LOW outputs disabled ∆ICC additional supply current per input pin input capacitance output capacitance VCC = 3 V to 3.6 V; one input at VCC − 0.6 V and other inputs at VCC or GND; VI = 0 V or 3.0 V outputs disabled; VO = 0 V or 3.0 V [5] [6] [4] Min - Typ 60 Max 125 Unit µA IPU, IPD power-up or power-down 3-state output current 3-state output current - ±1 ±100 µA IOZ - 1 −1 5 −5 µA µA - 0.13 2 0.13 0.1 0.19 7 0.19 0.2 mA mA mA mA CI CO - 4 8 - pF pF [1] [2] [3] [4] [5] [6] Typical values are measured at VCC = 3.3 V and Tamb = 25 °C. Unused pins at VCC or GND. This is the bus hold overdrive current required to force the input to the opposite logic state. This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms. From VCC = 1.2 V to VCC = 3.3 V ± 0.3 V a transition time of 100 µs is permitted. This parameter is valid for Tamb = 25 °C only. ICC is measured with outputs pulled to VCC or GND. This is the increase in supply current for each input at the specified voltage level other than VCC or GND. 11. Dynamic characteristics Table 8: Dynamic characteristics GND = 0 V; tr = tf = 2.5 ns; CL = 50 pF; RL = 500 Ω; for test circuit see Figure 8. Symbol Parameter Tamb = −40 °C to +85 tPLH tPHL tPZH tPZL °C [1] VCC = 2.7 V VCC = 3.3 V ± 0.3 V propagation delay nA to nY output enable time nOE to nY output enable time nOE to nY VCC = 2.7 V VCC = 3.3 V ± 0.3 V VCC = 2.7 V VCC = 3.3 V ± 0.3 V VCC = 2.7 V VCC = 3.3 V ± 0.3 V 1.0 1.0 1.0 1.1 2.7 2.9 3.4 3.4 4.5 4.0 4.9 3.9 6.0 4.7 6.5 4.7 ns ns ns ns ns ns ns ns propagation delay nA to nY Conditions Min Typ Max Unit 9397 750 14703 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 05 — 10 February 2005 6 of 15 Philips Semiconductors 74LVT125 3.3 V quad buffer; 3-state Table 8: Dynamic characteristics …continued GND = 0 V; tr = tf = 2.5 ns; CL = 50 pF; RL = 500 Ω; for test circuit see Figure 8. Symbol Parameter tPHZ tPLZ output disable time nOE to nY output disable time nOE to nY Conditions VCC = 2.7 V VCC = 3.3 V ± 0.3 V VCC = 2.7 V VCC = 3.3 V ± 0.3 V [1] Typical values are at VCC = 3.3 V and Tamb = 25 °C. Min 1.8 1.3 Typ 3.7 2.6 Max 5.7 5.1 4.0 4.5 Unit ns ns ns ns 12. Waveforms VI nA input GND tPLH VOH nY output VOL mnb072 VM VM tPHL VM VM VM = 1.5 V. VOL and VOH are typical voltage output drop that occur with the output load. Fig 6. Propagation delay input (nA) to output (nY) VI nOE input GND tPZL VCC nY output VOL t PZH t PHZ VM tPLZ VM VOL + 0.3 V VOH nY output 0V 001aac475 VM VOH − 0.3 V VM = 1.5 V. VOL and VOH are typical voltage output drop that occur with the output load. Fig 7. Enable and disable times of 3-state outputs 9397 750 14703 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 05 — 10 February 2005 7 of 15 Philips Semiconductors 74LVT125 3.3 V quad buffer; 3-state VI negative pulse 0V tW 90 % VM 10 % tTHL(tf) tTLH(tr) tTLH(tr) tTHL(tf) VM 90 % VI positive pulse 0V 10 % 90 % VM tW 001aac221 VM 10 % VM = 1.5 V. a. Input pulse definition VEXT VCC PULSE GENERATOR VI D.U.T. RT CL RL VO RL mna616 Test data is given in Table 9. Definitions test circuit: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = Test voltage for switching times. b. Test circuit Fig 8. Load circuitry for switching times Table 9: Input VI 2.7 V fi tW tr, tf ≤ 2.5 ns ≤ 10 MHz 500 ns Test data Load CL 50 pF RL 500 Ω VEXT tPHZ, tPZH tPLZ, tPZL tPLH, tPHL GND 6V open 9397 750 14703 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 05 — 10 February 2005 8 of 15 Philips Semiconductors 74LVT125 3.3 V quad buffer; 3-state 13. Package outline SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE vMA Z 14 8 Q A2 pin 1 index θ Lp 1 e bp 7 wM L detail X A1 (A 3) A 0 2.5 scale 5 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 8.75 8.55 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 0.028 0.024 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3 θ 0.010 0.057 inches 0.069 0.004 0.049 0.019 0.0100 0.35 0.014 0.0075 0.34 0.244 0.039 0.041 0.228 0.016 0.028 0.004 0.012 8 o 0 o Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT108-1 REFERENCES IEC 076E06 JEDEC MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 9. Package outline SO14 (SOT108-1) 9397 750 14703 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 05 — 10 February 2005 9 of 15 Philips Semiconductors 74LVT125 3.3 V quad buffer; 3-state SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 D E A X c y HE vM A Z 14 8 Q A2 A1 pin 1 index Lp L 1 bp 7 wM detail X (A 3) θ A e 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 6.4 6.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 1.4 0.9 θ 8 o 0 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT337-1 REFERENCES IEC JEDEC MO-150 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 10. Package outline SSOP14 (SOT337-1) 9397 750 14703 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 05 — 10 February 2005 10 of 15 Philips Semiconductors 74LVT125 3.3 V quad buffer; 3-state TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 D E A X c y HE vMA Z 14 8 Q A2 pin 1 index A1 θ Lp L (A 3) A 1 e bp 7 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.72 0.38 θ 8 o 0 o Fig 11. Package outline TSSOP14 (SOT402-1) 9397 750 14703 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 05 — 10 February 2005 11 of 15 Philips Semiconductors 74LVT125 3.3 V quad buffer; 3-state DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm D B A A A1 E c terminal 1 index area detail X terminal 1 index area e 2 L e1 b 6 vMCAB wM C y1 C C y 1 Eh 14 7 e 8 13 Dh 0 9 X 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D (1) 3.1 2.9 Dh 1.65 1.35 E (1) 2.6 2.4 Eh 1.15 0.85 e 0.5 e1 2 L 0.5 0.3 v 0.1 w 0.05 y 0.05 y1 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT762-1 REFERENCES IEC --JEDEC MO-241 JEITA --EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 12. Package outline DHVQFN14 (SOT762-1) 9397 750 14703 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 05 — 10 February 2005 12 of 15 Philips Semiconductors 74LVT125 3.3 V quad buffer; 3-state 14. Revision history Table 10: Revision history Release date 20050210 Data sheet status Product data sheet Product data sheet Product data sheet Product specification Change notice Doc. number 9397 750 14703 9397 750 14552 9397 750 13535 9397 750 03514 Supersedes 74LVT125_4 74LVT125_3 74LVT125_2 74LVT125_1 Document ID 74LVT125_5 Modifications: 74LVT125_4 74LVT125_3 74LVT125_2 74LVT125_1 • Table 2: Corrected type number 20050207 20040624 19980219 - 9397 750 14703 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 05 — 10 February 2005 13 of 15 Philips Semiconductors 74LVT125 3.3 V quad buffer; 3-state 15. Data sheet status Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). III Product data Production [1] [2] [3] Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 16. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 17. Disclaimers Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 18. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com 9397 750 14703 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 05 — 10 February 2005 14 of 15 Philips Semiconductors 74LVT125 3.3 V quad buffer; 3-state 19. Contents 1 2 3 4 5 6 6.1 6.2 7 7.1 8 9 10 11 12 13 14 15 16 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 14 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Contact information . . . . . . . . . . . . . . . . . . . . 14 © Koninklijke Philips Electronics N.V. 2005 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 10 February 2005 Document number: 9397 750 14703 Published in The Netherlands