BF1210

BF1210 Dual N-channel dual gate MOSFET Rev. 01 — 25 October 2006 Product data sheet 1. Product profile 1.1 General description The BF1210 is a combination of two dual gate MOSFET amplifiers with shared source and gate2 leads. The source and substrate are interconnected. Internal bias circuits enable DC stabilization and a very good cross modulation performance during AGC. Integrated diodes between the gates and source protect against excessive input voltage surges. The transistor has a SOT363 micro-miniature plastic package. CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling. 1.2 Features I Two low noise gain controlled amplifiers in a single package; both with a partly integrated bias I Superior cross modulation performance during AGC I High forward transfer admittance I High forward transfer admittance to input capacitance ratio 1.3 Applications I Gain controlled low noise amplifiers for VHF and UHF applications with 5 V supply voltage N digital and analog television tuners N professional communication equipment NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 1.4 Quick reference data Table 1. Quick reference data Per MOSFET unless otherwise specified. Symbol Parameter VDS ID Ptot |yfs| Ciss(G1) drain-source voltage drain current total power dissipation forward transfer admittance input capacitance at gate1 DC Tsp ≤ 107 °C amplifier A; ID = 19 mA amplifier B; ID = 13 mA f = 100 MHz amplifier A amplifier B Crss NF Xmod reverse transfer capacitance f = 100 MHz noise figure cross modulation amplifier A; f = 400 MHz amplifier B; f = 800 MHz input level for k = 1 % at 40 dB AGC amplifier A amplifier B Tj [1] [2] [2] [2] [1] Conditions Min 26 28 - Typ 31 33 2.2 1.9 20 0.9 1.2 Max Unit 6 30 180 41 43 2.7 2.4 1.5 1.9 V mA mW mS mS pF pF fF dB dB 100 100 - 105 103 - 150 dBµV dBµV °C junction temperature Tsp is the temperature at the soldering point of the source lead. Calculated from S-parameters. 2. Pinning information Table 2. Pin 1 2 3 4 5 6 Discrete pinning Description gate1 (AMP A) gate2 gate1 (AMP B) drain (AMP B) source drain (AMP A) 1 2 3 G1B AMP B sym119 Simplified outline 6 5 4 Symbol AMP A G1A DA G2 S DB 3. Ordering information Table 3. Ordering information Package Name BF1210 Description plastic surface-mounted package; 6 leads Version SOT363 Type number BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 2 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 4. Marking Table 4. BF1210 Marking Marking *AB Description * = p : made in Hong Kong * = t : made in Malaysia * = w : made in China Type number 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDS ID IG1 IG2 Ptot Tstg Tj [1] Parameter drain-source voltage drain current gate1 current gate2 current total power dissipation storage temperature junction temperature Conditions Min - Max 6 30 ±10 ±10 180 +150 150 Unit V mA mA mA mW °C °C Per MOSFET DC Tsp ≤ 107 °C [1] −65 - Tsp is the temperature at the soldering point of the source lead. 250 Ptot (mW) 200 001aac193 150 100 50 0 0 50 100 150 Tsp (˚C) 200 Fig 1. Power derating curve BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 3 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 6. Thermal characteristics Table 6. Symbol Rth(j-sp) Thermal characteristics Parameter thermal resistance from junction to solder point Conditions Typ 240 Unit K/W 7. Static characteristics Table 7. Static characteristics Tj = 25 °C. Symbol V(BR)DSS Parameter drain-source breakdown voltage Conditions VG1-S = VG2-S = 0 V; ID = 10 µA amplifier A amplifier B V(BR)G1-SS V(BR)G2-SS VF(S-G1) VF(S-G2) VG1-S(th) VG2-S(th) IDS gate1-source breakdown voltage gate2-source breakdown voltage forward source-gate1 voltage forward source-gate2 voltage gate1-source threshold voltage gate2-source threshold voltage drain-source current VG2-S = VDS = 0 V; IG1-S = 10 mA VG1-S = VDS = 0 V; IG2-S = 10 mA VG2-S = VDS = 0 V; IS-G1 = 10 mA VG1-S = VDS = 0 V; IS-G2 = 10 mA VDS = 5 V; VG2-S = 4 V; ID = 100 µA VDS = 5 V; VG1-S = 5 V; ID = 100 µA VG2-S = 4 V amplifier A; VDS(A) = 5 V; RG1(A) = 59 kΩ amplifier B; VDS(B) = 5 V; RG1(B) = 150 kΩ IG1-S gate1 cut-off current VG2-S = 0 V; VDS(A) = VDS(B) = 0 V amplifier A; VG1-S(A) = 5 V amplifier B; VG1-S(B) = 5 V IG2-S gate2 cut-off current VG2-S = 4 V; VDS(A) = VDS(B) = 0 V; VG1-S(A) = VG1-S(B) = 0 V 50 50 20 nA nA nA [1] Min Typ Max Unit Per MOSFET; unless otherwise specified 6 6 6 6 0.5 0.5 0.3 0.4 14 9 10 10 1.5 1.5 1.0 1.0 24 17 V V V V V V V V mA mA [1] RG1 connects gate1 to VGG = 5 V. See Figure 32. 8. Dynamic characteristics 8.1 Dynamic characteristics for amplifier A Table 8. Dynamic characteristics for amplifier A Common source; Tamb = 25 °C; VG2-S = 4 V; VDS(A) = 5 V; ID(A) = 19 mA. Symbol Parameter |yfs| Ciss(G1) Ciss(G2) Coss Crss forward transfer admittance input capacitance at gate1 input capacitance at gate2 output capacitance Conditions Tj = 25 °C f = 100 MHz f = 100 MHz f = 100 MHz [1] [1] [1] [1] Min 26 - Typ 31 2.2 3.0 0.9 20 Max 41 2.7 - Unit mS pF pF pF fF reverse transfer capacitance f = 100 MHz BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 4 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET Table 8. Dynamic characteristics for amplifier A …continued Common source; Tamb = 25 °C; VG2-S = 4 V; VDS(A) = 5 V; ID(A) = 19 mA. Symbol Parameter Gtr transducer power gain Conditions BS = BS(opt); BL = BL(opt) f = 200 MHz; GS = 2 mS; GL = 0.5 mS f = 400 MHz; GS = 2 mS; GL = 1 mS f = 800 MHz; GS = 3.3 mS; GL = 1 mS NF noise figure f = 11 MHz; GS = 20 mS; BS = 0 S f = 400 MHz; YS = YS(opt) f = 800 MHz; YS = YS(opt) Xmod cross modulation input level for k = 1 %; fw = 50 MHz; funw = 60 MHz at 0 dB AGC at 10 dB AGC at 20 dB AGC at 40 dB AGC [1] [2] Calculated from S-parameters. Measured in Figure 32 test circuit. [2] [1] Min 31 27 22 - Typ 35 31 26 3 0.9 1.2 Max 39 35 30 1.5 1.9 Unit dB dB dB dB dB dB 90 100 90 99 105 - dBµV dBµV dBµV dBµV BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 5 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 8.1.1 Graphs for amplifier A 40 ID (mA) 30 (1) (2) (3) (4) 001aaf476 30 ID (mA) 20 001aaf477 (1) (2) (3) (4) (5) 20 (5) (6) 10 10 (6) (7) (8) (9) (7) 0 0 0.5 1.0 1.5 VG1-S (V) 2.0 0 0 2 4 VDS (V) 6 (1) VG2-S = 4.0 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3.0 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2.0 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1.0 V. VDS(A) = 5 V; Tj = 25 °C. (1) VG1-S(A) = 1.8 V. (2) VG1-S(A) = 1.7 V. (3) VG1-S(A) = 1.6 V. (4) VG1-S(A) = 1.5 V. (5) VG1-S(A) = 1.4 V. (6) VG1-S(A) = 1.3 V. (7) VG1-S(A) = 1.2 V. (8) VG1-S(A) = 1.1 V. (9) VG1-S(A) = 1.0 V. VG2-S = 4 V; Tj = 25 °C. Fig 2. Amplifier A: transfer characteristics; typical values Fig 3. Amplifier A: output characteristics; typical values BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 6 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 100 IG1 (µA) 80 001aaf478 (1) 36 Yfs (mS) 24 001aaf479 (1) (2) (2) (3) 60 (3) (4) 40 12 (5) (4) 20 (6) (7) (7) (6) (5) 0 0 0.5 1.0 1.5 VG1-S (V) 2.0 0 0 12 24 ID (mA) 36 (1) VG2-S = 4.0 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3.0 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2.0 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1.0 V. VDS(A) = 5 V; Tj = 25 °C. (1) VG2-S = 4.0 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3.0 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2.0 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1.0 V. VDS(A) = 5 V; Tj = 25 °C. Fig 4. Amplifier A: gate1 current as a function of gate1 voltage; typical values 20 ID (mA) 16 001aaf480 Fig 5. Amplifier A: forward transfer admittance as a function of drain current; typical values 20 ID (mA) 15 001aaf481 12 10 8 5 4 0 0 20 40 IG1 (µA) 60 0 0 1 2 3 4 VGG (V) 5 VDS(A) = 5 V; VG2-S = 4 V; Tj = 25 °C. VDS(A) = 5 V; VG2-S = 4 V; RG1(A) = 59 kΩ; Tj = 25 °C. Fig 6. Amplifier A: drain current as a function of gate1 current; typical values Fig 7. Amplifier A: drain current as a function of gate1 supply voltage (VGG); typical values BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 7 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 25 ID (mA) 20 001aaf482 (1) 30 ID (mA) 20 001aaf483 (2) (1) (2) (3) (4) 15 10 (3) (4) (5) 10 5 (5) (6) (7) 0 0 1 2 3 5 VGG = VDS (V) 4 0 0 1 2 3 4 5 VG2-S (V) (1) RG1(A) = 47 kΩ. (2) RG1(A) = 59 kΩ. (3) RG1(A) = 68 kΩ. (4) RG1(A) = 82 kΩ. (5) RG1(A) = 100 kΩ. (6) RG1(A) = 120 kΩ. (7) RG1(A) = 150 kΩ. VG2-S = 4 V; Tj = 25 °C. (1) VGG = 5.0 V. (2) VGG = 4.5 V. (3) VGG = 4.0 V. (4) VGG = 3.5 V. (5) VGG = 3.0 V. Tj = 25 °C; RG1(A) = 59 kΩ (connected to VGG). Fig 8. Amplifier A: drain current as a function of VDS and VGG; typical values Fig 9. Amplifier A: drain current as a function of gate2 voltage; typical values BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 8 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 0 gain reduction (dB) 10 001aaf484 110 Vunw (dBµV) 100 001aaf485 20 30 90 40 50 0 1 2 3 VAGC (V) 4 80 0 10 20 30 40 50 gain reduction (dB) VDS(A) = 5 V; VGG = 5 V; ID(nom)(A) = 19 mA; RG1(A) = 59 kΩ; f = 50 MHz; Tamb = 25 °C; see Figure 32. VDS(A) = 5 V; VGG = 5 V; VG2-S(nom) = 4 V; RG1(A) = 59 kΩ; fw = 50 MHz; funw = 60 MHz; ID(nom)(A) = 19 mA; Tamb = 25 °C; see Figure 32. Fig 10. Amplifier A: typical gain reduction as a function of the AGC voltage; typical values Fig 11. Amplifier A: unwanted voltage for 1 % cross modulation as a function of gain reduction; typical values 001aaf486 30 ID (mA) 20 10 0 0 10 20 30 40 50 gain reduction (dB) VDS(A) = 5 V; VGG = 5 V; VG2-S(nom) = 4 V; RG1(A) = 59 kΩ; f = 50 MHz; ID(nom)(A) = 19 mA; Tamb = 25 °C; see Figure 32. Fig 12. Amplifier A: typical drain current as a function of gain reduction; typical values BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 9 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 102 bis, gis (mS) 10 bis 1 001aaf487 102 001aaf488 −102 Yfs (mS) Yfs ϕfs (deg) 10 ϕfs −10 10−1 gis 10−2 10 102 f (MHz) 103 1 10 102 f (MHz) −1 103 VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = 0 V; ID(A) = 19 mA. VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = 0 V; ID(A) = 19 mA. Fig 13. Amplifier A: input admittance as a function of frequency; typical values 103 Yrs (µS) 102 ϕrs 001aaf489 Fig 14. Amplifier A: forward transfer admittance and phase as a function of frequency; typical values 10 bos, gos (mS) 1 bos 001aaf490 −103 ϕrs (deg) −102 Yrs 10 −10 10-1 gos 1 10 102 f (MHz) −1 103 10-2 10 102 f (MHz) 103 VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = 0 V; ID(A) = 19 mA. VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = 0 V; ID(A) = 19 mA. Fig 15. Amplifier A: reverse transfer admittance and phase as a function of frequency; typical values Fig 16. Amplifier A: output admittance as a function of frequency; typical values BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 10 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 8.1.2 Scattering parameters for amplifier A Table 9. Scattering parameters for amplifier A VDS(A) = 5 V; VG2-S = 4 V; ID(A) = 19 mA; VDS(B) = 0 V; VG1-S(B) = 0 V; Tamb = 25 °C; typical values. f (MHz) s11 Magnitude (ratio) 40 100 200 300 400 500 600 700 800 900 1000 0.9861 0.9883 0.9844 0.9761 0.9635 0.9486 0.9305 0.9105 0.8911 0.8723 0.8521 Angle (deg) −3.2 −7.84 −15.7 −23.52 −31.26 −38.78 −46.2 −53.33 −60.2 −67.03 −73.74 s21 Magnitude (ratio) 3.14 3.14 3.12 3.08 3.03 2.97 2.90 2.81 2.73 2.65 2.56 Angle (deg) 176.75 171.53 163.1 154.65 146.33 138.15 130.12 122.26 114.65 107.2 99.78 s12 Magnitude (ratio) 0.00054 0.00104 0.00205 0.00295 0.00375 0.00437 0.00483 0.0051 0.0052 0.00515 0.00498 Angle (deg) 87.97 87.69 80.77 76.33 72.34 67.97 64.86 62.13 59.88 58.8 58.03 s22 Magnitude (ratio) 0.9934 0.9925 0.9918 0.9904 0.9888 0.9870 0.9847 0.9832 0.9817 0.9796 0.9785 Angle (deg) −1.19 −2.85 −5.69 −8.51 −11.33 −14.13 −16.87 −19.61 −22.35 −25.03 −27.08 8.2 Noise data for amplifier A Table 10. Noise data for amplifier A VDS(A) = 5 V; VG2-S = 4 V; ID(A) = 19 mA, Tamb = 25 °C; typical values. f (MHz) 400 800 NFmin (dB) 0.9 1.2 Γopt (ratio) 0.749 0.688 (deg) 23.7 48.65 0.667 0.583 rn (ratio) 8.3 Dynamic characteristics for amplifier B Table 11. Dynamic characteristics for amplifier B Common source; Tamb = 25 °C; VG2-S = 4 V; VDS(B) = 5 V; ID(B) = 13 mA. Symbol Parameter |yfs| Ciss(G1) Ciss(G2) Coss Crss Gtr forward transfer admittance input capacitance at gate1 input capacitance at gate2 output capacitance transducer power gain Conditions Tj = 25 °C f = 100 MHz f = 100 MHz f = 100 MHz BS = BS(opt); BL = BL(opt) f = 200 MHz; GS = 2 mS; GL = 0.5 mS f = 400 MHz; GS = 2 mS; GL = 1 mS f = 800 MHz; GS = 3.3 mS; GL = 1 mS NF noise figure f = 11 MHz; GS = 20 mS; BS = 0 S f = 400 MHz; YS = YS(opt) f = 800 MHz; YS = YS(opt) [1] [1] [1] [1] [1] Min 28 32 29 27 - Typ 33 1.9 3.4 0.85 20 36 33 31 4 0.9 1.2 Max 43 2.4 40 37 35 1.5 1.9 Unit mS pF pF pF fF dB dB dB dB dB dB reverse transfer capacitance f = 100 MHz BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 11 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET Table 11. Dynamic characteristics for amplifier B …continued Common source; Tamb = 25 °C; VG2-S = 4 V; VDS(B) = 5 V; ID(B) = 13 mA. Symbol Parameter Xmod cross modulation Conditions input level for k = 1 %; fw = 50 MHz; funw = 60 MHz at 0 dB AGC at 10 dB AGC at 20 dB AGC at 40 dB AGC [1] [2] Calculated from S-parameters. Measured in Figure 32 test circuit. [2] Min Typ Max Unit 90 100 88 94 103 - dBµV dBµV dBµV dBµV 8.3.1 Graphs for amplifier B 001aaf491 001aaf492 (1) 50 ID (mA) 40 30 ID (mA) 20 (2) (3) (4) (5) (6) (7) (1) (2) (3) (4) 30 (5) 20 10 (6) 10 (7) 0 0 0.5 1.0 1.5 VG1-S (V) 2.0 0 0 2 4 VDS (V) 6 (1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V. VDS(B) = 5 V; Tj = 25 °C. (1) VG1-S(B) = 1.6 V. (2) VG1-S(B) = 1.5 V. (3) VG1-S(B) = 1.4 V. (4) VG1-S(B) = 1.3 V. (5) VG1-S(B) = 1.2 V. (6) VG1-S(B) = 1.1 V. (7) VG1-S(B) = 1.0 V. VG2-S = 4 V; Tj = 25 °C. Fig 17. Amplifier B: transfer characteristics; typical values Fig 18. Amplifier B: output characteristics; typical values BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 12 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 160 IG1 (µA) 120 001aaf493 48 Yfs (mS) 001aaf494 (1) (2) (3) 36 (2) (1) 80 (4) 24 (3) 40 (5) 12 (5) (6) (7) (4) (6) (7) 0 0 0.5 1.0 1.5 VG1-S (V) 2.0 0 0 12 24 36 ID (mA) 48 (1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V. VDS(B) = 5 V; Tj = 25 °C. (1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V. VDS(B) = 5 V; Tj = 25 °C. Fig 19. Amplifier B: gate1 current as a function of gate1 voltage; typical values 24 ID (mA) 16 001aaf495 Fig 20. Amplifier B: forward transfer admittance as a function of drain current; typical values 001aaf496 16 ID (mA) 12 8 8 4 0 0 10 20 30 40 50 IG1 (µA) 0 0 1 2 3 4 VGG (V) 5 VDS(B) = 5 V; VG2-S = 4 V; Tj = 25 °C. VDS(B) = 5 V; VG2-S = 4 V; RG1(B) = 150 kΩ; Tj = 25 °C. Fig 21. Amplifier B: drain current as a function of gate1 current; typical values Fig 22. Amplifier B: drain voltage as a function of gate1 supply voltage (VGG); typical values BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 13 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 25 ID (mA) 20 001aaf497 16 (1) 001aaf498 (1) (2) ID (mA) 12 (2) (3) (4) (5) 15 8 10 (3) (4) (5) (6) (7) 4 5 0 0 1 2 3 5 VGG = VDS (V) 4 0 0 1 2 3 4 5 VG2-S (V) (1) RG1(B) = 68 kΩ. (2) RG1(B) = 82 kΩ. (3) RG1(B) = 100 kΩ. (4) RG1(B) = 120 kΩ. (5) RG1(B) = 150 kΩ. (6) RG1(B) = 180 kΩ. (7) RG1(B) = 220 kΩ. VG2-S = 5 V; RG1(B) connected to VGG; Tj = 25 °C. (1) VGG = 5.0 V. (2) VGG = 4.5 V. (3) VGG = 4.0 V. (4) VGG = 3.5 V. (5) VGG = 3.0 V. RG1(B) = 150 kΩ; Tj = 25 °C. Fig 23. Amplifier B: drain current as a function of VDS and VGG; typical values Fig 24. Amplifier B: drain current as a function of gate2 voltage; typical values BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 14 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 0 gain reduction (dB) 20 001aaf499 110 Vunw (dBµV) 105 001aaf500 100 95 40 90 60 0 1 2 3 VAGC (V) 4 85 0 10 20 30 40 50 gain reduction (dB) VDS(B) = 5 V; VG2-S(nom) = 4 V; RG1(B) = 150 kΩ; ID(nom)(B) = 13 mA; Tamb = 25 °C; see Figure 32. VDS(B) = 5 V; VG2-S(nom) = 4 V; RG1(B) = 150 kΩ; ID(nom)(B) = 13 mA; fw = 50 MHz; funw = 60 MHz; Tamb = 25 °C; see Figure 32. Fig 25. Amplifier B: typical gain reduction as a function of the AGC voltage; typical values Fig 26. Amplifier B: unwanted voltage for 1 % cross modulation as a function of gain reduction; typical values 001aaf501 15 ID (mA) 12 9 6 3 0 0 10 20 30 40 50 gain reduction (dB) VDS(B) = VGG = 5 V; VG2-S(nom) = 4 V; RG1(B) = 150 kΩ; ID(nom)(B) = 13 mA; f = 50 MHz; Tamb = 25 °C; see Figure 32. Fig 27. Amplifier B: typical drain current as a function of gain reduction; typical values BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 15 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 102 bis, gis (mS) 10 bis 1 001aaf502 102 001aaf503 −102 Yfs (mS) Yfs ϕfs (deg) 10 ϕfs −10 gis 10−1 10−2 10 102 f (MHz) 103 1 10 102 f (MHz) −1 103 VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = 0 V; ID(B) = 13 mA. VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = 0 V; ID(B) = 13 mA. Fig 28. Amplifier B: input admittance as a function of frequency; typical values 103 Yrs (mS) 102 ϕrs 001aaf504 Fig 29. Amplifier B: forward transfer admittance and phase as a function of frequency; typical values 10 bos, gos (mS) 1 bos 001aaf505 103 ϕrs (deg) 102 Yrs 10 10 10−1 gos 1 10 102 f (MHz) 1 103 10−2 10 102 f (MHz) 103 VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = 0 V; ID(B) = 13 mA. VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = 0 V; ID(B) = 13 mA. Fig 30. Amplifier B: reverse transfer admittance and phase as a function of frequency; typical values Fig 31. Amplifier B: output admittance as a function of frequency; typical values BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 16 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 8.3.2 Scattering parameters for amplifier B Table 12. Scattering parameters for amplifier B VDS(B) = 5 V; VG2-S = 4 V; ID(B) = 13 mA; VDS(A) = 0 V; VG1-S(A) = 0 V; Tamb = 25 °C; typical values. f (MHz) s11 Magnitude (ratio) 40 100 200 300 400 500 600 700 800 900 1000 0.9874 0.9883 0.9844 0.9777 0.9684 0.9578 0.9442 0.9291 0.9147 0.9002 0.8836 Angle (deg) −2.79 −6.8 −13.52 −20.2 −26.83 −33.32 −39.8 −46.08 −52.18 −58.35 −64.49 s21 Magnitude (ratio) 3.41 3.41 3.39 3.36 3.32 3.27 3.21 3.16 3.08 3.08 2.93 Angle (deg) 177.08 172.57 165.23 157.88 150.6 143.38 136.22 129.15 122.25 115.4 108.49 s12 Magnitude (ratio) 0.00054 0.00113 0.00224 0.00336 0.00447 0.0055 0.00649 0.00741 0.00828 0.00914 0.00997 Angle (deg) 89.27 90.81 89.67 89.02 88.43 87.64 87.53 87.51 87.7 88.14 88.26 s22 Magnitude (ratio) 0.992 0.9900 0.9897 0.9889 0.9881 0.9870 0.9851 0.9838 0.9825 0.9803 0.9789 Angle (deg) −1.26 −2.91 −5.81 −8.7 −11.61 −14.52 −17.39 −20.3 −23.2 −26.06 −29.03 8.4 Noise data for amplifier B Table 13. Noise data for amplifier B VDS(B) = 5 V; VG2-S = 4 V; ID(B) = 13 mA, Tamb = 25 °C; typical values. f (MHz) 400 800 NFmin (dB) 0.9 1.2 Γopt (ratio) 0.743 0.687 (deg) 20.27 42.08 0.65 0.581 rn (ratio) 9. Test information VAGC R1 10 kΩ C1 4.7 nF C3 4.7 nF L1 ≈ 2.2 µH C4 RG1 4.7 nF RL 50 Ω C2 4.7 nF R2 50 Ω DUT RGEN 50 Ω VI VGG VDS 001aad926 Fig 32. Cross modulation test setup (for one MOSFET) BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 17 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 10. Package outline Plastic surface-mounted package; 6 leads SOT363 D B E A X y HE vMA 6 5 4 Q pin 1 index A A1 1 e1 e 2 bp 3 wM B detail X Lp c 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT363 REFERENCES IEC JEDEC JEITA SC-88 EUROPEAN PROJECTION ISSUE DATE 04-11-08 06-03-16 Fig 33. Package outline SOT363 BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 18 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 11. Abbreviations Table 14. Acronym AGC DC MOSFET UHF VHF Abbreviations Description Automatic Gain Control Direct Current Metal-Oxide-Semiconductor Field-Effect Transistor Ultra High Frequency Very High Frequency 12. Revision history Table 15. BF1210_1 Revision history Release date 20061025 Data sheet status Product data sheet Change notice Supersedes Document ID BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 19 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 13. Legal information 13.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 13.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 13.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com BF1210_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 25 October 2006 20 of 21 NXP Semiconductors BF1210 Dual N-channel dual gate MOSFET 15. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 8.1 8.1.1 8.1.2 8.2 8.3 8.3.1 8.3.2 8.4 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics for amplifier A. . . . . . . 4 Graphs for amplifier A . . . . . . . . . . . . . . . . . . . . 6 Scattering parameters for amplifier A . . . . . . . 11 Noise data for amplifier A . . . . . . . . . . . . . . . . 11 Dynamic characteristics for amplifier B. . . . . . 11 Graphs for amplifier B . . . . . . . . . . . . . . . . . . . 12 Scattering parameters for amplifier B . . . . . . . 17 Noise data for amplifier B . . . . . . . . . . . . . . . . 17 Test information . . . . . . . . . . . . . . . . . . . . . . . . 17 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 19 Legal information. . . . . . . . . . . . . . . . . . . . . . . 20 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 20 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Contact information. . . . . . . . . . . . . . . . . . . . . 20 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2006. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 25 October 2006 Document identifier: BF1210_1