BGA7210

BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier Rev. 2 — 4 January 2012 Product data sheet 1. Product profile 1.1 General description The BGA7210 MMIC is an extremely linear Variable Gain Amplifier (VGA), operating from 0.7 GHz to 3.8 GHz. The maximum gain is 30 dB. It has an attenuation range of 31.5 dB. At its minimum attenuation setting it has a maximum output power of 21 dBm, an IP3O of 39 dBm and a noise figure of 6.5 dB. The current consumption can be optimized per attenuation setting allowing for optimized overall system performance. The current consumption and attenuation level are controlled through a Serial Peripheral Interface (SPI). The current can be reduced to 120 mA. Optimal linearity performance is obtained at 185 mA. The BGA7210 has a fast switching power-down pin to further reduce current consumption during idle time. The BGA7210 has been designed and qualified for the severe mission profile of cellular base stations, but its outstanding RF performance and interfacing flexibility make it suitable for a wide variety of applications. The BGA7210 is housed in a 32 pins 5 mm  5 mm leadless HVQFN32 package. 1.2 Features and benefits           Operating frequency range from 0.7 GHz to 3.8 GHz High gain of 30 dB High IP3O of 39 dBm Attenuation range of 31.5 dB with 0.5 dB step (6 bit) Maximum output power of 21 dBm Noise figure of 6.5 dB at maximum gain ESD protection on all pins (HBM 4 kV; CDM 2 kV) Fast switching power-save mode Moisture sensitivity level 2 Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances (RoHS) 1.3 Applications     IF and RF applications WiMAX and cellular base stations Cable modem termination systems Temperature compensation circuits NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 1.4 Quick reference data Table 1. Quick reference data 4.75 V  VSUP  5.25 V; 40 C  Tamb  +85 C; maximum current; input and output is terminated with 50 ; unless otherwise specified. Symbol Parameter VSUP ICC(tot) supply voltage total supply current maximum current optimized current minimum current power-down current Tamb Gp ambient temperature power gain minimum attenuation 700 MHz  f  1400 MHz 1400 MHz  f  1700 MHz 1700 MHz  f  2200 MHz 2200 MHz  f  2800 MHz 3400 MHz  f  3800 MHz range attenuation range 700 MHz  f  2200 MHz 2200 MHz  f  2800 MHz 3400 MHz  f  3800 MHz NF noise figure minimum attenuation 700 MHz  f  2200 MHz 2200 MHz  f  2800 MHz 3400 MHz  f  3800 MHz maximum attenuation 700 MHz  f  2200 MHz 2200 MHz  f  2800 MHz 3400 MHz  f  3800 MHz IP3O output third-order intercept point minimum attenuation 700 MHz  f  1400 MHz 1400 MHz  f  1700 MHz 1700 MHz  f  2200 MHz 2200 MHz  f  2800 MHz 2200 MHz  f  2800 MHz; Csh = 0.68 pF 3400 MHz  f  3800 MHz maximum attenuation 700 MHz  f  1400 MHz 1400 MHz  f  1700 MHz 1700 MHz  f  2200 MHz 2200 MHz  f  2800 MHz 2200 MHz  f  2800 MHz; Csh = 0.68 pF 3400 MHz  f  3800 MHz [4] [3] [4] [3] [2] Conditions [1] Min Typ Max Unit 4.75 5.0 160 40 26 26 26 25 22 28 27 26 34 32 30 28 30 24 195 185 120 15 5.25 V 230 mA mA mA mA +25 +85 C 30 29 28 26 33 33 31 30 dB dB dB dB dB dB dB dB dB dB dB 29.5 33 31.5 35 30.5 34 29.5 33 6.5 7 8 8.5 9 10 27.5 30.5 dB 28 31 dB dB dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm 28.5 32 39 37 35 34 35 30 35 33 31 30 30 25 - BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 2 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier Table 1. Quick reference data …continued 4.75 V  VSUP  5.25 V; 40 C  Tamb  +85 C; maximum current; input and output is terminated with 50 ; unless otherwise specified. Symbol Parameter PL(1dB) Conditions 700 MHz  f  2800 MHz 2200 MHz  f  2800 MHz; Csh = 0.68 pF 3400 MHz  f  3800 MHz [1] [2] [3] [4] Supply voltage on pins RF_OUT, VCC2, VDDA, VCC1 and VDDD. See Section 9.2. Pi = 12 dBm per tone; f = 10 MHz. See Section 11. [4] Min Typ Max Unit 18 20 16 21 23 19 dBm dBm dBm output power at 1 dB gain compression minimum attenuation 2. Pinning information 2.1 Pinning 29 RF_IN 32 GND 31 GND 28 GND 27 GND 26 GND 25 GND 24 PUPMXG/PWRDN 23 CLK 22 SER_IN 21 SS 20 SER_OUT 19 VDDD 18 GND 17 VCC1 GND 10 RF_OUT 12 GND 13 GND 14 VCC2 15 VDDA 16 n.c. 11 9 aaa-000658 terminal 1 index area GND GND GND GND GND GND GND GND 1 2 3 4 5 6 7 8 GND Transparent top view Transparent top view Fig 1. Pin configuration 2.2 Pin description Table 2. Symbol GND n.c. RF_OUT VCC2 VDDA BGA7210 Pin description Pin Description 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 13, Ground 14, 18, 25, 26, 27, 28, 31, 32 11, 30 12 15 16 not connected RF output and supply to amplifier 2 Supply voltage to amplifier 2 Analog supply voltage to DSA All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 30 n.c. BGA7210 3 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier Pin description …continued Pin 17 19 21 22 23 Description Supply voltage to amplifier 1 Digital supply voltage to digital controller SPI data output SPI slave select (0 = select; 1 = deselect) SPI data input SPI clock input Power-up gain attenuation / power down RF input Table 2. Symbol VCC1 VDDD SS SER_IN CLK SER_OUT 20 PUPMXG/ 24 PWRDN RF_IN 29 3. Ordering information Table 3. Ordering information Name BGA7210 HVQFN32 Description plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 5  5  0.85 mm Version SOT617-3 Type number Package 4. Marking Table 4. BGA7210 Marking Marking code 7210 ***** TSD***1Y manufacturing code ** = The actual assembly date code. Description Type number 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VSUP VI VO II IO PRFIN Tstg supply voltage input voltage output voltage input current output current power on pin RF_IN storage temperature Conditions [1] [2] [3] [4] [5] Min Max Unit V V V mA mA dBm 0.6 +8 0.6 +8 0.6 +8 20 20 65 +20 +20 30 +150 C BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 4 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier Table 5. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Tj VESD junction temperature electrostatic discharge Human Body Model (HBM); voltage According JEDEC standard 22-A114E Charged Device Model (CDM); According JEDEC standard 22-C101B [1] [2] [3] [4] [5] Conditions Min - Max 150 4 2 Unit C kV kV Absolute maximum DC voltage on pins RF_OUT, VCC2, VDDA, VCC1, VDDD and RF_IN. Absolute maximum DC voltage on pins SS, SER_IN, CLK and PUPMXG/PWRDN. Absolute maximum DC voltage on pin SER_OUT. Absolute maximum DC current through pins SS, SER_IN, CLK and PUPMXG/PWRDN. Absolute maximum DC current through pin SER_OUT. 6. Thermal characteristics Table 6. Symbol Rth(j-sp) [1] Thermal characteristics Parameter thermal resistance from junction to solder point Conditions Tsp  85 C [1] Typ 16 Unit K/W Tsp is the temperature at the solder point. 7. Static characteristics Table 7. Symbol VSUP ICC(tot) Static characteristics Parameter supply voltage total supply current maximum optimized current minimum current power-down current Tamb ICC ambient temperature supply current supply current supply current supply current supply current VIL VIH VOL VOH IOL IOH [1] [2] [2] Conditions [1] Min 4.75 160 40 [3] [3] [4] [4] [4] [4] Typ 5.0 195 185 120 15 +25 85 45 5 55 5 0 3.3 0 3.3 - Max 5.25 230 +85 +0.8 VSUP + 0.1 +0.8 3.4 0 15 Unit V mA mA mA mA C mA mA mA mA mA V V V V mA mA on pin RF_OUT on pin VCC2 on pin VDDA on pin VCC1 on pin VDDD LOW-level input voltage HIGH-level input voltage LOW-level output voltage HIGH-level output voltage LOW-level output current HIGH-level output current Supply voltage on pins RF_OUT, VCC2, VDDA, VCC1 and VDDD. See Section 9.2. All information provided in this document is subject to legal disclaimers. 0.1 2 0.1 2.5 15 0 BGA7210 © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 5 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier [3] [4] Digital input pins are: SS, SER_IN, CLK and PUPMXG/PWRDN. Digital output pin is: SER_OUT. 8. Dynamic characteristics Table 8. Dynamic characteristics 4.75 V  VSUP  5.25 V; 40 C  Tamb  +85 C; maximum current; input and output terminated with 50 , unless otherwise specified. Symbol Gp Parameter power gain Conditions minimum attenuation 700 MHz  f  1400 MHz 1400 MHz  f  1700 MHz 1700 MHz  f  2200 MHz 2200 MHz  f  2800 MHz 3400 MHz  f  3800 MHz G/T gain variation with temperature 26 26 26 25 22 0.03 0.2 700 MHz  f  2200 MHz 2200 MHz  f  2800 MHz 3400 MHz  f  3800 MHz step Gp attenuation step 700 MHz  f  2800 MHz 3400 MHz  f  3800 MHz power gain variation 700 MHz  f  3800 MHz 700 MHz  f  2200 MHz 2200 MHz  f  2800 MHz 3400 MHz  f  3800 MHz Gp(flat) RLin RLout NF power gain flatness input return loss output return loss noise figure 700 MHz  f  3800 MHz; per 200 MHz 700 MHz  f  3800 MHz 700 MHz  f  3800 MHz 2200 MHz  f  2800 MHz; Csh = 0.68 pF minimum attenuation 700 MHz  f  2200 MHz 2200 MHz  f  2800 MHz 3400 MHz  f  3800 MHz maximum attenuation 700 MHz  f  2200 MHz 2200 MHz  f  2800 MHz 3400 MHz  f  3800 MHz 27.5 28 28.5 30.5 31 32 dB dB dB 6.5 7 8 8.5 9 10 dB dB dB [1] [2] Min Typ 30 29.5 29 28 26 Max 33 33 33 31 30 Unit dB dB dB dB dB dB/C dB/V dB dB dB dB dB dB 0.006 0 31.5 30.5 29.5 0.5 0.5 +0.2 35 34 33 1 1.2 +1.5 G/VSUP gain variation with supply voltage range attenuation range 28 27 26 0 0 1.5 (0.5 + 0.025  i) (0.3 + 0.025  i) (0.5 + 0.025  i) 10 7 10 - +(0.5 + dB 0.025  i) +(0.3 + dB 0.025  i) +(0.5 + dB 0.025  i) 1 dB dB dB dB [2] [2] BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 6 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier Table 8. Dynamic characteristics …continued 4.75 V  VSUP  5.25 V; 40 C  Tamb  +85 C; maximum current; input and output terminated with 50 , unless otherwise specified. Symbol IP3O Parameter output third-order intercept point Conditions minimum attenuation 700 MHz  f  1400 MHz 1400 MHz  f  1700 MHz 1700 MHz  f  2200 MHz 2200 MHz  f  2800 MHz 2200 MHz  f  2800 MHz; Csh = 0.68 pF 3400 MHz  f  3800 MHz maximum attenuation 700 MHz  f  1400 MHz 1400 MHz  f  1700 MHz 1700 MHz  f  2200 MHz 2200 MHz  f  2800 MHz 2200 MHz  f  2800 MHz; Csh = 0.68 pF 3400 MHz  f  3800 MHz PL(1dB) output power at 1 dB gain compression minimum attenuation 700 MHz  f  2800 MHz 2200 MHz  f  2800 MHz; Csh = 0.68 pF 3400 MHz  f  3800 MHz maximum attenuation 700 MHz  f  2800 MHz 2200 MHz  f  2800 MHz; Csh = 0.68 pF 3400 MHz  f  3800 MHz td(pd) td(pu) tresp() [1] [2] [3] [4] [5] [6] [4] [4] [4] [3] [4] [3] Min 34 32 30 28 30 24 18 20 16 [5] Typ 39 37 35 33 35 27 35 33 31 30 30 25 21 23 19 20 20 16 100 5 100 Max - Unit dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm ns s ns power-down delay time power-up delay time attenuation response time - [5] [5][ 6] Normalized to maximum gain and attenuation i specifies the decimal attenuation step, ranging from 0 to 63. Pi = 12 dBm per tone; f = 10 MHz. See Section 11. To within 0.1 dB of final gain state. After last SPI bit is clocked in. BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 7 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 9. Serial Peripheral Interface 9.1 Command word format The Serial Peripheral Interface (SPI) operates in mode 0. This means that when the SPI is inactive the clock pin is logically LOW. When the SPI interface is active the data is clocked in at the rising edge of the clock pulse; data is clocked out at the negative edge. The control word length is 12 bits (see Figure 2), however the word length can be extended appropriately with trailing zeros (see Figure 3). CLK SS SERIN SEROUT C1 C1 C0 C0 D9 D9 D8 D8 D7 D7 D6 D6 D5 D5 D4 D4 D3 D3 D2 D2 D1 D1 D0 D0 NEW STATE aaa-000659 OLD CURRENT AND ATTENUATION STATE Fig 2. Timing diagram for 12-bit word CLK SS SERIN SEROUT C1 C1 C0 C0 D9 D9 D8 D8 D7 D7 D6 D6 D5 D5 D4 D4 D3 D3 D2 D2 D1 D1 D0 D0 NEW STATE aaa-000660 OLD CURRENT AND ATTENUATION STATE Fig 3. Timing diagram for 12-bit word length followed by four ignored trailing bits The word written on the input (SER_IN) will be replicated on the output (SER_OUT) 9.2 Setting current and attenuation The current and attenuation are set by bits D9 to D0 and are preceded by the command bits C0 and C1, which are always set to logic LOW, see Figure 4. If all bits are set to logic LOW (0x000) then current is at maximum and attenuation is at minimum; if all bits are set to logic HIGH (0x3FF) then current is at minimum and attenuation is at maximum. BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 8 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier CLK SERIN/OUT SET C1 00 command C0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 00 ... 11 Iamp1 00 ... 11 Iamp2 000000 ... 111111 attenuation aaa-000661 Fig 4. Command to set current of the first amplifier (D9, D8); second amplifier (D7, D6) and attenuation (D5, ... , D2) Depending on the attenuation setting the current through the first amplifier and the second amplifier can be optimized, without compromising on linearity. At attenuations less than 9 dB the current in the first amplifier can be reduced with 10 mA; at attenuations equal or larger than 9 dB the current in the second amplifier can be reduced by 15 mA. Table 9. D9, D8 0x0 0x1 0x2 0x3 Table 10. D7, D6 0x0 0x1 0x2 0x3 Table 11. 0x00 0x01 0x02 0x04 0x08 0x10 0x20 0x3F Current first amplifier truth table Current reduction (mA) 0 10 20 30 Current second amplifier truth table Current reduction (mA) 0 15 30 45 Attenuation truth table; major states only Attenuation (dB) 0 0.5 1 2 4 8 16 31.5 D5, D4, D3, D2, D1, D0 BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 9 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 9.3 SPI timing CLK SERIN/OUT tsu SS C1 C0 th D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 tsu(SS) th(SS) aaa-000662 Fig 5. Timing diagram Table 12. SPI timing 4.75 V  VSUP  5.25 V; 40 C  Tamb  +85 C unless otherwise specified. Symbol fSPI tsu th tsu(SS) th(SS) Parameter SPI frequency set-up time hold time set-up time on pin SS hold time on pin SS Tcase Conditions Min 0.1 10 10 10 10 + 11 / fSPI Typ Max 20 Unit MHz ns ns ns ns 10. Power-up and power save The PUPMXG/PWRDN pin determines the attenuation and currents at start-up of the chip (see Table 13). After start-up it can be used to power-down the device. PUPMXG/ PWRDN POR STATE UNDEFINED PUPMXG = 1 ON OFF ON OFF ON PUPMXG/ PWRDN POR STATE UNDEFINED PUPMXG = 0 OFF ON OFF ON OFF aaa-000664 Fig 6. PUPMXG/PWRDN Table 13. Power-up truth table Current (mA) 0 1 120 195 Attenuation (dB) 31.5 0 PUPMXG/PWRDN BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 10 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 11. Application information 11.1 Application board A customer application board is available from NXP upon request. It includes USB interface circuitry and customer software to facilitate evaluation of the BGA7210. The final application shall be terminated with 50  and decoupled as depicted in Figure 7. The ground leads and exposed paddle should be connected directly to the ground plane. A sufficient number of via holes should be provided to connect the top and bottom ground planes in the final application board. Sufficient cooling should be provided that the temperature of the exposed die pad does not exceed 85 C. VSUP C23 L1 C22 C12 C26 C25 PUPMXG/ VDDD VCC1 CLK SERIN SS SEROUT PWRDN 24 23 22 21 20 19 17 VDDA 16 C14 C24 C18 15 VCC2 C17 L2 C1 RF_IN 29 12 RF_OUT C27 RF_OUT Csh aaa-000665 See Table 14 for list of components. Fig 7. Table 14. List of components See Figure 7 for schematics. Component C1, C27 C12 C14 C17 C18 C22 C23 C24 C25 BGA7210 Schematic representation of the customer evaluation board Description DC blocking capacitor decoupling capacitor decoupling capacitor decoupling capacitor decoupling capacitor optional decoupling capacitor optional decoupling capacitor decoupling capacitor decoupling capacitor Value 100 pF 100 nF 100 nF 100 nF 100 nF 10 F 10 F 100 pF 100 nF Remarks Murata GRM close to pin 19 close to pin 17 close to pin 15 close to pin 16 part of optional ripple filter part of optional ripple filter All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 11 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier Table 14. List of components …continued See Figure 7 for schematics. Component C26 Csh L1 L2 Description decoupling capacitor optional matching capacitor to improve linearity at 2.2 GHz to 2.8 GHz optional inductor inductor Value 4.7 F 0.68 pF 820 nH 22 nH Murata GRM; shall be located 5.5 mm from pin RF-OUT when using FR4 PCB described below. part of optional ripple filter Murata LQW 18 Remarks The recommended FR4 PCB layer stack is described in Figure 8. A 50  coplanar grounded wave guide can be implemented by a 0.48 mm RF track and a clearance between the track and the ground planes of 1 mm on both sides. through via RF and analog routing 0.28 mm FR4 RF and analog ground 0.30 mm core analog routing 0.28 mm FR4 RF and analog ground aaa-000666 r = 4.5; interconnect 35 m copper. Fig 8. Printed-Circuit Board (PCB) layer stack BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 12 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 11.2 Characteristics 34 S21 (dB) 30 aaa-000667 34 S21 (dB) 30 aaa-000668 26 (1) (2) (3) 26 (1) (2) (3) 22 0 1 2 3 4 f (GHz) 5 22 0 1 2 3 4 f (GHz) 5 VSUP = 5 V; maximum current setting. (1) Tamb = 40 C (2) Tamb = +25 C (3) Tamb = +85 C VSUP = 5 V; maximum current setting and shunt capacitor (Csh). (1) Tamb = 40 C (2) Tamb = +25 C (3) Tamb = +85 C Fig 9. Maximum power gain as a function of frequency; typical values Fig 10. Maximum power gain with shunt capacitor as a function of frequency; typical values BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 13 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 35 S21 (dB) 25 (1) (2) (3) (4) (5) (6) (7) aaa-000669 40 ∆Gp (dB) 30 aaa-000670 15 (1) (2) (3) 20 5 -5 0 16 32 48 64 attenuation (decimal) 10 0 1 2 3 4 f (GHz) 5 VSUP = 5 V; Tamb = 25 C; maximum current setting. (1) f = 0.7 GHz (2) f = 1.4 GHz (3) f = 1.7 GHz (4) f = 2.2 GHz (5) f = 2.8 GHz (6) f = 2.8 GHz and Csh used (7) f = 3.8 GHz VSUP = 5 V; maximum current setting. (1) Tamb = 40 C (2) Tamb = +25 C (3) Tamb = +85 C Fig 11. Power gain as a function of attenuation state; typical values Fig 12. Power gain range as a function of frequency; typical values BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 14 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 0.0 gain step size (dB) -0.2 aaa-000671 2 gain accuracy (dB) 1 aaa-000672 +(0 0 .5 + .02 i) 5x α (8) (6) (4) (3) (2) -0.4 0 -0.6 (1) (2) (3) (4) (5) (6) (7) -1 -0.8 -(0. 5+ 0.0 25 xi (1) (5) (7) α) -1.0 0 16 32 48 64 attenuation (decimal) -2 0 16 32 48 64 attenuation (decimal) VSUP = 5 V; Tamb = 25 C; maximum current setting. (1) f = 0.7 GHz (2) f = 1.4 GHz (3) f = 1.7 GHz (4) f = 2.2 GHz (5) f = 2.8 GHz (6) f = 2.8 GHz and Csh used (7) f = 3.8 GHz VSUP = 5 V; Tamb = 25 C; maximum current setting. (1) f = 0.7 GHz; range = 31.5 dB (2) f = 1.4 GHz; range = 31.5 dB (3) f = 1.7 GHz; range = 31.5 dB (4) f = 2.2 GHz; range = 31.5 dB (5) f = 2.2 GHz; range = 30.5 dB (6) f = 2.8 GHz; range = 30.5 dB (7) f = 2.8 GHz; range = 29.5 dB (8) f = 3.8 GHz; range = 29.5 dB Fig 13. Gain step size as a function of attenuation state; typical values Fig 14. Power gain accuracy as a function of attenuation state; typical values BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 15 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier -5 S11 (dB) -15 aaa-000673 -5 S22 (dB) -15 (1) (2) (3) aaa-000674 -25 (1) (2) (3) -25 -35 0 1 2 3 4 f (GHz) 5 -35 0 1 2 3 4 f (GHz) 5 VSUP = 5 V; maximum current setting; minimum attenuation. (1) Tamb = 40 C (2) Tamb = +25 C (3) Tamb = +85 C VSUP = 5 V; maximum current setting; minimum attenuation. (1) Tamb = 40 C (2) Tamb = +25 C (3) Tamb = +85 C Fig 15. Input return loss as a function of frequency; typical values Fig 16. Output return loss as a function of frequency; typical values BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 16 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 0 S11 (dB) -10 (1) (2) (3) (4) (5) (6) (7) (8) aaa-000675 0 S22 (dB) -10 aaa-000676 -20 -20 -30 -30 (1) (2) (3) (4) (5) (6) (7) (8) -40 -40 -50 0 1 2 3 4 f (GHz) 5 -50 0 1 2 3 4 f (GHz) 5 VSUP = 5 V; Tamb = 25 C; maximum current setting. (1) attenuation = 0x00 (minimum) (2) attenuation = 0x01 (3) attenuation = 0x02 (4) attenuation = 0x04 (5) attenuation = 0x08 (6) attenuation = 0x10 (7) attenuation = 0x20 (8) attenuation = 0x3F (maximum) VSUP = 5 V; Tamb = 25 C; maximum current setting. (1) attenuation = 0x00 (minimum) (2) attenuation = 0x01 (3) attenuation = 0x02 (4) attenuation = 0x04 (5) attenuation = 0x08 (6) attenuation = 0x10 (7) attenuation = 0x20 (8) attenuation = 0x3F (maximum) Fig 17. Input return loss as a function of frequency; typical values Fig 18. Output return loss as a function of frequency; typical values BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 17 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 0 S11 (dB) -10 aaa-000677 0 S22 (dB) -10 aaa-000678 -20 -20 -30 -40 (1) (2) (3) (4) (5) (6) (7) (8) -30 (1) (2) (3) (4) (5) (6) (7) (8) -40 -50 0 1 2 3 4 f (GHz) 5 -50 0 1 2 3 4 f (GHz) 5 VSUP = 5 V; Tamb = 25 C; maximum current setting and shunt capacitor (Csh). (1) attenuation = 0x00 (minimum) (2) attenuation = 0x01 (3) attenuation = 0x02 (4) attenuation = 0x04 (5) attenuation = 0x08 (6) attenuation = 0x10 (7) attenuation = 0x20 (8) attenuation = 0x3F (maximum) VSUP = 5 V; Tamb = 25 C; maximum current setting and shunt capacitor (Csh). (1) attenuation = 0x00 (minimum) (2) attenuation = 0x01 (3) attenuation = 0x02 (4) attenuation = 0x04 (5) attenuation = 0x08 (6) attenuation = 0x10 (7) attenuation = 0x20 (8) attenuation = 0x3F (maximum) Fig 19. Input return loss with shunt capacitor as a function of frequency; typical values Fig 20. Output return loss with shunt capacitor as a function of frequency; typical values BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 18 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 45 IP3o (dBm) 35 aaa-000679 45 IP3o (dBm) 35 aaa-000680 25 (1) (2) (3) (4) (5) (6) (7) 25 (1) (2) (3) (4) (5) (6) (7) 15 0 16 32 48 64 attenuation (decimal) 15 0 16 32 48 64 attenuation (decimal) VSUP = 5 V; Tamb = 40 C; maximum current setting. (1) f = 0.7 GHz (2) f = 1.4 GHz (3) f = 1.7 GHz (4) f = 2.2 GHz (5) f = 2.8 GHz (6) f = 2.8 GHz and Csh used (7) f = 3.8 GHz VSUP = 5 V; Tamb = 25 C; maximum current setting. (1) f = 0.7 GHz (2) f = 1.4 GHz (3) f = 1.7 GHz (4) f = 2.2 GHz (5) f = 2.8 GHz (6) f = 2.8 GHz and Csh used (7) f = 3.8 GHz Fig 21. Output third-order intercept point as a function of attenuation state; typical values Fig 22. Output third-order intercept point as a function of attenuation state; typical values BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 19 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 45 IP3o (dBm) 35 aaa-000682 45 IP3o (dBm) 35 (1) (2) (3) (4) (5) (6) (7) aaa-000683 25 (1) (2) (3) (4) (5) (6) (7) 25 15 0 16 32 48 64 attenuation (decimal) 15 0 16 32 48 64 attenuation (decimal) VSUP = 5 V; Tamb = 85 C; maximum current setting. (1) f = 0.7 GHz (2) f = 1.4 GHz (3) f = 1.7 GHz (4) f = 2.2 GHz (5) f = 2.8 GHz (6) f = 2.8 GHz and Csh used (7) f = 3.8 GHz VSUP = 5 V; Tamb = 25 C; minimal current setting. (1) f = 0.7 GHz (2) f = 1.4 GHz (3) f = 1.7 GHz (4) f = 2.2 GHz (5) f = 2.8 GHz (6) f = 2.8 GHz and Csh used (7) f = 3.8 GHz Fig 23. Output third-order intercept point as a function of attenuation state; typical values Fig 24. Output third-order intercept point as a function of attenuation state; typical values BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 20 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 45 IP3o (dBm) 35 aaa-000685 45 IP3o (dBm) 35 aaa-000687 (1) (2) (3) (6) (4) (5) (7) 25 (1) (2) (3) (4) (5) (6) (7) 25 15 -30 -20 -10 0 relative current through first amplifier (mA) 15 -50 -40 -30 -20 -10 0 relative current through second amplifier (mA) VSUP = 5 V; Tamb = 25 C; maximum gain; maximum current through second amplifier. (1) f = 0.7 GHz (2) f = 1.4 GHz (3) f = 1.7 GHz (4) f = 2.2 GHz (5) f = 2.8 GHz (6) f = 2.8 GHz and Csh used (7) f = 3.8 GHz VSUP = 5 V; Tamb = 25 C; maximum gain; maximum current through first amplifier. (1) f = 0.7 GHz (2) f = 1.4 GHz (3) f = 1.7 GHz (4) f = 2.2 GHz (5) f = 2.8 GHz (6) f = 2.8 GHz and Csh used (7) f = 3.8 GHz Fig 25. Output third-order intercept point as a function of relative current through first amplifier; typical values Fig 26. Output third-order intercept point as a function of relative current through second amplifier; typical values BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 21 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 45 IP3o (dBm) 35 (1) (2) (3) (4) (5) (6) (7) aaa-000689 45 IP3o (dBm) 35 (1) (2) (3) (6) (4) (5) aaa-000690 25 25 (7) 15 -30 -20 -10 0 relative current through first amplifier (mA) 15 -50 -40 -30 -20 -10 0 relative current through second amplifier (mA) VSUP = 5 V; Tamb = 25 C; minimum gain; maximum current through second amplifier. (1) f = 0.7 GHz (2) f = 1.4 GHz (3) f = 1.7 GHz (4) f = 2.2 GHz (5) f = 2.8 GHz (6) f = 2.8 GHz and Csh used (7) f = 3.8 GHz VSUP = 5 V; Tamb = 25 C; minimum gain; maximum current through first amplifier. (1) f = 0.7 GHz (2) f = 1.4 GHz (3) f = 1.7 GHz (4) f = 2.2 GHz (5) f = 2.8 GHz (6) f = 2.8 GHz and Csh used (7) f = 3.8 GHz Fig 27. Output third-order intercept point as a function of relative current through first amplifier; typical values Fig 28. Output third-order intercept point as a function of relative current through second amplifier; typical values BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 22 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 200 Itot (mA) 190 (2) aaa-000692 45 IP3o (dBm) 35 aaa-000693 (1) (2) (3) (1) (4) 180 25 170 160 0 16 32 48 64 attenuation (decimal) 15 0 16 32 48 64 attenuation (decimal) VSUP = 5 V; Tamb = 25 C. (1) IAMP1 / IAMP2 = 0 mA / 15 mA (2) IAMP1 / IAMP2 = 10 mA / 0 mA VSUP = 5 V; Tamb = 25 C; f = 2.8 GHz. (1) IAMP1 / IAMP2 = Iopt (2) IAMP1 / IAMP2 = 0 mA / 0 mA (3) IAMP1 / IAMP2 = 0 mA / 15 mA (4) IAMP1 / IAMP2 = 10 mA / 0 mA Fig 29. Total current as a function of attenuation state optimized for IP3O; typical values 200 Itot (mA) 190 (2) aaa-000694 Fig 30. Output third-order intercept point as a function of attenuation state; typical values 200 Itot (mA) 190 aaa-000695 (1) (1) 180 (3) 180 (2) 170 (4) 170 (3) 160 160 (4) 150 -40 -15 10 35 60 85 Tamb (°C) 150 -40 -15 10 35 60 85 Tamb (°C) VSUP = 5 V; maximum current through second amplifier. (1) IAMP1 = 0 mA (2) IAMP1 = 10 mA (3) IAMP1 = 20 mA (4) IAMP1 = 30 mA VSUP = 5 V; maximum current through first amplifier. (1) IAMP2 = 0 mA (2) IAMP2 = 10 mA (3) IAMP2 = 20 mA (4) IAMP2 = 30 mA Fig 31. Total current as a function of ambient temperature; typical values Fig 32. Total current as a function of ambient temperature; typical values BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 23 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 25 PL(1dB) (dBm) 23 aaa-000696 40 relative phase (deg) 30 aaa-000697 (8) 21 20 (7) 19 (1) (2) (3) (4) (5) (6) (7) 10 (6) (5) (4) (1) (2) (3) 17 0 15 0 16 32 48 64 attenuation (decimal) -10 0 1 2 3 4 f (GHz) 5 VSUP = 5 V; Tamb = 85 C; maximum current setting; attenuation states 0, 7, 15, 23, 31, 39, 47, 55 and 63 are depicted. (1) f = 0.7 GHz (2) f = 1.4 GHz (3) f = 1.7 GHz (4) f = 2.2 GHz (5) f = 2.8 GHz (6) f = 2.8 GHz and Csh used (7) f = 3.8 GHz VSUP = 5 V; Tamb = 25 C; maximum current setting. (1) attenuation = 0x00 (minimum) (2) attenuation = 0x01 (3) attenuation = 0x02 (4) attenuation = 0x04 (5) attenuation = 0x08 (6) attenuation = 0x10 (7) attenuation = 0x20 (8) attenuation = 0x3F (maximum) Fig 33. Output power at 1 dB gain compression as a function of attenuation state; typical values Fig 34. Relative phase as a function of frequency; typical values BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 24 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 35 NF (dB) 25 aaa-000698 10 NF (dB) 8 aaa-000699 10 15 +7 0% xα 6 (1) (2) (3) (4) (5) (6) (7) 4 (1) (2) (3) 5 2 -5 0 16 32 48 64 attenuation (decimal) 0 0 1 2 3 4 f (GHz) 5 VSUP = 5 V; Tamb = 25 C; maximum current setting. (1) f = 0.7 GHz (2) f = 1.4 GHz (3) f = 1.7 GHz (4) f = 2.2 GHz (5) f = 2.8 GHz (6) f = 2.8 GHz and Csh used (7) f = 3.8 GHz VSUP = 5 V; maximum gain and maximum current setting. (1) Tamb = 40 C (2) Tamb = +25 C (3) Tamb = +85 C Fig 35. Noise figure as a function of attenuation state; typical values Fig 36. Noise figure as a function of frequency; typical values BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 25 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 12. Package outline HVQFN32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 5 x 5 x 0.85 mm SOT617-3 D B A terminal 1 index area A E A1 detail X C e1 e 9 L 8 17 e 1/2 e b 16 v w CAB C y1 C y Eh 1/2 e e2 1 terminal 1 index area 32 Dh 0 Dimensions Unit(1) mm A(1) A1 b c 0.2 4.9 3.45 4.9 3.45 D(1) 5.1 Dh 3.75 E(1) 5.1 Eh 3.75 25 24 X 2.5 scale e 0.5 e1 3.5 e2 3.5 0.3 L 0.5 5 mm v 0.1 w y y1 0.1 max 0.05 0.30 nom 0.85 min 0.00 0.18 0.05 0.05 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. Outline version SOT617-3 References IEC JEDEC MO-220 JEITA European projection sot617-3_po Issue date 11-06-14 11-06-21 Fig 37. Package outline SOT617-3 (HVQFN32) BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 26 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 13. Packing information The BGA7210 will be delivered in reel pack SMD 7”, 1500 pieces per reel. aaa-000870 Fig 38. Carrier tape 14. Abbreviations Table 15. Acronym CDM ESD DSA HBM IF MMIC POR RF SPI USB WiMAX Abbreviations Description Charged Device Model ElectroStatic Discharge Digital Step Attenuator Human Body Model Intermediate Frequency Monolithic Microwave Integrated Circuit Power-On Reset Radio Frequency Serial Peripheral Interface Universal Serial Bus Worldwide Interoperability for Microwave Access 15. Revision history Table 16. Revision history Release date 20120104 Data sheet status Product data sheet Preliminary data sheet Change notice Supersedes BGA7210 v.1 Document ID BGA7210 v.2 Modifications BGA7210 v.1 • Preliminary data sheet changed to Product data sheet 20111213 BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 27 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 16. Legal information 16.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. © NXP B.V. 2012. All rights reserved. 16.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. BGA7210 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 2 — 4 January 2012 28 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com BGA7210 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 4 January 2012 29 of 30 NXP Semiconductors BGA7210 700 MHz to 3800 MHz high linearity variable gain amplifier 18. Contents 1 1.1 1.2 1.3 1.4 2 2.1 2.2 3 4 5 6 7 8 9 9.1 9.2 9.3 10 11 11.1 11.2 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Thermal characteristics . . . . . . . . . . . . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Serial Peripheral Interface . . . . . . . . . . . . . . . . 8 Command word format . . . . . . . . . . . . . . . . . . . 8 Setting current and attenuation . . . . . . . . . . . . 8 SPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Power-up and power save. . . . . . . . . . . . . . . . 10 Application information. . . . . . . . . . . . . . . . . . 11 Application board . . . . . . . . . . . . . . . . . . . . . . 11 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 26 Packing information . . . . . . . . . . . . . . . . . . . . 27 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 27 Legal information. . . . . . . . . . . . . . . . . . . . . . . 28 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 28 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Contact information. . . . . . . . . . . . . . . . . . . . . 29 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2012. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 4 January 2012 Document identifier: BGA7210