BSH201

Philips Semiconductors Product specification P-channel enhancement mode MOS transistor FEATURES • Low threshold voltage • Fast switching • Logic level compatible • Subminiature surface mount package BSH201 SYMBOL s QUICK REFERENCE DATA VDS = -60 V ID = -0.3 A RDS(ON) ≤ 2.5 Ω (VGS = -10 V) d g GENERAL DESCRIPTION P-channel, enhancement mode, logic level, field-effect power transistor. This device has low threshold voltage and extremely fast switching making it ideal for battery powered applications and high speed digital interfacing. The BSH201 is supplied in the SOT23 subminiature surface mounting package. PINNING PIN 1 2 3 gate source drain DESCRIPTION SOT23 3 Top view 1 2 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR VGS ID IDM Ptot Tstg, Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage & operating temperature CONDITIONS RGS = 20 kΩ Ta = 25 ˚C Ta = 100 ˚C Ta = 25 ˚C Ta = 25 ˚C Ta = 100 ˚C MIN. - 55 MAX. -60 -60 ± 20 -0.3 -0.19 -1.2 0.417 0.17 150 UNIT V V V A A A W W ˚C THERMAL RESISTANCES SYMBOL Rth j-a PARAMETER Thermal resistance junction to ambient CONDITIONS FR4 board, minimum footprint TYP. 300 MAX. UNIT K/W August 1998 1 Rev 1.000 Philips Semiconductors Product specification P-channel enhancement mode MOS transistor ELECTRICAL CHARACTERISTICS Tj= 25˚C unless otherwise specified SYMBOL PARAMETER V(BR)DSS VGS(TO) RDS(ON) gfs IGSS IDSS Qg(tot) Qgs Qgd td on tr td off tf Ciss Coss Crss Drain-source breakdown voltage Gate threshold voltage Drain-source on-state resistance CONDITIONS VGS = 0 V; ID = -10 µA VDS = VGS; ID = -1 mA Tj = 150˚C VGS = -10 V; ID = -160 mA VGS = -4.5 V; ID = -80 mA VGS = -10 V; ID = -160 mA; Tj = 150˚C Forward transconductance VDS = -48 V; ID = -160 mA Gate source leakage current VGS = ±20 V; VDS = 0 V Zero gate voltage drain VDS = -48 V; VGS = 0 V; current Tj = 150˚C Total gate charge Gate-source charge Gate-drain (Miller) charge Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Input capacitance Output capacitance Feedback capacitance ID = -0.5 A; VDD = -10 V; VGS = -10 V MIN. -60 -1 -0.4 0.1 - BSH201 TYP. MAX. UNIT -1.9 2.1 2.7 3.6 0.35 ±10 -50 -1.3 3 0.5 0.4 2 4.5 45 20 70 15 5 2.5 3.75 4.25 ±100 -100 -10 V V V Ω Ω Ω S nA nA µA nC nC nC ns ns ns ns pF pF pF VDD = -10 V; ID = -0.5 A; VGS = -10 V; RG = 6 Ω Resistive load VGS = 0 V; VDS = -48 V; f = 1 MHz REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tj = 25˚C unless otherwise specified SYMBOL IDR IDRM VSD trr Qrr PARAMETER Continuous reverse drain current Pulsed reverse drain current Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS Ta = 25 ˚C IF = -0.38 A; VGS = 0 V IF = -0.25 A; -dIF/dt = 100 A/µs; VGS = 0 V; VR = -48 V MIN. TYP. -0.97 38 58 MAX. -0.3 -1.2 -1.3 UNIT A A V ns nC August 1998 2 Rev 1.000 Philips Semiconductors Product specification P-channel enhancement mode MOS transistor BSH201 Normalised Power Dissipation, PD (%) 120 100 100 80 60 40 1 20 10 1000 Peak Pulsed Drain Current, IDM (A) D = 0.5 0.2 0.1 0.05 0.02 single pulse P D tp D = tp/T T 0 0 25 50 75 100 125 150 Ambient Temperature, Ta (C) 0.1 1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01 Pulse width, tp (s) Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Ta) Fig.4. Transient thermal impedance. Zth j-a = f(t); parameter D = tp/T Normalised Drain Current, ID (%) 120 100 80 Drain current, ID (A) -1 Tj = 25 C -0.8 -0.6 BSH201 VGS = -10 V -4.5 V 60 40 20 0 0 25 50 75 100 125 150 0 0 -0.5 -1 -1.5 Drain-Source Voltage, VDS (V) -2 Ambient Temperature, Ta (C) -0.4 -0.2 -2.5 V -2.3 V -2.1 V -1.9 V -1.7 V -1.5 V Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Ta); conditions: VGS ≤ -10 V Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS); parameter VGS Drain-Source On Resistance, RDS(on) (Ohms) 10 Peak Pulsed Drain Current, IDM (A) RDS(on) = VDS/ ID 1 BSH201 10 9 tp = 10us 100 us 1 ms 0.1 d.c. 10 ms 100 ms 0.01 8 7 6 5 4 3 2 1 0.001 1 10 100 Drain-Source Voltage, VDS (V) 1000 0 0 -0.1 -0.2 -0.3 -0.4 Drain Current, ID (A) PHP222 -0.5 -4.5 V VGS = -10 V -1.5 V -1.7 V -1.9 V -2.1 V -2.3 V -2.5 V Tj = 25 C Fig.3. Safe operating area. Ta = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp Fig.6. Typical on-state resistance, Tj = 25 ˚C. RDS(ON) = f(ID); parameter VGS August 1998 3 Rev 1.000 Philips Semiconductors Product specification P-channel enhancement mode MOS transistor BSH201 Drain Current, ID (A) -1 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0 0 -0.5 -1 -1.5 -2 -2.5 -3 -3.5 -4 Gate-Source Voltage, VGS (V) -4.5 VDS > ID X RDS(on) Tj = 25 C 150 C BSH201 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 Threshold Voltage, VGS(to), (V) typical minimum 0 -5 -5.5 25 50 75 100 125 150 Junction Temperature, Tj (C) Fig.7. Typical transfer characteristics. ID = f(VGS) Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS Transconductance, gfs (S) 0.7 VDS > ID X RDS(on) 0.6 0.5 Tj = 25 C BSH201 1E-01 150 C 1E-02 1E-03 Drain Current, ID (A) VDS = -5 V Tj = 25 C BSH201 0.4 0.3 0.2 0.1 0 0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 Drain Current, ID (A) 1E-07 -2.5 -2 -1.5 Gate-Source Voltage, VGS (V) -1 1E-04 1E-05 1E-06 Fig.8. Typical transconductance, Tj = 25 ˚C. gfs = f(ID) Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C Normalised Drain-Source On Resistance 2 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 0 RDS(ON) @ Tj RDS(ON) @ 25C VGS = -10 V -4.5 V Capacitances, Ciss, Coss, Crss (pF) 1000 BSH201 100 Ciss Coss 10 Crss 25 50 75 100 125 150 Junction Temperature, Tj (C) 1 -0.1 -1.0 -10.0 Drain-Source Voltage, VDS (V) -100.0 Fig.9. Normalised drain-source on-state resistance. RDS(ON)/RDS(ON)25 ˚C = f(Tj) Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz August 1998 4 Rev 1.000 Philips Semiconductors Product specification P-channel enhancement mode MOS transistor BSH201 Gate-source voltage, VGS (V) -14 -12 -10 -8 -6 -4 -2 0 0 1 2 3 Gate charge, (nC) 4 VDD = 10 V RD = 20 Ohms Tj = 25 C BSH201 3.5 3 2.5 2 Source-Drain Diode Current, IF (A) BSH201 150 C 1.5 1 0.5 0 0 5 0.5 1 1.5 2 Drain-Source Voltage, VSDS (V) Tj = 25 C Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG) Fig.14. Typical reverse diode current. IF = f(VSDS); conditions: VGS = 0 V; parameter Tj August 1998 5 Rev 1.000 Philips Semiconductors Product specification P-channel enhancement mode MOS transistor MECHANICAL DATA Plastic surface mounted package; 3 leads SOT23 BSH201 D B E A X HE vMA 3 Q A A1 1 e1 e bp 2 wMB detail X Lp c 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 max. 0.1 bp 0.48 0.38 c 0.15 0.09 D 3.0 2.8 E 1.4 1.2 e 1.9 e1 0.95 HE 2.5 2.1 Lp 0.45 0.15 Q 0.55 0.45 v 0.2 w 0.1 OUTLINE VERSION SOT23 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 97-02-28 Fig.15. SOT23 surface mounting package. Notes 1. This product is supplied in anti-static packaging. The gate-source input must be protected against static discharge during transport or handling. 2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18. 3. Epoxy meets UL94 V0 at 1/8". August 1998 6 Rev 1.000 Philips Semiconductors Product specification P-channel enhancement mode MOS transistor DEFINITIONS Data sheet status Objective specification Product specification Limiting values BSH201 This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. © Philips Electronics N.V. 1998 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. August 1998 7 Rev 1.000