BUK482-200A

Philips Semiconductors Product specification PowerMOS transistor BUK482-200A GENERAL DESCRIPTION N-channel enhancement mode field-effect power transistor in a plastic envelope suitable for surface mounting featuring high avalanche energy capability, stable blocking voltage, fast switching and high thermal cycling performance. Intended for use in Switched Mode Power Supplies (SMPS) and general purpose switching applications. QUICK REFERENCE DATA SYMBOL VDS ID Ptot RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Drain-source on-state resistance MAX. 200 2.0 8.3 0.9 UNIT V A W Ω PINNING - SOT223 PIN 1 2 3 4 gate drain source drain (tab) DESCRIPTION PIN CONFIGURATION 4 SYMBOL d g 1 2 3 s LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDS VDGR ±VGS ID IDM IDR IDRM Ptot Tstg Tj Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (pulse peak value) Source-drain diode current (DC) Source-drain diode current (pulse peak value) Total power dissipation Storage temperature Junction Temperature CONDITIONS RGS = 20 kΩ Tsp = 25 ˚C Tsp = 100 ˚C Tsp = 25 ˚C Tsp = 25 ˚C Tsp = 25 ˚C Tsp = 25 ˚C MIN. -55 MAX. 200 200 30 2.0 1.3 8.0 2.0 8.0 8.3 150 150 UNIT V V V A A A A A W ˚C ˚C AVALANCHE LIMITING VALUE SYMBOL PARAMETER WDSS CONDITIONS MIN. MAX. UNIT Drain-source non-repetitive ID = 2 A ; VDD ≤ 50 V ; VGS = 10 V ; unclamped inductive turn-off RGS = 50 Ω energy Tj = 25˚C prior to surge Tj = 100˚C prior to surge - 50 8 mJ mJ January 1998 1 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor BUK482-200A THERMAL RESISTANCES SYMBOL Rth j-sp Rth j-a PARAMETER Thermal resistance junction to solder point Thermal resistance junction to ambient CONDITIONS MIN. pcb mounted; minimum footprint pcb mounted; pad area as in fig:17 TYP. 156 70 MAX. 15 UNIT K/W K/W K/W STATIC CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IGSS RDS(ON) VSD PARAMETER Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Gate source leakage current Drain-source on-state resistance Source-drain diode forward voltage CONDITIONS VGS = 0 V; ID = 0.25 mA VDS = VGS; ID = 0.25 mA VDS = 200 V; VGS = 0 V; Tj = 25 ˚C VDS = 200 V; VGS = 0 V; Tj = 125 ˚C VGS = ±30 V; VDS = 0 V VGS = 10 V; ID = 2 A IF = 2 A ;VGS = 0 V MIN. 200 2.0 TYP. 3.0 0.1 0.1 10 0.53 0.87 MAX. 4.0 10 1.0 100 0.9 1.0 UNIT V V µA mA nA Ω V DYNAMIC CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL gfs Ciss Coss Crss Qg(tot) Qgs Qgd td on tr td off tf trr Qrr PARAMETER Forward transconductance Input capacitance Output capacitance Feedback capacitance Total gate charge Gate to source charge Gate to drain (Miller) charge Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Source-drain diode reverse recovery time Source-drain diode reverse recovery charge CONDITIONS VDS = 25 V; ID = 2 A VGS = 0 V; VDS = 25 V; f = 1 MHz MIN. 0.5 TYP. 2.6 305 60 24 13 2 5 10 30 30 20 88 370 MAX. 400 100 50 15 45 40 30 UNIT S pF pF pF nC nC nC ns ns ns ns ns nC VGS = 10 V; ID = 2 A; VDS = 160 V VDD = 30 V; ID = 2.75 A; VGS = 10 V; RGS = 50 Ω; RGEN = 50 Ω IF = 2 A; -dIF/dt = 100 A/µs; VGS = 0 V; VR = 100 V January 1998 2 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor BUK482-200A 120 110 100 90 80 70 60 50 40 30 20 10 0 PD% Normalised Power Derating 10 ID / A ) ON = V / DS ID BUK482-200A tp = 10 us 100 us 1 ms 10 ms RD S( 1 0.1 100 ms DC 0 20 40 60 80 Tamb / C 100 120 140 0.01 1 10 VDS / V 100 1000 Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Tamb) ID% Normalised Current Derating Fig.4. Safe operating area. Tamb = 25 ˚C. ID & IDM = f(VDS); IDM single pulse; parameter tp BUK482-200A VGS = 20 V 10 8 6.5 6 6 4 5.5 5 4.5 4 0 2 4 VDS / V 6 8 10 120 110 100 90 80 70 60 50 40 30 20 10 0 10 ID / A 2 0 20 40 60 80 Tamb / C 100 120 140 0 Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Tamb); conditions: VGS ≥ 10 V Zth(j-sp) K/W BUK482-200A Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS); parameter VGS BUK482-200A 100 2 RDS(ON) / Ohms 10 1.5 VGS = 5V 5.5 V 6V 6.5 V 10 V 20 V 0.5 T t 1 P D tp D= tp T 1 0.1 0.01 1us 10us 100us 1ms 10ms tp / sec 100ms 1s 10s 0 0 1 2 3 4 ID / A 5 6 7 8 Fig.3. Transient thermal impedance. Zth j-sp = f(t); parameter D = tp/T Fig.6. Typical on-state resistance, Tj = 25 ˚C. RDS(ON) = f(ID); parameter VGS January 1998 3 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor BUK482-200A 8 7 6 ID / A BUK482-200A 4 VGS(TO) / V max. 3 typ. 5 4 3 2 1 0 0 min. 2 Tj = 150 C 25 C 1 0 2 4 VGS / V 6 8 10 -60 -40 -20 0 20 40 60 Tj / C 80 100 120 140 Fig.7. Typical transfer characteristics. ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj BUK482-200A Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS ID / A SUB-THRESHOLD CONDUCTION 5 gfs / S 1E-01 4 Tj = 25 C 3 1E-02 1E-03 2% typ 98 % 150 C 1E-04 2 1 1E-05 0 1E-06 0 1 2 3 4 ID / A 5 6 7 8 0 1 2 VGS / V 3 4 Fig.8. Typical transconductance, Tj = 25 ˚C. gfs = f(ID); conditions: VDS = 25 V a Normalised RDS(ON) = f(Tj) Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS BUK482-200A 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 1000 C / pF Ciss 100 Coss Crss 10 -60 -40 -20 0 20 40 60 Tj / C 80 100 120 140 1 0 50 100 VDS / V 150 200 Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 2 A; VGS = 10 V Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz January 1998 4 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor BUK482-200A 15 VGS / V BUK482-200A VDS = 40 V 160 V 120 110 100 90 80 70 60 50 WDSS% Normalised Avalanche Energy 10 5 40 30 20 10 0 0 5 10 Qg / nC 15 20 0 20 40 60 80 100 Tamb/ C 120 140 Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); conditions: ID = 2 A; parameter VDS BUK482-200A Fig.15. Normalised avalanche energy rating. WDSS% = f(Tamb); conditions: ID = 2 A 8 7 IF / A + L VDS VDD 6 5 4 Tj = 150 C 3 2 1 0 0 0.5 1 1.5 25 C VGS 0 RGS T.U.T. -ID/100 R 01 shunt VSDS / V Fig.14. Typical reverse diode current. IF = f(VSDS); conditions: VGS = 0 V; parameter Tj Fig.16. Avalanche energy test circuit. 2 WDSS = 0.5 ⋅ LID ⋅ BVDSS /(BVDSS − VDD ) January 1998 5 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor BUK482-200A PRINTED CIRCUIT BOARD Dimensions in mm. 36 18 60 9 4.6 4.5 10 7 15 50 Fig.17. PCB for thermal resistance and power rating for SOT223. PCB: FR4 epoxy glass (1.6 mm thick), copper laminate (35 µm thick). January 1998 6 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor BUK482-200A MECHANICAL DATA Dimensions in mm Net Mass: 0.11 g 0.32 0.24 6.7 6.3 3.1 2.9 B 0.2 M A 4 A 0.10 0.02 3.7 3.3 13 7.3 6.7 16 max 1 10 max 1.8 max 1.05 0.85 4.6 2.3 2 0.80 0.60 3 0.1 M (4x) B Fig.18. SOT223 surface mounting package. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to surface mounting instructions for SOT223 envelope. 3. Epoxy meets UL94 V0 at 1/8". January 1998 7 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor BUK482-200A DEFINITIONS Data sheet status Objective specification Product specification Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. © Philips Electronics N.V. 1998 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. January 1998 8 Rev 1.000