Philips Semiconductors
Product specification
TrenchMOS™ transistor Logic level FET
GENERAL DESCRIPTION
N-channel enhancement mode logic level field-effect power transistor in a plastic envelope using ’trench’ technology. The device features very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV. It is intended for use in automotive and general purpose switching applications.
BUK9514-55
QUICK REFERENCE DATA
SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance VGS = 5 V MAX. 55 68 142 175 14 UNIT V A W ˚C mΩ
PINNING - TO220AB
PIN 1 2 3 tab gate drain source drain DESCRIPTION
PIN CONFIGURATION
tab
SYMBOL
d
g s
1 23
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR ±VGS ID ID IDM Ptot Tstg, Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage & operating temperature CONDITIONS RGS = 20 kΩ Tmb = 25 ˚C Tmb = 100 ˚C Tmb = 25 ˚C Tmb = 25 ˚C MIN. - 55 MAX. 55 55 10 68 48 240 142 175 UNIT V V V A A A W ˚C
ESD LIMITING VALUE
SYMBOL VC PARAMETER Electrostatic discharge capacitor voltage CONDITIONS Human body model (100 pF, 1.5 kΩ) MIN. MAX. 2 UNIT kV
THERMAL RESISTANCES
SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS in free air TYP. 60 MAX. 1.05 UNIT K/W K/W
April 1998
1
Rev 1.000
Philips Semiconductors
Product specification
TrenchMOS™ transistor Logic level FET
STATIC CHARACTERISTICS
Tj= 25˚C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IGSS ±V(BR)GSS RDS(ON) PARAMETER Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Gate source leakage current Gate-source breakdown voltage Drain-source on-state resistance CONDITIONS VGS = 0 V; ID = 0.25 mA; Tj = -55˚C VDS = VGS; ID = 1 mA Tj = 175˚C Tj = -55˚C VDS = 55 V; VGS = 0 V; VGS = ±5 V; VDS = 0 V IG = ±1 mA; VGS = 5 V; ID = 25 A Tj = 175˚C Tj = 175˚C Tj = 175˚C MIN. 55 50 1.0 0.5 10 TYP. 1.5 0.05 0.02 12 -
BUK9514-55
MAX. 2.0 2.3 10 500 1 10 14 30
UNIT V V V V V µA uA µA µA V mΩ mΩ
DYNAMIC CHARACTERISTICS
Tmb = 25˚C unless otherwise specified SYMBOL gfs Ciss Coss Crss td on tr td off tf Ld Ld Ls PARAMETER Forward transconductance Input capacitance Output capacitance Feedback capacitance Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal drain inductance Internal source inductance CONDITIONS VDS = 25 V; ID = 25 A VGS = 0 V; VDS = 25 V; f = 1 MHz MIN. 30 TYP. 65 2900 500 240 35 95 130 60 3.5 4.5 7.5 MAX. 3800 600 330 50 145 180 80 UNIT S pF pF pF ns ns ns ns nH nH nH
VDD = 30 V; ID = 25 A; VGS = 5 V; RG = 10 Ω
Measured from contact screw on tab to centre of die Measured from drain lead 6 mm from package to centre of die Measured from source lead 6 mm from package to source bond pad
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25˚C unless otherwise specified SYMBOL IDR IDRM VSD trr Qrr PARAMETER Continuous reverse drain current Pulsed reverse drain current Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS MIN. IF = 25 A; VGS = 0 V IF = 65 A; VGS = 0 V IF = 65 A; -dIF/dt = 100 A/µs; VGS = -10 V; VR = 30 V TYP. 0.95 1.0 57 0.14 MAX. 68 240 1.2 UNIT A A V V ns µC
April 1998
2
Rev 1.000
Philips Semiconductors
Product specification
TrenchMOS™ transistor Logic level FET
AVALANCHE LIMITING VALUE
SYMBOL WDSS PARAMETER Drain-source non-repetitive unclamped inductive turn-off energy CONDITIONS ID = 65 A; VDD ≤ 25 V; VGS = 5 V; RGS = 50 Ω; Tmb = 25 ˚C MIN. TYP. -
BUK9514-55
MAX. 200
UNIT mJ
120 110 100 90 80 70 60 50 40 30 20 10 0
PD%
Normalised Power Derating
SOAX514
1000
ID / A
RDS(ON) = VDS/ID 100
tp = 1 us 10 us 100 us DC 1 ms 10 ms 100 ms
10
0
20
40
60
80 100 Tmb / C
120
140
160
180
1
1
10 VDS / V
55
100
Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Tmb)
Normalised Current Derating
Fig.3. Safe operating area. Tmb = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp
120 110 100 90 80 70 60 50 40 30 20 10 0
ID%
1E+01
Zth / (K/W)
BUKX514-55
1E+00 0.5 1E-01 0.2 0.1 0.05 0.02 1E-02 0 T t P D tp D=
tp T
0
20
40
60
80 100 Tmb / C
120
140
160
180
1E-03 1E-07
1E-05
1E-03 t/s
1E-01
1E+01
Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 5 V
Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T
April 1998
3
Rev 1.000
Philips Semiconductors
Product specification
TrenchMOS™ transistor Logic level FET
BUK9514-55
100 ID/A 80
10 5
4
70
VGS/V = 3.8 3.6
gfs/S 60 50
60
3.4
40
3.2
40
30
3.0 2.8
20 10 0
20 2.6 2.4 2.2 0 2 4 VDS/V 6 8 10
0
0
20
40
ID/A
60
80
100
Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS); parameter VGS
RDS(ON)/mOhm
Fig.8. Typical transconductance, Tj = 25 ˚C. gfs = f(ID); conditions: VDS = 25 V
BUK959-60
20
2.5
VGS/V = 3.6 4
a
Rds(on) normlised to 25degC
18
4.2
16
2
4.4 4.6 5
1.5
14
1
12
10
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
85
90
95 100
0.5 -100
-50
0
ID/A
50 Tmb / degC
100
150
200
Fig.6. Typical on-state resistance, Tj = 25 ˚C. RDS(ON) = f(ID); parameter VGS
100 ID/A
Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 25 A; VGS = 5 V
VGS(TO) / V max. BUK959-60
2.5
80
2 typ.
60
1.5 min.
40
1
20
0.5
Tj/C = 175 25
0
0
1
2
VGS/V 3
4
5
0 -100
-50
0
50 Tj / C
100
150
200
Fig.7. Typical transfer characteristics. ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj
Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
April 1998
4
Rev 1.000
Philips Semiconductors
Product specification
TrenchMOS™ transistor Logic level FET
BUK9514-55
1E-01
Sub-Threshold Conduction
100 IF/A 80
1E-02 2% typ 98%
60
1E-03
40
1E-04
20
Tj/C =
175
25
1E-05
0
1E-05
0
0.2
0.4
0
0.5
1
1.5
2
2.5
3
0.6 0.8 VSDS/V
1
1.2
1.4
Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
6
Fig.14. Typical reverse diode current. IF = f(VSDS); conditions: VGS = 0 V; parameter Tj
WDSS%
120 110 100 90 80 70 60 50 40 30 20 10
Coss Crss 0.1 1 VDS/V 10 100
5
Thousands pF
4
3
Ciss
2
1
0 20 40 60 80 100 120 Tmb / C 140 160 180
0 0.01
Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
6 VGS/V 5 VDS = 14V 4 VDS = 44V
Fig.15. Normalised avalanche energy rating. WDSS% = f(Tmb); conditions: ID = 75 A
+
L VDS VGS 0 RGS T.U.T. R 01 shunt
VDD
3
-ID/100
2
1
0
0
10
20
QG/nC 30
40
50
Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); conditions: ID = 50 A; parameter VDS
Fig.16. Avalanche energy test circuit. 2 WDSS = 0.5 ⋅ LID ⋅ BVDSS /(BVDSS − VDD )
April 1998
5
Rev 1.000
Philips Semiconductors
Product specification
TrenchMOS™ transistor Logic level FET
BUK9514-55
+
RD VDS VGS 0 RG T.U.T.
VDD
-
Fig.17. Switching test circuit.
April 1998
6
Rev 1.000
Philips Semiconductors
Product specification
TrenchMOS™ transistor Logic level FET
MECHANICAL DATA
Dimensions in mm Net Mass: 2 g
BUK9514-55
4,5 max 10,3 max
1,3
3,7 2,8
5,9 min
15,8 max
3,0 max not tinned
3,0
13,5 min
1,3 max 1 2 3 (2x)
2,54 2,54
0,9 max (3x)
0,6 2,4
Fig.18. SOT78 (TO220AB); pin 2 connected to mounting base.
Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for SOT78 (TO220) envelopes. 3. Epoxy meets UL94 V0 at 1/8".
April 1998
7
Rev 1.000
Philips Semiconductors
Product specification
TrenchMOS™ transistor Logic level FET
DEFINITIONS
Data sheet status Objective specification Product specification Limiting values
BUK9514-55
This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. © Philips Electronics N.V. 1998 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
April 1998
8
Rev 1.000
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