HEF40194BT

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF40194B MSI 4-bit bidirectional universal shift register Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification 4-bit bidirectional universal shift register DESCRIPTION The HEF40194B is a 4-bit bidirectional shift register with two mode control inputs (S0 and S1), a clock input (CP), a serial data shift left input (DSL), a serial data shift right input (DSR), four parallel data inputs (P0 to P3), an overriding asynchronous master reset input (MR), and four buffered parallel outputs (O0 to O3). When LOW, MR resets all stages and forces O0 to O3 LOW, overriding all other input conditions. When MR is HIGH, the operation mode is controlled by S0 and S1 as shown in the function table. HEF40194B MSI Serial and parallel operation are edge-triggered on the LOW to HIGH transition of CP. The inputs at which the data are to be entered and S0, S1 must be stable for a set-up time before the LOW to HIGH transition of CP. Fig.2 Pinning diagram. HEF40194BP(N): 16-lead DIL; plastic (SOT38-1) HEF40194BD(F): HEF40194BT(D): 16-lead DIL; ceramic (cerdip) (SOT74) Fig.1 Functional diagram. 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America PINNING S0, S1 P0 to P3 DSR DSL CP MR O0 to O3 mode control inputs parallel data inputs serial data shift right input serial data shift left input clock input (LOW to HIGH edge-triggered) master reset input (active LOW) buffered parallel outputs FAMILY DATA, IDD LIMITS category MSI See Family Specifications January 1995 2 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... January 1995 3 Fig.3 Logic diagram. Philips Semiconductors 4-bit bidirectional universal shift register HEF40194B MSI Product specification Philips Semiconductors Product specification 4-bit bidirectional universal shift register FUNCTION TABLE INPUTS (MR = HIGH) OPERATING MODE hold shift left shift right parallel load Notes 1. H = HIGH state (the more positive voltage) 2. L = LOW state (the less positive voltage) 3. X = state is immaterial 4. tn + 1 = state after next LOW to HIGH transition of CP AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; input transition times ≤ 20 ns VDD V Dynamic power dissipation per package (P) 5 10 15 TYPICAL FORMULA FOR P (µW) 1 500 fi + ∑ (foCL) × VDD2 6 900 fi + ∑ (foCL) × VDD 2 HEF40194B MSI OUTPUTS AT Tn + 1 P0 TO P3 X X X X X L H O0 O0 O1 O1 L H L H O1 O1 O2 O2 O0 O0 L H O2 O2 O3 O3 O1 O1 L H O3 O3 L H O2 O2 L H S1 L H H L L H H S0 L L L H H H H DSR X X X L H X X DSL X L H X X X X where fi = input freq. (MHz) fo = output freq. (MHz) CL = load cap. (pF) ∑ (foCL) = sum of outputs VDD = supply voltage (V) 18 900 fi + ∑ (foCL) × VDD2 January 1995 4 Philips Semiconductors Product specification 4-bit bidirectional universal shift register AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns VDD V Propagation delays CP → On HIGH to LOW 5 10 15 5 LOW to HIGH MR → On HIGH to LOW Output transition times HIGH to LOW 10 15 5 10 15 5 10 15 5 LOW to HIGH 10 15 tTLH tTHL tPHL tPLH tPHL 100 40 30 80 35 25 85 40 30 60 30 20 60 30 20 205 85 60 165 70 55 175 80 60 120 60 40 120 60 40 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns SYMBOL MIN. TYP. MAX. HEF40194B MSI TYPICAL EXTRAPOLATION FORMULA 73 ns + (0,55 ns/pF) CL 29 ns + (0,23 ns/pF) CL 22 ns + (0,16 ns/pF) CL 53 ns + (0,55 ns/pF) CL 24 ns + (0,23 ns/pF) CL 17 ns + (0,16 ns/pF) CL 58 ns + (0,55 ns/pF) CL 29 ns + (0,23 ns/pF) CL 22 ns + (0,16 ns/pF) CL 10 ns + (1,0 ns/pF) CL 9 ns + (0,42 ns/pF) CL 6 ns + (0,28 ns/pF) CL 10 ns + (1,0 ns/pF) CL 9 ns + (0,42 ns/pF) CL 6 ns + (0,28 ns/pF) CL January 1995 5 Philips Semiconductors Product specification 4-bit bidirectional universal shift register HEF40194B MSI MAX. ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns MHz MHz MHz see also waveforms Figs 4 and 5 TYPICAL EXTRAPOLATION FORMULA VDD V Set-up times Pn, DSR, DSL → CP 5 10 15 5 Sn → CP Hold times Pn, DSR, DSL → CP 10 15 5 10 15 5 Sn → CP Minimum clock pulse width; LOW Minimum MR pulse width; LOW Recovery time for MR Maximum clock pulse frequency 10 15 5 10 15 5 10 15 5 10 15 5 10 15 SYMBOL MIN. 80 TYP. 40 15 10 70 30 20 −30 −10 −5 −45 −15 −10 25 10 10 40 20 15 10 5 5 12 30 40 tsu 30 20 140 tsu 60 40 10 thold 5 5 25 thold 15 10 50 tWCPL 20 20 80 tWMRL 40 30 30 tRMR 15 15 6 fmax 15 20 January 1995 6 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... January 1995 7 Fig.4 Waveforms showing set-up times, hold times for DSR, DSL and Pn inputs; minimum MR pulse width, MR to output delays and MR to CP recovery time; minimum CP pulse width and CP to output delays. Set-up and hold times are shown as positive values but may be specified as negative values. Philips Semiconductors 4-bit bidirectional universal shift register HEF40194B MSI Product specification Philips Semiconductors Product specification 4-bit bidirectional universal shift register HEF40194B MSI Fig.5 Waveforms showing set-up times and hold times for S0 and S1 inputs. Set-up and hold times are shown as positive values but may be specified as negative values. APPLICATION INFORMATION Some examples of applications for the HEF40194B are: • Arithmetic unit register • Serial/parallel converter. January 1995 8