IRF530N

Philips Semiconductors Product specification N-channel TrenchMOS™ transistor IRF530N FEATURES • ’Trench’ technology • Low on-state resistance • Fast switching • Low thermal resistance SYMBOL d QUICK REFERENCE DATA VDSS = 100 V ID = 17 A g RDS(ON) ≤ 110 mΩ s GENERAL DESCRIPTION N-channel enhancement mode field-effect power transistor in a plastic envelope using ’trench’ technology. Applications:• d.c. to d.c. converters • switched mode power supplies The IRF530N is supplied in the SOT78 (TO220AB) conventional leaded package. PINNING PIN 1 2 3 tab gate drain source drain DESCRIPTION SOT78 (TO220AB) tab drain 123 gate source drain LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDSS VDGR VGS ID IDM PD Tj, Tstg Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current Pulsed drain current Total power dissipation Operating junction and storage temperature CONDITIONS Tj = 25 ˚C to 175˚C Tj = 25 ˚C to 175˚C; RGS = 20 kΩ Tmb = 25 ˚C; VGS = 10 V Tmb = 100 ˚C; VGS = 10 V Tmb = 25 ˚C Tmb = 25 ˚C MIN. - 55 MAX. 100 100 ± 20 17 12 68 79 175 UNIT V V V A A A W ˚C AVALANCHE ENERGY LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER EAS Non-repetitive avalanche energy Peak non-repetitive avalanche current CONDITIONS Unclamped inductive load, IAS = 7.8 A; tp = 300 µs; Tj prior to avalanche = 25˚C; VDD ≤ 25 V; RGS = 50 Ω; VGS = 10 V; refer to fig:14 MIN. MAX. 150 UNIT mJ IAS - 17 A August 1999 1 Rev 1.100 Philips Semiconductors Product specification N-channel TrenchMOS™ transistor IRF530N THERMAL RESISTANCES SYMBOL PARAMETER Rth j-mb Rth j-a Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS MIN. SOT78 package, in free air TYP. MAX. UNIT 60 1.9 K/W K/W ELECTRICAL CHARACTERISTICS Tj= 25˚C unless otherwise specified SYMBOL PARAMETER V(BR)DSS VGS(TO) RDS(ON) gfs IGSS IDSS Qg(tot) Qgs Qgd td on tr td off tf Ld Ld Ls Ciss Coss Crss Drain-source breakdown voltage Gate threshold voltage Drain-source on-state resistance Forward transconductance Gate source leakage current Zero gate voltage drain current Total gate charge Gate-source charge Gate-drain (Miller) charge Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal drain inductance Internal source inductance Input capacitance Output capacitance Feedback capacitance CONDITIONS VGS = 0 V; ID = 0.25 mA; Tj = -55˚C VDS = VGS; ID = 1 mA Tj = 175˚C Tj = -55˚C VGS = 10 V; ID = 9 A Tj = 175˚C VDS = 25 V; ID = 9 A VGS = ± 20 V; VDS = 0 V VDS = 100 V; VGS = 0 V VDS = 80 V; VGS = 0 V; Tj = 175˚C ID = 9 A; VDD = 80 V; VGS = 10 V MIN. 100 89 2 1 6.4 TYP. MAX. UNIT 3 80 11 10 0.05 6 36 18 12 3.5 4.5 7.5 633 103 61 4 6 110 275 100 10 250 40 5.6 19 V V V V V mΩ mΩ S nA µA µA nC nC nC ns ns ns ns nH nH nH pF pF pF VDD = 50 V; RD = 2.7 Ω; VGS = 10 V; RG = 5.6 Ω Resistive load Measured tab to centre of die Measured from drain lead to centre of die (SOT78 package only) Measured from source lead to source bond pad VGS = 0 V; VDS = 25 V; f = 1 MHz REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tj = 25˚C unless otherwise specified SYMBOL PARAMETER IS ISM VSD trr Qrr Continuous source current (body diode) Pulsed source current (body diode) Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS MIN. IF = 17 A; VGS = 0 V IF = 17 A; -dIF/dt = 100 A/µs; VGS = 0 V; VR = 25 V TYP. MAX. UNIT 0.92 55 135 17 68 1.2 A A V ns nC August 1999 2 Rev 1.100 Philips Semiconductors Product specification N-channel TrenchMOS™ transistor IRF530N Normalised Power Derating, PD (%) 100 90 80 70 60 50 40 30 20 10 0 0 25 50 75 100 125 Mounting Base temperature, Tmb (C) 150 175 10 Transient thermal impedance, Zth j-mb (K/W) 1 D = 0.5 0.2 0.1 0.05 0.1 0.02 single pulse P D tp D = tp/T T 1E-04 1E-03 1E-02 1E-01 1E+00 0.01 1E-06 1E-05 Pulse width, tp (s) Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Tmb) Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T Drain Current, ID (A) VGS = 10V Tj = 25 C 8V 6V Normalised Current Derating, ID (%) 100 90 80 70 60 50 40 30 20 10 0 0 25 50 75 100 125 Mounting Base temperature, Tmb (C) 150 175 20 18 16 14 12 10 8 6 4 2 0 0 5.4 V 5.2 V 5V 4.8 V 4.6 V 0.2 0.4 0.6 0.8 1 1.2 1.4 Drain-Source Voltage, VDS (V) 1.6 4.4 V 1.8 2 Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 10 V Peak Pulsed Drain Current, IDM (A) RDS(on) = VDS/ ID tp = 10 us 10 100 us D.C. 1 1 ms 10 ms 100 ms Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS) 100 0.2 0.18 0.16 0.14 0.12 0.1 0.08 0.06 0.04 0.02 Drain-Source On Resistance, RDS(on) (Ohms) 4.8V 4.6V 5V 5.2 V 5.4 V 6V Tj = 25 C 8V VGS = 10V 0.1 1 10 100 Drain-Source Voltage, VDS (V) 1000 0 0 2 4 6 8 10 12 Drain Current, ID (A) 14 16 18 20 Fig.3. Safe operating area. Tmb = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp Fig.6. Typical on-state resistance, Tj = 25 ˚C. RDS(ON) = f(ID) August 1999 3 Rev 1.100 Philips Semiconductors Product specification N-channel TrenchMOS™ transistor IRF530N Drain current, ID (A) 20 18 16 14 12 10 8 6 4 2 0 0 1 2 3 4 5 6 7 8 9 10 Gate-source voltage, VGS (V) 175 C Tj = 25 C VDS > ID X RDS(ON) 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 Threshold Voltage, VGS(TO) (V) maximum typical minimum -60 -40 -20 0 20 40 60 80 100 120 140 160 180 Junction Temperature, Tj (C) Fig.7. Typical transfer characteristics. ID = f(VGS) Transconductance, gfs (S) VDS > ID X RDS(ON) Tj = 25 C Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS Drain current, ID (A) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1.0E-01 1.0E-02 175 C minimum typical 1.0E-04 maximum 1.0E-05 1.0E-03 1.0E-06 0 2 4 6 8 10 12 14 Drain current, ID (A) 16 18 20 0 0.5 1 1.5 2 2.5 3 3.5 Gate-source voltage, VGS (V) 4 4.5 5 Fig.8. Typical transconductance, Tj = 25 ˚C. gfs = f(ID) Normalised On-state Resistance 2.9 2.7 2.5 2.3 2.1 1.9 1.7 1.5 1.3 1.1 0.9 0.7 0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 Junction temperature, Tj (C) Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS 10000 Capacitances, Ciss, Coss, Crss (pF) 1000 Ciss 100 Coss Crss 10 0.1 1 10 Drain-Source Voltage, VDS (V) 100 Fig.9. Normalised drain-source on-state resistance. RDS(ON)/RDS(ON)25 ˚C = f(Tj) Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz August 1999 4 Rev 1.100 Philips Semiconductors Product specification N-channel TrenchMOS™ transistor IRF530N Source-Drain Diode Current, IF (A) 20 18 16 14 12 10 8 6 4 2 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 Source-Drain Voltage, VSDS (V) 175 C Tj = 25 C 10 100 Maximum Avalanche Current, IAS (A) VGS = 0 V 25 C 1 Tj prior to avalanche = 150 C 0.1 0.001 0.01 0.1 Avalanche time, tAV (ms) 1 10 Fig.13. Typical reverse diode current. IF = f(VSDS); conditions: VGS = 0 V; parameter Tj Fig.14. Maximum permissible non-repetitive avalanche current (IAS) versus avalanche time (tAV); unclamped inductive load August 1999 5 Rev 1.100 Philips Semiconductors Product specification N-channel TrenchMOS™ transistor IRF530N MECHANICAL DATA Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220 SOT78 E P A A1 q D1 D L2(1) L1 Q L b1 1 2 3 b c e e 0 5 scale 10 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 4.5 4.1 A1 1.39 1.27 b 0.9 0.7 b1 1.3 1.0 c 0.7 0.4 D 15.8 15.2 D1 6.4 5.9 E 10.3 9.7 e 2.54 L 15.0 13.5 L1 3.30 2.79 L2 max. 3.0 (1) P 3.8 3.6 q 3.0 2.7 Q 2.6 2.2 Note 1. Terminals in this zone are not tinned. OUTLINE VERSION SOT78 REFERENCES IEC JEDEC TO-220 EIAJ EUROPEAN PROJECTION ISSUE DATE 97-06-11 Fig.15. SOT78 (TO220AB); pin 2 connected to mounting base (Net mass:2g) Notes 1. This product is supplied in anti-static packaging. The gate-source input must be protected against static discharge during transport or handling. 2. Refer to mounting instructions for SOT78 (TO220AB) package. 3. Epoxy meets UL94 V0 at 1/8". August 1999 6 Rev 1.100 Philips Semiconductors Product specification N-channel TrenchMOS™ transistor IRF530N DEFINITIONS Data sheet status Objective specification Product specification Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. © Philips Electronics N.V. 1999 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. August 1999 7 Rev 1.100