LVT22V10

INTEGRATED CIRCUITS LVT22V10 3V high speed, universal PLD device Product specification Supersedes data of 1996 Mar 12 IC13 Data Handbook 1998 Feb 10 Philips Semiconductors Philips Semiconductors Product specification 3V high speed, universal PLD device LVT22V10 FEATURES • Fastest 3V PLD • Supports 3/5V mixed systems • Low ground bounce ( VCC Power-up/down 3-State output current8 Output leakage6 current5, 9 VCC = MAX, VIN = 0.0V VCC = MAX, VIN = VCC VCC = MAX, VIN = 5.5V VCC = MAX, VIN = 5.5V VCC = 3V, VI = 0.8V VCC = 3V, VI = 2V VCC = 3.6V VCC = 3.6V VCC = 0V, VI or VO = 0 to 4.5V VO = 5.5V, VCC = 3.0V VCC TCO). TO and τ are device parameters provided by the semiconductor manufacturer (refer to the following table for the LVT22V10 metastability specifications). TO and τ are derived from tests and can be most nearly be defined as follows: τ is a function of the rate at which a latch in a metastable state resolves that condition. TO is a function of the measurement of the propensity of a latch to enter a metastable state. TO is also a normalization constant, which is a very strong function of the normal propagation delay of the device. In this situation the F1 will be twice the data frequency, or 4MHz, because input events consist of both of low and high transitions. Thus, in this case, FC is 33MHz, F1 is 4MHz, τ is 317ps, t’ is 15ns, and TO is 4.27 × 10-3 seconds. Using the above formula the actual MTBF for this situation is 1.26 × 109 seconds or 39 years for the LVT22V10. 5V Logic Driving 3V Logic Since the LVT ICs do not have protection diodes between their inputs and VCC, the inputs of these devices can therefore withstand higher levels than the supply voltage, and they can be directly connected to 5V CMOS logic outputs. For the LVT family, the combination of low power dissipation with the live insertion feature, bus hold and full 5V input/output capability make this logic ideal for 3.3V backplane interfacing. INTERFACING 3 VOLT AND 5 VOLT LOGIC FROM 3V to 5V 5V to 3V LVT Output Output CMOS Rail Totem-Pole Open Drain TO TTL Inputs CMOS inputs LVT Input LVT Input LVT Input METHOD Direct Pull-up Direct Direct Pull-up LVT22V10 METASTABLE HARDENED CHARACTERISTICS Metastable Hardened Characteristics What is metastable hardened? Philips Semiconductors uses the term “metastable hardened” to describe a combination of two characteristic features. The first is a patented Philips circuit that prevents the outputs from glitching, oscillating, or remaining in the linear region under any circumstances, including setup and hold time violations. The second is the flip-flops’ inherent ability of resolving the metastable condition. Philips provides complete data on the LVT22V10’s metastable characteristics With the LVT22V10, any tendency towards internal metastability is resolved by Philips Semiconductors patented circuitry. If a Summary The Philips LVT22V10 has on-chip circuitry that completely eliminates any output glitches, oscillations, or other output anomalies associated with metastable conditions. For outputs that are then used to generate clocks, control signals or other asynchronous data this represents an unparalleled level of reliability in a PLD. In addition, a complete set of metastability data is provided, that allows designers the ability to design robust systems where data is synchronously pipelined. LVT22V10 VALUES FOR τ AND TO VCC 3.0V 3.3V 3.6V 0°C τ 829.00ps 358.00ps 237.00ps TO 1.16E–08 2.36E–04 2.66E–01 τ 691.00ps 317.00ps 230.00ps 25°C TO 1.09E–07 4.27E–03 6.47E–01 τ 429.00ps 329.00ps 250.00ps 75°C TO 2.27E–04 5.75E–03 1.13E+00 1998 Feb 10 14 Philips Semiconductors Product specification 3V high speed, universal PLD device LVT22V10 SWITCHING WAVEFORMS INPUT OR FEEDBACK VT tPD COMBINATORIAL OUTPUT VT CLOCK INPUT OR FEEDBACK VT tS tH VT tCO REGISTERED OUTPUT VT Combinatorial Output Registered Output CLK tS + tCF CLOCK VT LOGIC tS REGISTER tCF Clock to Feedback (fMAX Internal) (See Path at Right) Clock to Feedback INPUT tWH tER CLOCK VT OUTPUT tWL VT tEA VOH – 0.3V VOL + 0.3V VT Clock Width Input to Output Disable/Enable tARW INPUT ASSERTING ASYNCHRONOUS RESET VT tAR REGISTERED OUTPUT VT tARR CLOCK VT REGISTERED OUTPUT CLOCK INPUT ASSERTING SYNCHRONOUS PRESET VT tS tH VT tCO VT tSPR VT Asynchronous Reset Synchronous Preset SP00388 NOTES: 1. VT = 1.5V. 2. Input pulse amplitude 0V to 3.0V. 3. Input rise and fall times 1.5ns max. 1998 Feb 10 15 Philips Semiconductors Product specification 3V high speed, universal PLD device LVT22V10 “AND” ARRAY – (I, B) I, B I, B I, B I, B I, B I, B I, B I, B I, B I, B I, B I, B P, D STATE INACTIVE1 CODE O STATE TRUE P, D CODE H STATE COMPLEMENT P, D CODE L STATE DON’T CARE P, D CODE — SP00008 NOTE: 1. This is the initial state. POWER-UP RESET The power-up reset feature ensures that all flip-flops will be reset to LOW after the device has been powered up. The output state will depend on the programmed pattern. This feature is valuable in simplifying state machine initialization. A timing diagram and parameter table are shown below. Due to the synchronous operation of the power-up reset and the wide range of ways VCC can rise to its steady state, two conditions are required to ensure a valid power-up reset. These conditions are: 1. The VCC rise must be monotonic. 2. Following reset, the clock input must not be driven from LOW to HIGH until all applicable input and feedback setup times are met. VCC POWER 2.7V tPR REGISTERED ACTIVE-LOW OUTPUT tS CLOCK tWL Power-Up Reset Waveform SP00389 LIMITS SYMBOL tPR tS tWL Power-up Reset Time Input or Feedback Setup Time Clock Width LOW PARAMETER MIN MAX 1 See AC Electrical Characteristics UNIT µs 1998 Feb 10 16 Philips Semiconductors Product specification 3V high speed, universal PLD device LVT22V10 DIP24: plastic dual in-line package; 24 leads (300 mil) SOT222-1 1998 Feb 10 17 Philips Semiconductors Product specification 3V high speed, universal PLD device LVT22V10 PLCC28: plastic leaded chip carrer; 28 leads; pedestal SOT261-3 1998 Feb 10 18 Philips Semiconductors Product specification 3V high speed, universal PLD device LVT22V10 SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 1998 Feb 10 19 Philips Semiconductors Product specification 3V high speed, universal PLD device LVT22V10 Data sheet status Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Production [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 © Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Date of release: 02-98 Document order number: 9397 750 03313 Philips Semiconductors 1998 Feb 10 20