N74F40N

Philips Semiconductors FAST Products Product specification Dual 4-input NAND buffer 74F40 TYPE TYPICAL PROPAGATION DELAY 3.5ns TYPICAL SUPPLY CURRENT (TOTAL) 6mA PIN CONFIGURATION D0a D0b NC 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC D1d D1c NC D1b D1a Q1 74F40 ORDERING INFORMATION DESCRIPTION 14-pin plastic DIP 14-pin plastic SO COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F40N N74F40D D0c D0d Q0 GND SF00065 INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS Dna, Dnb, Dnc, Dnd Q0, Q1 Data inputs Data outputs DESCRIPTION 74F (U.L.) HIGH/LOW 1.0/2.0 750/106.7 LOAD VALUE HIGH/LOW 20µA/1.2mA 15mA/64mA NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. LOGIC DIAGRAM D0a D0b D0c D0d 1 2 6 4 5 Q0 FUNCTION TABLE INPUTS Dna L X X X Dnb X L X X Dnc X X L X H Dnd X X X X H OUTPUT Qn H H H H L D1a D1b D1c D1d VCC = Pin 14 GND = Pin 7 NC = Pin 3, 11 9 10 8 12 13 Q1 H H NOTES: 1. H = High voltage level 2. L = Low voltage level 3. X = Don’t care SF00081 LOGIC SYMBOL IEC/IEEE SYMBOL 1 & 6 1 2 4 5 9 10 12 13 2 4 D0a D0b D0c D0d D1a D1b D1c D1d 5 Q0 Q1 9 10 8 12 6 VCC = Pin 14 GND = Pin 7 NC = Pin 3, 11 8 13 SF00082 SF00083 April 11, 1989 1 853–0053 96314 Philips Semiconductors FAST Products Product specification Dual 4-input NAND buffer 74F40 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Current applied to output in Low output state Operating free-air temperature range Storage temperature range PARAMETER RATING –0.5 to +7.0 –0.5 to +7.0 –30 to +5 –0.5 to VCC 128 0 to +70 –65 to +150 UNIT V V mA V mA °C °C RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC VIH VIL IIK IOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current Operating free-air temperature range 0 PARAMETER MIN 4.5 2.0 0.8 –18 –15 64 +70 NOM 5.0 MAX 5.5 V V V mA mA mA °C UNIT DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS1 ±10%VCC ±5%VCC ±10%VCC ±5%VCC ±10%VCC ±5%VCC 0.42 –0.73 LIMITS MIN 2.5 2.7 2.0 2.0 0.55 V 0.55 –1.2 100 20 –0.6 –100 VIN = GND VIN = 4.5V 1.75 11 –225 4.0 17 V µA µA mA mA mA 3.4 V TYP2 MAX UNIT VOH High-level output voltage VCC = MIN, VIL = MAX, VIH = MIN VCC = MIN, VIL = MAX, VIH = MIN IOH = –1mA V IOH = –15mA VOL VIK II IIH IIL IOS ICC Low-level output voltage Input clamp voltage Input current at maximum input voltage High-level input current Low-level input current Short-circuit output current3 Supply current (total) ICCH ICCL IOL = MAX VCC = MIN, II = IIK VCC = MAX, VI = 7.0V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.5V VCC = MAX VCC = MAX NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. April 11, 1989 2 Philips Semiconductors FAST Products Product specification Dual 4-input NAND buffer 74F40 AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITION VCC = +5.0V Tamb = +25°C CL = 50pF, RL = 500Ω MIN tPLH tPHL Propagation delay Dna, Dnb, Dnc, Dnd to Qn Waveform 1 2.0 1.5 TYP 4.0 3.0 MAX 6.0 5.0 VCC = +5.0V ± 10% Tamb = 0°C to +70°C CL = 50pF, RL = 500Ω MIN 1.5 1.0 MAX 7.0 5.5 ns UNIT AC WAVEFORMS Dna, Dnb, Dnc, Dnd VM tPHL VM tPLH Qn VM VM SF00069 Waveform 1. Propagation Delay for Inverting Outputs NOTE: For all waveforms, VM = 1.5V. TEST CIRCUIT AND WAVEFORMS VCC NEGATIVE PULSE VIN PULSE GENERATOR RT D.U.T. VOUT 90% VM 10% tTHL (tf ) CL RL tw VM 10% tTLH (tr ) 0V 90% AMP (V) tTLH (tr ) 90% POSITIVE PULSE VM 10% tw tTHL (tf ) AMP (V) 90% VM 10% 0V Test Circuit for Totem-Pole Outputs DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tTHL 2.5ns SF00006 April 11, 1989 3