NTBA104

NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state Rev. 1 — 6 December 2011 Product data sheet 1. General description The NTBA104 is a 4-bit, dual supply translating transceiver with auto direction sensing, that enables bidirectional voltage level translation. It features two 4-bit input-output ports (An and Bn), one output enable input (OE) and two supply pins (VCC(A) and VCC(B)). VCC(A) can be supplied at any voltage between 1.2 V and 3.6 V and VCC(B) can be supplied at any voltage between 1.65 V and 5.5 V, making the device suitable for translating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins An and OE are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH level at pin OE causes the outputs to assume a high-impedance OFF-state. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits  Wide supply voltage range:  VCC(A): 1.2 V to 3.6 V and VCC(B): 1.65 V to 5.5 V  IOFF circuitry provides partial Power-down mode operation  Inputs accept voltages up to 5.5 V  ESD protection:  HBM JESD22-A114E Class 2 exceeds 2500 V for A port  HBM JESD22-A114E Class 3B exceeds 15000 V for B port  MM JESD22-A115-A exceeds 200 V  CDM JESD22-C101E exceeds 1500 V  Latch-up performance exceeds 100 mA per JESD 78B Class II  Multiple package options  Specified from 40 C to +85 C and 40 C to +125 C NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state 3. Ordering information Table 1. Ordering information Package Temperature range NTBA104BQ 40 C to +125 C Name Description Version SOT762-1 DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5  3  0.85 mm XQFN16 XQFN12 plastic, extremely thin quad flat package; no leads; 16 terminals; body 1.80 x 2.60 x 0.50 mm plastic, extremely thin quad flat package; no leads; 12 terminals; body 1.70 x 2.0 x 0.50 mm Type number NTBA104GU16 40 C to +125 C NTBA104GU12 40 C to +125 C SOT1161-1 SOT1174-1 4. Marking Table 2. Marking codes Marking code BA104 tA4 tA Type number NTBA104BQ NTBA104GU16 NTBA104GU12 5. Functional diagram OE A1 B1 A2 B2 A3 B3 A4 B4 VCC(A) VCC(B) aaa-001614 Fig 1. NTBA104 Logic symbol All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 2 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state 6. Pinning information 6.1 Pinning NTBA104 VCC(A) 2 3 4 5 6 7 GND OE 8 GND(1) 1 terminal 1 index area A1 A2 A3 A4 n.c. 14 VCC(B) 13 B1 12 B2 11 B3 10 B4 9 n.c. aaa-001616 Transparent top view (1) This is not a supply pin, the substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad however if it is soldered the solder land should remain floating or be connected to GND. Fig 2. Pin configuration DHVQFN14 (SOT762-1) NTBA104 16 VCC(A) 13 VCC(B) 15 n.c. 14 n.c. terminal 1 index area NTBA104 12 OE terminal 1 index area A1 1 A2 2 A3 3 A4 4 12 B1 11 B2 10 B3 9 B4 VCC(A) 1 A1 2 A2 3 A3 4 A4 5 11 VCC(B) 10 B1 9 B2 8 B3 7 B4 aaa-001618 GND 6 GND 7 aaa-001617 Transparent top view Transparent top view Fig 3. Pin configuration XQFN16 (SOT1161-1) Fig 4. Pin configuration XQFN12 (SOT1174-1) NTBA104 All information provided in this document is subject to legal disclaimers. GND 6 n.c. 5 OE 8 © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 3 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state 6.2 Pin description Table 3. Symbol VCC(A) n.c. GND OE VCC(B) Pin description Pin SOT762-1 1 6, 9 7 8 14 A1, A2, A3, A4 2, 3, 4, 5 SOT1161-1 16 1, 2, 3, 4 5, 14, 15 6, 7 8 9, 10, 11, 12 13 SOT1174-1 1 2, 3, 4, 5 6 12 7, 8, 9, 10 11 supply voltage A data input or output (referenced to VCC(A)) not connected ground (0 V) output enable input (active LOW; referenced to VCC(A)) data input or output (referenced to VCC(B)) supply voltage B Description B4, B3, B2, B1 10, 11, 12, 13 7. Functional description Table 4. VCC(A) 1.2 V to VCC(B) 1.2 V to VCC(B) GND[2] [1] [2] Function table[1] Input VCC(B) 1.65 V to 5.5 V 1.65 V to 5.5 V GND[2] OE H L X Input/output An Z input or output Z Bn Z output or input Z Supply voltage H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. When either VCC(A) or VCC(B) is at GND level, the device goes into power-down mode. 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC(A) VCC(B) VI VO IIK IOK IO ICC IGND Tstg Parameter supply voltage A supply voltage B input voltage output voltage input clamping current output clamping current output current supply current ground current storage temperature Active mode Power-down or 3-state mode VI < 0 V VO < 0 V VO = 0 V to VCCO ICC(A) or ICC(B) [2] [1] [1][2][3] [1] Conditions Min 0.5 0.5 0.5 0.5 0.5 50 50 100 65 Max +6.5 +6.5 +6.5 VCCO + 0.5 +6.5 50 100 +150 Unit V V V V V mA mA mA mA mA C NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 4 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state Table 5. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Ptot [1] [2] [3] [4] Parameter total power dissipation Conditions Tamb = 40 C to +125 C [4] Min - Max 250 Unit mW The minimum input and minimum output voltage ratings may be exceeded if the input and output current ratings are observed. VCCO is the supply voltage associated with the output. VCCO + 0.5 V should not exceed 6.5 V. For DHVQFN14 packages: above 60 C the value of Ptot derates linearly at 4.5 mW/K. 9. Recommended operating conditions Table 6. Symbol VCC(A) VCC(B) VI VO Recommended operating conditions[1][2] Parameter supply voltage A supply voltage B input voltage output voltage Power-down or 3-state mode; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V A port B port Tamb t/V ambient temperature input transition rise and fall rate VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V 0 0 40 3.6 5.5 +125 40 V V C ns/V Conditions Min 1.2 1.65 0 Max 3.6 5.5 5.5 Unit V V V [1] [2] The A and B sides of an unused I/O pair must be held in the same state, both at VCCI or both at GND. VCC(A) must be less than or equal to VCC(B). 10. Static characteristics Table 7. Typical static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C. Symbol Parameter VOH VOL II IOZ IOFF HIGH-level output voltage LOW-level output voltage input leakage current Conditions A port; VCC(A) = 1.2 V; IO = 20 A A port; VCC(A) = 1.2 V; IO = 20 A OE input; VI = 0 V to 3.6 V; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V [1] Min - Typ 1.1 0.09 - Max 1 1 1 1 Unit V V A A A A OFF-state output A or B port; VO = 0 V to VCCO; VCC(A) = 1.2 V to 3.6 V; current VCC(B) = 1.65 V to 5.5 V power-off leakage current A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V B port; VI or VO = 0 V to 5.5 V; VCC(B) = 0 V; VCC(A) = 0 V to 3.6 V NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 5 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state Table 7. Typical static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C. Symbol Parameter ICC supply current Conditions VI = 0 V or VCCI; IO = 0 A ICC(A); VCC(A) = 1.2 V; VCC(B) = 1.65 V to 5.5 V ICC(B); VCC(A) = 1.2 V; VCC(B) = 1.65 V to 5.5 V ICC(A) + ICC(B); VCC(A) = 1.2 V; VCC(B) = 1.65 V to 5.5 V CI CI/O input capacitance input/output capacitance OE input; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V A port; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V B port; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V [2] Min - Typ 0.05 3.3 3.5 2.0 4.0 7.5 Max - Unit A A A pF pF pF [1] [2] VCCO is the supply voltage associated with the output. VCCI is the supply voltage associated with the input. Table 8. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage Conditions A or B port and OE input VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V A or B port and OE input VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V IO = 20 A A port; VCC(A) = 1.4 V to 3.6 V B port; VCC(B) = 1.65 V to 5.5 V VOL LOW-level output voltage IO = 20 A A port; VCC(A) = 1.4 V to 3.6 V B port; VCC(B) = 1.65 V to 5.5 V II input leakage current OFF-state output current power-off leakage current OE input; VI = 0 V to 3.6 V; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V A or B port; VO = 0 V or VCCO; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V B port; VI or VO = 0 V to 5.5 V; VCC(B) = 0 V; VCC(A) = 0 V to 3.6 V [2] [2] [2] [1] [1] 40 C to +85 C Min 0.65VCCI Max - 40 C to +125 C Min 0.65VCCI Max - Unit V VIL - 0.35VCCI - 0.35VCCI V VOH VCCO  0.4 VCCO  0.4 - 0.4 0.4 2 VCCO  0.4 VCCO  0.4 - 0.4 0.4 5 V V V V A IOZ - 2 - 10 A IOFF - 2 2 - 10 10 A A NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 6 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state Table 8. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter ICC supply current Conditions VI = 0 V or VCCI; IO = 0 A ICC(A) OE = HIGH; VCC(A) = 1.4 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V OE = LOW; VCC(A) = 1.4 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V VCC(A) = 3.6 V; VCC(B) = 0 V VCC(A) = 0 V; VCC(B) = 5.5 V ICC(B) OE = HIGH; VCC(A) = 1.4 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V OE = LOW; VCC(A) = 1.4 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V VCC(A) = 3.6 V; VCC(B) = 0 V VCC(A) = 0 V; VCC(B) = 5.5 V ICC(A) + ICC(B) VCC(A) = 1.4 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V [1] [2] VCCI is the supply voltage associated with the input. VCCO is the supply voltage associated with the output. [1] 40 C to +85 C Min Max 40 C to +125 C Min Max Unit - 5 - 15 A - 5 - 20 A - 2 2 5 - 15 15 15 A A A - 5 - 20 A - 2 2 10 - 15 15 40 A A A 11. Dynamic characteristics Table 9. Typical dynamic characteristics for temperature 25 C[1] Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for waveforms see Figure 5 and Figure 6. Symbol Parameter Conditions 1.8 V VCC(A) = 1.2 V; Tamb = 25 C tpd ten tdis propagation delay enable time disable time A to B B to A OE to A, B OE to A; no external load OE to B; no external load OE to A OE to B tt transition time A port B port [2] [2] VCC(B) 2.5 V 4.8 4.8 0.5 9.3 7.7 69 69 4.0 2.0 3.3 V 4.4 4.5 0.5 9.3 7.6 83 83 4.1 1.7 5.0 V 4.2 4.4 0.5 9.3 7.1 68 68 4.1 1.4 Unit 5.9 5.6 0.5 9.3 8.7 81 81 4.0 2.6 ns ns s ns ns ns ns ns ns NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 7 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state Table 9. Typical dynamic characteristics for temperature 25 C[1] …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for waveforms see Figure 5 and Figure 6. Symbol tsk(o) tW fdata [1] Parameter output skew time pulse width data rate Conditions 1.8 V between channels data inputs [3] VCC(B) 2.5 V 0.2 13 80 3.3 V 0.2 13 80 5.0 V 0.2 13 80 0.2 15 70 Unit ns ns Mbps tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. tt is the same as tTHL and tTLH [2] [3] Delay between OE going HIGH and when the outputs are actually disabled. Skew between any two outputs of the same package switching in the same direction. Table 10. Dynamic characteristics for temperature range 40 C to +85 C[1] Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for wave forms see Figure 5 and Figure 6. Symbol Parameter Conditions Min VCC(A) = 1.5 V  0.1 V tpd ten tdis propagation delay enable time disable time A to B B to A OE to A, B OE to A; no external load OE to B; no external load OE to A OE to B tt tsk(o) tW fdata tpd ten tdis transition time output skew time pulse width data rate propagation delay enable time disable time A to B B to A OE to A, B OE to A; no external load OE to B; no external load OE to A OE to B tt transition time A port B port [2] [2] [2] [2] VCC(B) 1.8 V  0.15 V 2.5 V  0.2 V 3.3 V  0.3 V 5.0 V  0.5 V Max 12.9 14.2 1.0 12.9 18.7 320 5.1 4.7 0.5 40 11.0 12.0 1.0 11.7 16.9 260 200 4.1 4.7 Min 1.2 0.7 1.0 1.0 200 0.9 0.6 25 1.4 1.3 1.0 1.0 0.8 0.6 Max 10.1 12.0 1.0 12.9 15.8 260 5.1 3.2 0.5 40 7.7 8.4 1.0 11.7 14.5 230 200 4.1 3.2 Min 1.1 0.4 1.0 1.0 200 0.9 0.5 25 1.3 1.0 1.0 1.0 0.8 0.5 Max 10.0 11.7 1.0 12.9 15.1 260 5.1 2.5 0.5 40 6.8 7.6 1.0 11.7 13.7 230 200 4.1 2.5 Min 0.8 0.3 1.0 1.0 200 0.9 0.4 25 1.2 0.9 1.0 1.0 0.8 0.4 Max 9.9 1.0 Unit 1.4 0.9 1.0 1.0 0.9 0.9 [3] ns s 13.7 ns 12.9 ns 14.4 ns 280 5.1 2.7 0.5 40 6.5 7.1 1.0 11.7 230 200 4.1 2.7 ns ns ns ns ns ns Mbps ns ns s ns ns ns ns ns A port B port between channels data inputs 25 1.6 1.5 1.0 1.0 0.8 0.9 VCC(A) = 1.8 V  0.15 V 12.7 ns NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 8 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state Table 10. Dynamic characteristics for temperature range 40 C to +85 C[1] …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for wave forms see Figure 5 and Figure 6. Symbol Parameter Conditions Min tsk(o) tW fdata tpd ten tdis output skew time pulse width data rate propagation delay enable time disable time A to B B to A OE to A, B OE to A; no external load OE to B; no external load OE to A OE to B tt tsk(o) tW fdata tpd ten tdis transition time output skew time pulse width data rate propagation delay enable time disable time A to B B to A OE to A, B OE to A; no external load OE to B; no external load OE to A OE to B tt tsk(o) tW fdata [1] [2] [2] [2] [2] VCC(B) 1.8 V  0.15 V 2.5 V  0.2 V 3.3 V  0.3 V 5.0 V  0.5 V Max 0.5 49 Min 17 1.1 1.2 1.0 1.0 0.7 0.7 12 Max 0.5 60 6.3 6.6 1.0 9.7 12.9 200 200 3.0 3.2 0.5 85 Min 17 1.0 1.1 1.0 1.0 0.7 0.5 10 0.9 1.0 1.0 1.0 0.7 0.5 10 Max 0.5 60 5.2 5.1 1.0 9.7 12.0 200 200 3.0 2.5 0.5 100 4.7 4.9 1.0 9.4 11.3 260 200 2.5 2.5 0.5 100 Min 17 0.9 0.9 1.0 1.0 0.7 0.4 10 0.8 0.9 1.0 1.0 0.7 0.4 10 Max 0.5 60 4.7 4.4 1.0 9.7 11.0 200 200 3.0 2.7 0.5 100 4.0 3.8 1.0 9.4 260 200 2.5 2.7 0.5 100 Unit between channels data inputs [3] 20 - ns ns Mbps ns ns s ns ns ns ns ns ns ns ns Mbps ns ns s ns ns ns ns ns ns ns Mbps VCC(A) = 2.5 V  0.2 V A port B port between channels data inputs [3] - VCC(A) = 3.3 V  0.3 V 10.4 ns transition time output skew time pulse width data rate A port B port between channels data inputs [3] - tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. tt is the same as tTHL and tTLH [2] [3] Delay between OE going HIGH and when the outputs are actually disabled. Skew between any two outputs of the same package switching in the same direction. NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 9 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state Table 11. Dynamic characteristics for temperature range 40 C to +125 C[1] Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for wave forms see Figure 5 and Figure 6. Symbol Parameter Conditions Min VCC(A) = 1.5 V  0.1 V tpd ten tdis propagation delay enable time disable time A to B B to A OE to A, B OE to A; no external load OE to B; no external load OE to A OE to B tt tsk(o) tW fdata tpd ten tdis transition time output skew time pulse width data rate propagation delay enable time disable time A to B B to A OE to A, B OE to A; no external load OE to B; no external load OE to A OE to B tt tsk(o) tW fdata tpd ten tdis transition time output skew time pulse width data rate propagation delay enable time disable time A to B B to A OE to A, B OE to A; no external load OE to B; no external load OE to A OE to B tt transition time A port B port [2] [2] [2] [2] [2] [2] VCC(B) 1.8 V  0.15 V 2.5 V  0.2 V 3.3 V  0.3 V 5.0 V  0.5 V Max 15.9 17.2 1.0 13.5 19.9 340 220 7.1 6.5 0.5 40 14.0 15.0 1.0 12.3 18.1 280 220 6.2 5.8 0.5 45 Min 1.2 0.7 1.0 1.0 0.9 0.6 25 1.4 1.3 1.0 1.0 0.8 0.6 19 1.1 1.2 1.0 1.0 0.7 0.7 Max 13.1 15.0 1.0 13.5 16.8 280 220 7.1 5.2 0.5 40 10.7 11.4 1.0 12.3 15.3 250 220 6.1 5.2 0.5 55 9.3 9.6 1.0 10.1 13.5 220 220 5.0 4.6 Min 1.1 0.4 1.0 1.0 0.9 0.5 25 1.3 1.0 1.0 1.0 0.8 0.5 19 1.0 1.1 1.0 1.0 0.7 0.5 Max 13.0 14.7 1.0 13.5 16.1 280 220 7.1 4.8 0.5 40 9.8 10.6 1.0 12.3 14.5 250 220 6.1 4.8 0.5 55 8.2 8.1 1.0 10.1 12.7 220 220 5.0 4.8 Min 0.8 0.3 1.0 1.0 0.9 0.4 25 1.2 0.9 1.0 1.0 0.8 0.4 19 0.9 0.9 1.0 1.0 0.7 0.4 Max Unit 1.4 0.9 1.0 1.0 0.9 0.9 [3] 12.9 ns 16.7 ns 1.0 s 13.5 ns 15.2 ns 300 220 7.1 4.7 0.5 40 9.5 1.0 ns ns ns ns ns ns Mbps ns s A port B port between channels data inputs 25 1.6 1.5 1.0 1.0 0.8 0.9 VCC(A) = 1.8 V  0.15 V 10.1 ns 12.3 ns 13.5 ns 250 220 6.1 4.7 0.5 55 7.7 7.4 1.0 11.7 220 220 5.0 4.7 ns ns ns ns ns ns Mbps ns ns s ns ns ns ns ns A port B port between channels data inputs [3] 22 - VCC(A) = 2.5 V  0.2 V 10.1 ns NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 10 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state Table 11. Dynamic characteristics for temperature range 40 C to +125 C[1] Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for wave forms see Figure 5 and Figure 6. Symbol Parameter Conditions Min tsk(o) tW fdata tpd ten tdis output skew time pulse width data rate propagation delay enable time disable time A to B B to A OE to A, B OE to A; no external load OE to B; no external load OE to A OE to B tt tsk(o) tW fdata [1] [2] [2] VCC(B) 1.8 V  0.15 V 2.5 V  0.2 V 3.3 V  0.3 V 5.0 V  0.5 V Max Min 14 Max 0.5 75 Min 13 0.9 1.0 1.0 1.0 0.7 0.5 10 Max 0.5 80 7.7 7.9 1.0 9.9 12.1 280 220 4.5 4.1 0.5 100 Min 10 0.8 0.9 1.0 1.0 0.7 0.4 10 Max 0.5 100 7.0 6.8 1.0 9.9 280 220 4.5 4.7 0.5 100 Unit between channels data inputs; [3] - ns ns Mbps ns ns s ns ns ns ns ns ns ns Mbps VCC(A) = 3.3 V  0.3 V 10.9 ns transition time output skew time pulse width data rate A port B port between channels data inputs [3] - tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. tt is the same as tTHL and tTLH [2] [3] Delay between OE going HIGH and when the outputs are actually disabled. Skew between any two outputs of the same package switching in the same direction. NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 11 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state Table 12. Typical power dissipation capacitance Voltages are referenced to GND (ground = 0 V).[1][2] Symbol Parameter Conditions 1.2 V 1.8 V 1.2 V 5.0 V 1.5 V 1.8 V VCC(A) 1.8 V VCC(B) 1.8 V 2.5 V 5.0 V 3.3 V to 5.0 V 2.5 V 2.5 V 3.3 V Unit Tamb = 25 C CPD power dissipation capacitance outputs enabled; OE = GND A port: (direction A to B) A port: (direction B to A) B port: (direction A to B) B port: (direction B to A) outputs disabled; OE = VCC(A) A port: (direction A to B) A port: (direction B to A) B port: (direction A to B) B port: (direction B to A) [1] PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of the outputs. [2] fi = 10 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL =  . 5 8 18 13 0.12 0.01 0.01 0.07 5 8 18 16 0.12 0.01 0.01 0.09 5 8 18 12 0.04 0.01 0.01 0.07 5 8 18 12 0.05 0.01 0.01 0.07 5 8 18 12 0.08 0.01 0.01 0.05 5 8 18 12 0.08 0.01 0.01 0.09 5 8 18 13 0.07 0.01 0.01 0.09 pF pF pF pF pF pF pF pF CPD is used to determine the dynamic power dissipation (PD in W). 12. Waveforms VI An, Bn input GND tPHL VOH Bn, An output VOL 90 % VM 10 % tTHL tTLH 001aal918 tPLH VM Measurement points are given in Table 13. VOL and VOH are typical output voltage levels that occur with the output load. Fig 5. The data input (An, Bn) to data output (Bn, An) propagation delay times NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 12 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state VI OE input GND tPLZ VCCO output LOW-to-OFF OFF-to-LOW VOL tPHZ VOH output HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs disabled outputs enabled aaa-001619 VM tPZL VM VX tPZH VY VM Measurement points are given in Table 13. VOL and VOH are typical output voltage levels that occur with the output load. Fig 6. Table 13. VCCO 1.2 V Enable and disable times Measurement points[1] Input VM 0.5VCCI 0.5VCCI 0.5VCCI 0.5VCCI 0.5VCCI 0.5VCCI Output VM 0.5VCCO 0.5VCCO 0.5VCCO 0.5VCCO 0.5VCCO 0.5VCCO VX VOL + 0.1 V VOL + 0.1 V VOL + 0.15 V VOL + 0.15 V VOL + 0.3 V VOL + 0.3 V VY VOH  0.1 V VOH  0.1 V VOH  0.15 V VOH  0.15 V VOH  0.3 V VOH  0.3 V Supply voltage 1.5 V  0.1 V 1.8 V  0.15 V 2.5 V  0.2 V 3.3 V  0.3 V 5.0 V  0.5 V [1] VCCI is the supply voltage associated with the input and VCCO is the supply voltage associated with the output. NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 13 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state VI negative pulse 0V tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW VEXT VCC VI VO RL VM VI positive pulse 0V VM G DUT CL RL 001aal920 Test data is given in Table 14. All input pulses are supplied by generators having the following characteristics: PRR  10 MHz; ZO = 50 ; dV/dt  1.0 V/ns. RL = Load resistance. CL = Load capacitance including jig and probe capacitance. VEXT = External voltage for measuring switching times. Fig 7. Table 14. VCC(A) Test circuit for measuring switching times Test data Input VI[1] t/V  1.0 ns/V Load CL 15 pF RL[2] VEXT tPLH, tPHL tPZH, tPHZ open tPZL, tPLZ[3] 2VCCO 50 k, 1 M open VCC(B) Supply voltage 1.2 V to 3.6 V 1.65 V to 5.5 V VCCI [1] [2] [3] VCCI is the supply voltage associated with the input. For measuring data rate, pulse width, propagation delay and output rise and fall measurements, RL = 1 M; for measuring enable and disable times, RL = 50 K. VCCO is the supply voltage associated with the output. NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 14 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state 13. Application information 13.1 Applications Voltage level-translation applications. The NTBA104 can be used to interface between devices or systems operating at different supply voltages. See Figure 8 for a typical operating circuit using the NTBA104. 1.8 V 0.1 µF 3.3 V VCC(A) OE VCC(B) 0.1 µF 1.8 V system controller 3.3 V system NTBA0104 A1 data A2 A3 A4 B1 B2 B3 B4 data GND aaa-001620 Fig 8. Typical operating circuit NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 15 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state 13.2 Architecture The architecture of the NTBA104 is shown in Figure 9. The device does not require an extra input signal to control the direction of data flow from A to B or from B to A. In a static state, the output drivers of the NTBA104 can maintain a defined output level, but the output architecture is designed to be weak, so that they can be overdriven by an external driver when data on the bus starts flowing in the opposite direction. The output one shots detect rising or falling edges on the A or B ports. During a rising edge, the one shots turn on the PMOS transistors (T1, T3) for a short duration, accelerating the low-to-high transition. Similarly, during a falling edge, the one shots turn on the NMOS transistors (T2, T4) for a short duration, accelerating the high-to-low transition. During output transitions the typical output impedance is 70  at VCCO = 1.2 V to 1.8 V, 50  at VCCO = 1.8 V to 3.3 V and 40  at VCCO = 3.3 V to 5.0 V. VCC(A) VCC(B) ONE SHOT T1 4 kΩ ONE SHOT A ONE SHOT T2 B T3 4 kΩ T4 ONE SHOT 001aal921 Fig 9. Architecture of NTBA104 I/O cell (one channel) NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 16 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state 13.3 Input driver requirements For correct operation, the device driving the data I/Os of the NTBA104 must have a minimum drive capability of 2 mA See Figure 10 for a plot of typical input current versus input voltage. II VT/4 kΩ VI −(VD − VT)/4 kΩ 001aal922 VT: input threshold voltage of the NTBA104 (typically VCCI / 2). VD: supply voltage of the external driver. Fig 10. Typical input current versus input voltage graph 13.4 Power up During operation VCC(A) must never be higher than VCC(B), however during power-up VCC(A)  VCC(B) does not damage the device, so either power supply can be ramped up first. There is no special power-up sequencing required. The NTBA104 includes circuitry that disables all output ports when either VCC(A) or VCC(B) is switched off. 13.5 Enable and disable An output enable input (OE) is used to disable the device. Setting OE = HIGH causes all I/Os to assume the high-impedance OFF-state. The disable time (tdis with no external load) indicates the delay between when OE goes HIGH and when outputs actually become disabled. The enable time (ten) indicates the amount of time the user must allow for one one-shot circuitry to become operational after OE is taken LOW. To ensure the high-impedance OFF-state during power-up or power-down, pin OE should be tied to VCC(A) through a pull-up resistor, the minimum value of the resistor is determined by the current-sourcing capability of the driver. 13.6 Pull-up or pull-down resistors on I/O lines As mentioned previously the NTBA104 is designed with low static drive strength to drive capacitive loads of up to 70 pF. To avoid output contention issues, any pull-up or pull-down resistors used must be kept higher than 50 k. For this reason the NTBA104 is not recommended for use in open drain driver applications such as 1-Wire or I2C. For these applications, the NTSA104 level translator is recommended. NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 17 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state 14. Package outline DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm D B A A A1 E c terminal 1 index area detail X terminal 1 index area e 2 L e1 b 6 vMCAB wM C y1 C C y 1 Eh 14 7 e 8 13 Dh 0 9 X 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D (1) 3.1 2.9 Dh 1.65 1.35 E (1) 2.6 2.4 Eh 1.15 0.85 e 0.5 e1 2 L 0.5 0.3 v 0.1 w 0.05 y 0.05 y1 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT762-1 REFERENCES IEC --JEDEC MO-241 JEITA --EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 11. Package outline SOT762-1 (DHVQFN14) NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 18 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state XQFN16: plastic, extremely thin quad flat package; no leads; 16 terminals; body 1.80 x 2.60 x 0.50 mm SOT1161-1 X D B A terminal 1 index area E A A1 A3 detail X e1 e 5 L 4 9 e e2 b 8 v w CAB C y1 C C y 1 terminal 1 index area 16 L1 13 12 0 Dimensions Unit(1) mm max nom min A 0.5 A1 0.05 A3 b D 1.9 1.8 1.7 E 2.7 2.6 2.5 e 0.4 e1 1.2 e2 1.2 1 scale L L1 v 2 mm w y y1 0.25 0.127 0.20 0.15 0.00 0.45 0.55 0.40 0.50 0.35 0.45 0.1 0.05 0.05 0.05 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. Outline version SOT1161-1 References IEC --JEDEC --JEITA --European projection sot1161-1_po Issue date 09-12-28 09-12-29 Fig 12. Package outline SOT1161-1 (XQFN16) NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 19 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state XQFN12: plastic, extremely thin quad flat package; no leads; 12 terminals; body 1.70 x 2.00 x 0.50 mm SOT1174-1 X D terminal 1 index area B A E A A1 A3 detail X b ∅v ∅w 7 CAB C C y1 C y 5 e1 e 1 terminal 1 index area L 0 1 scale Dimensions Unit(1) mm max nom min A 0.5 A1 0.05 A3 b D 1.8 1.7 1.6 E 2.1 2.0 1.9 e 0.4 e1 1.6 L L1 v 0.1 w y y1 2 mm 11 L1 0.25 0.127 0.20 0.15 0.00 0.55 0.50 0.15 0.45 0.05 0.05 0.05 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. Outline version SOT1174-1 References IEC --JEDEC MO-288 JEITA --European projection sot1174-1_po Issue date 10-04-07 10-04-21 Fig 13. Package outline SOT1174-1 (XQFN12) NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 20 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state 15. Abbreviations Table 15. Acronym CDM CMOS DUT ESD HBM MM Abbreviations Description Charged Device Model Complementary Metal Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Machine Model 16. Revision history Table 16. Revision history Release date 20111206 Data sheet status Product data sheet Change notice Supersedes Document ID NTBA104 v.1 NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 21 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state 17. Legal information 17.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 17.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. © NXP B.V. 2011. All rights reserved. 17.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or NTBA104 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 1 — 6 December 2011 22 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 17.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 18. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com NTBA104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 6 December 2011 23 of 24 NXP Semiconductors NTBA104 Dual supply translating transceiver; auto direction sensing; 3-state 19. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 13.1 13.2 13.3 13.4 13.5 13.6 14 15 16 17 17.1 17.2 17.3 17.4 18 19 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Application information. . . . . . . . . . . . . . . . . . 15 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input driver requirements . . . . . . . . . . . . . . . . 17 Power up . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Enable and disable . . . . . . . . . . . . . . . . . . . . . 17 Pull-up or pull-down resistors on I/O lines . . . 17 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 21 Legal information. . . . . . . . . . . . . . . . . . . . . . . 22 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 22 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Contact information. . . . . . . . . . . . . . . . . . . . . 23 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 6 December 2011 Document identifier: NTBA104