NTS0102GF

NTS0102 Dual supply translating transceiver; open drain; auto direction sensing Rev. 3 — 17 November 2011 Product data sheet 1. General description The NTS0102 is a 2-bit, dual supply translating transceiver with auto direction sensing, that enables bidirectional voltage level translation. It features two 2-bit input-output ports (An and Bn), one output enable input (OE) and two supply pins (VCC(A) and VCC(B)). VCC(A) can be supplied at any voltage between 1.65 V and 3.6 V and VCC(B) can be supplied at any voltage between 2.3 V and 5.5 V, making the device suitable for translating between any of the voltage nodes (1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins An and OE are referenced to VCC(A) and pins Bn are referenced to VCC(B). A LOW level at pin OE causes the outputs to assume a high-impedance OFF-state. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits  Wide supply voltage range:  VCC(A): 1.65 V to 3.6 V and VCC(B): 2.3 V to 5.5 V  Maximum data rates:  Push-pull: 50 Mbps  IOFF circuitry provides partial Power-down mode operation  Inputs accept voltages up to 5.5 V  ESD protection:  HBM JESD22-A114E Class 2 exceeds 2500 V for A port  HBM JESD22-A114E Class 3B exceeds 8000 V for B port  MM JESD22-A115-A exceeds 200 V  CDM JESD22-C101E exceeds 1500 V  Latch-up performance exceeds 100 mA per JESD 78B Class II  Multiple package options  Specified from 40 C to +85 C and 40 C to +125 C 3. Applications  I2C/SMBus  UART  GPIO NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing 4. Ordering information Table 1. Ordering information Package Temperature range NTS0102DP NTS0102GT NTS0102GD NTS0102GF NTS0102GU NTS0102GU8 40 C to +125 C 40 C to +125 C 40 C to +125 C 40 C to +125 C 40 C to +125 C 40 C to +125 C Name TSSOP8 XSON8 Description plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm plastic extremely thin small outline package; no leads; 8 terminals; body 1  1.95  0.5 mm Version SOT505-2 SOT833-1 Type number XSON8U plastic extremely thin small outline package; no SOT996-2 leads; 8 terminals; UTLP based; body 3  2  0.5 mm XSON8 XQFN10 XQFN8 extremely thin small outline package; no leads; 8 terminals; body 1.35  1  0.5 mm plastic, extremely thin quad flat package; no leads; 10 terminals; body 1.40  1.80  0.50 mm SOT1089 SOT1160-1 XQFN8: plastic, extremely thin quad flat package; no SOT1309-1 leads; 8 terminals; body 1.4  1.2  0.5 mm 5. Marking Table 2. Marking Marking code s02 s02 s02 s2 s2 s2 Type number NTS0102DP NTS0102GT NTS0102GD NTS0102GF NTS0102GU NTS0102GU8 NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 2 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing 6. Functional diagram OE 6 GATE BIAS A2 4 1 B2 A1 5 8 B1 VCC(A) GATE BIAS VCC(B) 001aal905 Fig 1. Logic symbol 7. Pinning information 7.1 Pinning NTS0102 B2 1 8 B1 GND 2 7 VCC(B) NTS0102 B2 GND VCC(A) A2 1 2 3 4 001aam488 8 7 6 5 B1 VCC(B) OE A1 VCC(A) 3 6 OE A2 4 5 A1 001aam489 Transparent top view Fig 2. Pin configuration SOT505-2 (TSSOP8) Fig 3. Pin configuration SOT833-1 (XSON8) and SOT1089 (XSON8) NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 3 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing NTS0102 10 A1 9 GND terminal 1 index area 8 B1 7 n.c. 6 VCC(B) B2 5 001aam559 © NXP B.V. 2011. All rights reserved. NTS0102 B2 GND VCC(A) A2 1 2 3 4 8 7 6 5 B1 A2 1 VCC(B) VCC(A) 2 OE n.c. 3 OE 4 A1 001aam490 Transparent top view Transparent top view Fig 4. Pin configuration SOT996-2 (XSON8U) Fig 5. Pin configuration SOT1160-1 (XQFN10) NTS0102 terminal 1 index area VCC(A) A1 A2 GND 2 3 4 5 OE 1 8 7 6 VCC(B) B1 B2 aaa-001515 Transparent top view Fig 6. Pin configuration SOT1309-1 (XQFN8) NTS0102 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 3 — 17 November 2011 4 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing 7.2 Pin description Table 3. Symbol Pin description Pin SOT505-2, SOT833-1, SOT1089 and SOT996-2 B2, B1 GND VCC(A) A2, A1 OE VCC(B) n.c. 1, 8 2 3 4, 5 6 7 SOT1160-1 5, 8 9 2 1, 10 4 6 3, 7 SOT1309 6, 7 4 1 3, 2 5 8 data input or output (referenced to VCC(B)) ground (0 V) supply voltage A data input or output (referenced to VCC(A)) output enable input (active HIGH; referenced to VCC(A)) supply voltage B not connected Description 8. Functional description Table 4. VCC(A) 1.65 V to VCC(B) 1.65 V to VCC(B) GND[2] [1] [2] Function table[1] Input VCC(B) 2.3 V to 5.5 V 2.3 V to 5.5 V GND[2] OE L H X Input/output An Z input or output Z Bn Z output or input Z Supply voltage H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. When either VCC(A) or VCC(B) is at GND level, the device goes into power-down mode. 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC(A) VCC(B) VI VO Parameter supply voltage A supply voltage B input voltage output voltage A port and OE input B port Active mode A or B port Power-down or 3-state mode A port B port IIK IOK IO ICC NTS0102 Conditions Min 0.5 0.5 [1][2] [1][2] [1][2] Max +6.5 +6.5 +6.5 +6.5 VCCO + 0.5 +4.6 +6.5 50 100 Unit V V V V V V V mA mA mA mA 0.5 0.5 0.5 [1] 0.5 0.5 50 50 [2] input clamping current output clamping current output current supply current VI < 0 V VO < 0 V VO = 0 V to VCCO ICC(A) or ICC(B) All information provided in this document is subject to legal disclaimers. - © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 5 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing Table 5. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol IGND Tstg Ptot [1] [2] [3] Parameter ground current storage temperature total power dissipation Conditions Min 100 65 Max +150 250 Unit mA C mW Tamb = 40 C to +125 C [3] - The minimum input and minimum output voltage ratings may be exceeded if the input and output current ratings are observed. VCCO is the supply voltage associated with the output. For TSSOP8 package: above 55 C the value of Ptot derates linearly with 2.5 mW/K. For XSON8 and XSON8U packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K. For XQFN10 package: above 128 C the value of Ptot derates linearly with 11.5 mW/K. For XQFN8 package: above 105.5 C the value of Ptot derates linearly with 5.6 mW/K. 10. Recommended operating conditions Table 6. Symbol VCC(A) VCC(B) Tamb t/V Recommended operating conditions[1][2] Parameter supply voltage A supply voltage B ambient temperature input transition rise and fall rate A or B port; push-pull driving VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V OE input VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V [1] [2] Conditions Min 1.65 2.3 40 - Max 3.6 5.5 +125 10 Unit V V C ns/V - 10 ns/V The A and B sides of an unused I/O pair must be held in the same state, both at VCCI or both at GND. VCC(A) must be less than or equal to VCC(B). 11. Static characteristics Table 7. Typical static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C. Symbol Parameter II IOZ IOFF input leakage current Conditions OE input; VI = 0 V to 3.6 V; VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V [1] Min - Typ 1 Max 1 1 1 1 - Unit A A A A pF OFF-state output A or B port; VO = 0 V or VCCO; VCC(A) = 1.65 V to 3.6 V; current VCC(B) = 2.3 V to 5.5 V power-off leakage current A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V B port; VI or VO = 0 V to 5.5 V; VCC(B) = 0 V; VCC(A) = 0 V to 3.6 V CI input capacitance OE input; VCC(A) = 3.3 V; VCC(B) = 3.3 V NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 6 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing Table 7. Typical static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C. Symbol Parameter CI/O input/output capacitance Conditions A port B port A or B port; VCC(A) = 3.3 V; VCC(B) = 3.3 V [1] VCCO is the supply voltage associated with the output. Min - Typ 5 8.5 11 Max - Unit pF pF pF Table 8. Typical supply current At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C. VCC(A) VCC(B) 2.5 V ICC(A) 1.8 V 2.5 V 3.3 V 0.1 0.1 ICC(B) 0.5 0.1 3.3 V ICC(A) 0.1 0.1 0.1 ICC(B) 1.5 0.8 0.1 5.0 V ICC(A) 0.1 0.1 0.1 ICC(B) 4.6 3.8 2.8 A A A Unit Table 9. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH HIGH-level input voltage Conditions A port VCC(A) = 1.65 V to 1.95 V; VCC(B) = 2.3 V to 5.5 V VCC(A) = 2.3 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V B port VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V OE input VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V VIL LOW-level input voltage A or B port VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V OE input VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V VOH HIGH-level output voltage LOW-level output voltage IO = 20 A VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V A or B port; IO = 1 mA VI  0.15 V; VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V [2] [1] [1] 40 C to +85 C Min VCCI  0.2 VCCI  0.4 Max - 40 C to +125 C Min VCCI  0.2 VCCI  0.4 Max - Unit V V [1] VCCI  0.4 - VCCI  0.4 - V 0.65VCC(A) - 0.65VCC(A) - V - 0.15 - 0.15 V - 0.35VCC(A) - 0.35VCC(A) V 0.67VCCO - 0.67VCCO - V VOL [2] - 0.4 - 0.4 V NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 7 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing Table 9. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter II input leakage current OFF-state output current power-off leakage current supply current Conditions OE input; VI = 0 V to 3.6 V; VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V A or B port; VO = 0 V or VCCO; VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V B port; VI or VO = 0 V to 3.6 V; VCC(B) = 0 V; VCC(A) = 0 V to 3.6 V VI = 0 V or VCCI; IO = 0 A ICC(A) VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V VCC(A) = 3.6 V; VCC(B) = 0 V VCC(A) = 0 V; VCC(B) = 5.5 V ICC(B) VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V VCC(A) = 3.6 V; VCC(B) = 0 V VCC(A) = 0 V; VCC(B) = 5.5 V ICC(A) + ICC(B) VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V [1] [2] VCCI is the supply voltage associated with the input. VCCO is the supply voltage associated with the output. [1] [2] 40 C to +85 C Min Max 2 40 C to +125 C Min Max 12 Unit A IOZ - 2 - 12 A IOFF - 2 2 - 12 12 A A ICC - 2.4 2.2 1 12 1 1 14.4 - 15 15 8 30 5 6 30 A A A A A A A 12. Dynamic characteristics Table 10. Dynamic characteristics for temperature range 40 C to +85 C[1] Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9; for wave forms see Figure 7 and Figure 8. Symbol Parameter Conditions 2.5 V  0.2 V Min VCC(A) = 1.8 V  0.15 V tPHL tPLH tPHL tPLH HIGH to LOW propagation delay LOW to HIGH propagation delay HIGH to LOW propagation delay LOW to HIGH propagation delay A to B A to B B to A B to A 4.6 6.8 4.4 5.3 4.7 6.8 4.5 4.5 5.8 7.0 4.7 0.5 ns ns ns ns Max VCC(B) 3.3 V  0.3 V Min Max 5.0 V  0.5 V Min Max Unit NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 8 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing Table 10. Dynamic characteristics for temperature range 40 C to +85 C[1] Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9; for wave forms see Figure 7 and Figure 8. Symbol Parameter Conditions 2.5 V  0.2 V Min ten tdis enable time disable time OE to A; B OE to A; no external load OE to B; no external load OE to A OE to B tTLH LOW to HIGH output transition time HIGH to LOW output transition time output skew time pulse width data rate HIGH to LOW propagation delay LOW to HIGH propagation delay HIGH to LOW propagation delay LOW to HIGH propagation delay enable time disable time A to B A to B B to A B to A OE to A; B OE to A; no external load OE to B; no external load OE to A OE to B tTLH LOW to HIGH output transition time HIGH to LOW output transition time output skew time pulse width data rate HIGH to LOW propagation delay LOW to HIGH propagation delay A to B A to B A port B port A port B port between channels data inputs [3] [2] [2] [2] [2] VCC(B) 3.3 V  0.3 V Min 2.3 2.7 1.9 2.8 20 2.6 2.9 1.9 2.4 20 Max 200 25 25 230 200 9.3 9.1 6.0 7.5 0.7 50 3.3 4.1 3.6 1.6 200 20 20 200 200 6.6 7.9 5.5 6.7 0.7 50 2.4 4.2 5.0 V  0.5 V Min 1.8 2.7 1.7 2.8 20 1.8 2.4 1.8 2.6 20 Max 200 25 25 230 200 7.6 7.6 13.3 10.0 0.7 50 3.4 4.4 4.3 0.7 200 20 20 200 200 6.2 6.8 5.3 6.6 0.7 50 3.1 4.4 Max 200 25 25 230 200 9.5 10.8 5.9 7.6 0.7 50 3.2 3.5 3.0 2.5 200 20 20 200 200 7.4 8.3 5.7 7.8 0.7 50 - Unit 3.2 3.3 2.0 2.9 [3] ns ns ns ns ns ns ns ns ns ns ns Mbps ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Mbps ns ns A port B port A port B port between channels data inputs tTHL tsk(o) tW fdata tPHL tPLH tPHL tPLH ten tdis 20 2.8 3.2 1.9 2.2 20 - VCC(A) = 2.5 V  0.2 V tTHL tsk(o) tW fdata tPHL tPLH VCC(A) = 3.3 V  0.3 V NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 9 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing Table 10. Dynamic characteristics for temperature range 40 C to +85 C[1] Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9; for wave forms see Figure 7 and Figure 8. Symbol Parameter Conditions 2.5 V  0.2 V Min tPHL tPLH ten tdis HIGH to LOW propagation delay LOW to HIGH propagation delay enable time disable time B to A B to A OE to A; B OE to A; no external load OE to B; no external load OE to A OE to B tTLH LOW to HIGH output transition time HIGH to LOW output transition time output skew time pulse width data rate ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. [2] [3] Delay between OE going LOW and when the outputs are actually disabled. Skew between any two outputs of the same package switching in the same direction. [2] [2] VCC(B) 3.3 V  0.3 V Min 2.3 2.5 2.0 2.3 20 Max 2.5 2.5 200 15 15 260 200 5.6 6.4 5.4 7.4 0.7 50 5.0 V  0.5 V Min 1.9 2.1 1.9 2.4 20 Max 3.3 2.6 200 15 15 260 200 5.9 7.4 5.0 7.6 0.7 50 Max - Unit [3] ns ns ns ns ns ns ns ns ns ns ns ns ns Mbps A port B port A port B port between channels data inputs tTHL tsk(o) tW fdata [1] - Table 11. Dynamic characteristics for temperature range 40 C to +125 C[1] Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9; for wave forms see Figure 7 and Figure 8. Symbol Parameter Conditions 2.5 V  0.2 V Min VCC(A) = 1.8 V  0.15 V tPHL tPLH tPHL tPLH ten HIGH to LOW propagation delay LOW to HIGH propagation delay HIGH to LOW propagation delay LOW to HIGH propagation delay enable time A to B A to B B to A B to A OE to A; B 5.8 8.5 5.5 6.7 200 5.9 8.5 5.7 5.7 200 7.3 8.8 5.9 0.7 200 ns ns ns ns ns Max VCC(B) 3.3 V  0.3 V Min Max 5.0 V  0.5 V Min Max Unit NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 10 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing Table 11. Dynamic characteristics for temperature range 40 C to +125 C[1] …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9; for wave forms see Figure 7 and Figure 8. Symbol Parameter Conditions 2.5 V  0.2 V Min tdis disable time OE to A; no external load OE to B; no external load OE to A OE to B tTLH LOW to HIGH output transition time HIGH to LOW output transition time output skew time pulse width data rate HIGH to LOW propagation delay LOW to HIGH propagation delay HIGH to LOW propagation delay LOW to HIGH propagation delay enable time disable time A to B A to B B to A B to A OE to A; B OE to A; no external load OE to B; no external load OE to A OE to B tTLH LOW to HIGH output transition time HIGH to LOW output transition time output skew time pulse width data rate HIGH to LOW propagation delay LOW to HIGH propagation delay A to B A to B A port B port A port B port between channels data inputs [3] [2] [2] [2] [2] VCC(B) 3.3 V  0.3 V Min 2.3 2.7 1.9 2.8 20 2.6 2.9 1.9 2.4 20 Max 30 30 250 220 11.7 11.4 7.5 9.4 0.8 50 4.2 5.2 4.5 2.0 200 25 25 220 220 8.3 9.7 6.9 8.4 0.8 50 3.0 5.3 5.0 V  0.5 V Min 1.8 2.7 1.7 2.8 20 1.8 2.4 1.8 2.6 20 Max 30 30 250 220 9.5 9.5 16.7 12.5 0.8 50 4.3 5.5 5.4 0.9 200 25 25 220 220 7.8 8.3 6.7 8.3 0.8 50 3.9 5.5 Max 30 30 250 220 11.9 13.5 7.4 9.5 0.8 50 4.0 4.4 3.8 3.2 200 25 25 220 220 9.3 10.4 7.2 9.8 0.8 50 - Unit 3.2 3.3 2.0 2.9 ns ns ns ns ns ns ns ns ns ns Mbps ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Mbps ns ns A port B port A port B port between channels data inputs [3] tTHL tsk(o) tW fdata tPHL tPLH tPHL tPLH ten tdis 20 2.8 3.2 1.9 2.2 20 - VCC(A) = 2.5 V  0.2 V tTHL tsk(o) tW fdata tPHL tPLH VCC(A) = 3.3 V  0.3 V NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 11 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing Table 11. Dynamic characteristics for temperature range 40 C to +125 C[1] …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9; for wave forms see Figure 7 and Figure 8. Symbol Parameter Conditions 2.5 V  0.2 V Min tPHL tPLH ten tdis HIGH to LOW propagation delay LOW to HIGH propagation delay enable time disable time B to A B to A OE to A; B OE to A; no external load OE to B; no external load OE to A OE to B tTLH LOW to HIGH output transition time HIGH to LOW output transition time output skew time pulse width data rate ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. [2] [3] Delay between OE going LOW and when the outputs are actually disabled. Skew between any two outputs of the same package switching in the same direction. [2] [2] VCC(B) 3.3 V  0.3 V Min 2.3 2.5 2.0 2.3 20 Max 3.2 3.2 200 20 20 280 220 7.0 8.0 6.8 9.3 0.8 50 5.0 V  0.5 V Min 1.9 2.1 1.9 2.4 20 Max 4.2 3.3 200 20 20 280 220 7.4 9.3 6.3 9.5 0.8 50 Max - Unit [3] ns ns ns ns ns ns ns ns ns ns ns ns ns Mbps A port B port A port B port between channels data inputs tTHL tsk(o) tW fdata [1] - 13. Waveforms VI An, Bn input GND tPHL VOH Bn, An output VOL 90 % VM 10 % tTHL tTLH 001aal918 tPLH VM Measurement points are given in Table 12. VOL and VOH are typical output voltage levels that occur with the output load. Fig 7. The data input (An, Bn) to data output (Bn, An) propagation delay times NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 12 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing VI OE input GND tPLZ output LOW-to-OFF OFF-to-LOW VCCO VM VOL tPHZ VOH output HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs disabled outputs enabled 001aal919 VM tPZL VX tPZH VY VM Measurement points are given in Table 12. VOL and VOH are typical output voltage levels that occur with the output load. Fig 8. Table 12. VCCO Enable and disable times Measurement points[1][2] Input VM 0.5VCCI 0.5VCCI 0.5VCCI 0.5VCCI Output VM 0.5VCCO 0.5VCCO 0.5VCCO 0.5VCCO VX VOL + 0.15 V VOL + 0.15 V VOL + 0.3 V VOL + 0.3 V VY VOH  0.15 V VOH  0.15 V VOH  0.3 V VOH  0.3 V Supply voltage 1.8 V  0.15 V 2.5 V  0.2 V 3.3 V  0.3 V 5.0 V  0.5 V [1] [2] VCCI is the supply voltage associated with the input. VCCO is the supply voltage associated with the output. NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 13 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing VI negative pulse 0V tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW VEXT VCC VI VO RL VM VI positive pulse 0V VM G DUT CL RL 001aal963 Test data is given in Table 13. All input pulses are supplied by generators having the following characteristics: PRR  10 MHz; ZO = 50 ; dV/dt  1.0 V/ns. RL = Load resistance. CL = Load capacitance including jig and probe capacitance. VEXT = External voltage for measuring switching times. Fig 9. Table 13. VCC(A) Test circuit for measuring switching times Test data Input VCC(B) VI[1] VCCI t/V  1.0 ns/V Load CL 15 pF RL[2] VEXT tPLH, tPHL tPZH, tPHZ open tPZL, tPLZ[3] 2VCCO 50 k, 1 M open Supply voltage 1.65 V to 3.6 V 2.3 V to 5.5 V [1] [2] [3] VCCI is the supply voltage associated with the input. For measuring data rate, pulse width, propagation delay and output rise and fall measurements, RL = 1 M; for measuring enable and disable times, RL = 50 K. VCCO is the supply voltage associated with the output. NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 14 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing 14. Application information 14.1 Applications Voltage level-translation applications. The NTS0102 can be used in point-to-point applications to interface between devices or systems operating at different supply voltages. The device is primarily targeted at I2C or 1-wire which use open-drain drivers, it may also be used in applications where push-pull drivers are connected to the ports, however the NTB0102 may be more suitable. 1.8 V 0.1 μF 3.3 V 1.8 V SYSTEM CONTROLLER VCC(A) VCC(B) 3.3 V SYSTEM 0.1 μF 1 μF OE NTS0102 A1 DATA A2 B2 B1 DATA 001aam491 Fig 10. Typical operating circuit 14.2 Architecture The architecture of the NTS0102 is shown in Figure 11. The device does not require an extra input signal to control the direction of data flow from A to B or B to A. VCC(A) VCC(B) T1 T2 ONE SHOT 10 kΩ ONE SHOT 10 kΩ GATE BIAS T3 A B 001aal965 Fig 11. Architecture of NTS0102 I/O cell (one channel) The NTS0102 is a "switch" type voltage translator, it employs two key circuits to enable voltage translation: 1. A pass-gate transistor (N-channel) that ties the ports together. 2. An output edge-rate accelerator that detects and accelerates rising edges on the I/O pins. NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 15 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing The gate bias voltage of the pass gate transistor (T3) is set at approximately one threshold voltage above the VCC level of the low-voltage side. During a LOW-to-HIGH transition the output one-shot accelerates the output transition by switching on the PMOS transistors (T1, T2) bypassing the 10 k pull-up resistors and increasing current drive capability. The one-shot is activated once the input transition reaches approximately VCCI/2; it is de-activated approximately 50 ns after the output reaches VCCO/2. During the acceleration time the driver output resistance is between approximately 50  and 70 . To avoid signal contention and minimize dynamic ICC, the user should wait for the one-shot circuit to turn-off before applying a signal in the opposite direction. Pull-up resistors are included in the device for DC current sourcing capability. 14.3 Input driver requirements As the NTS0102 is a switch type translator, properties of the input driver directly effect the output signal. The external open-drain or push-pull driver applied to an I/O determines the static current sinking capability of the system; the max data rate, HIGH-to-LOW output transition time (tTHL) and propagation delay (tPHL) are dependent upon the output impedance and edge-rate of the external driver. The limits provided for these parameters in the datasheet assume a driver with output impedance below 50  is used. 14.4 Output load considerations The maximum lumped capacitive load that can be driven is dependant upon the one-shot pulse duration. In cases with very heavy capacitive loading there is a risk that the output will not reach the positive rail within the one-shot pulse duration. To avoid excessive capacitive loading and to ensure correct triggering of the one-shot it's recommended to use short trace lengths and low capacitance connectors on NTS0102 PCB layouts. To ensure low impedance termination and avoid output signal oscillations and one-shot re-triggering, the length of the PCB trace should be such that the round trip delay of any reflection is within the one-shot pulse duration (approximately 50 ns). 14.5 Power up During operation VCC(A) must never be higher than VCC(B), however during power-up VCC(A)  VCC(B) does not damage the device, so either power supply can be ramped up first. There is no special power-up sequencing required. The NTS0102 includes circuitry that disables all output ports when either VCC(A) or VCC(B) is switched off. 14.6 Enable and disable An output enable input (OE) is used to disable the device. Setting OE = LOW causes all I/Os to assume the high-impedance OFF-state. The disable time (tdis with no external load) indicates the delay between when OE goes LOW and when outputs actually become disabled. The enable time (ten) indicates the amount of time the user must allow for one one-shot circuitry to become operational after OE is taken HIGH. To ensure the high-impedance OFF-state during power-up or power-down, pin OE should be tied to GND through a pull-down resistor, the minimum value of the resistor is determined by the current-sourcing capability of the driver. NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 16 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing 14.7 Pull-up or pull-down resistors on I/Os lines Each A port I/O has an internal 10 k pull-up resistor to VCC(A), and each B port I/O has an internal 10 k pull-up resistor to VCC(B). If a smaller value of pull-up resistor is required, an external resistor must be added parallel to the internal 10 k, this will effect the VOL level. When OE goes LOW the internal pull-ups of the NTS0102 are disabled. NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 17 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing 15. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 D E A X c y HE vMA Z 8 5 A pin 1 index A2 A1 (A3) Lp L θ 1 e bp 4 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.00 A2 0.95 0.75 A3 0.25 bp 0.38 0.22 c 0.18 0.08 D(1) 3.1 2.9 E(1) 3.1 2.9 e 0.65 HE 4.1 3.9 L 0.5 Lp 0.47 0.33 v 0.2 w 0.13 y 0.1 Z(1) 0.70 0.35 θ 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 REFERENCES IEC JEDEC --JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16 Fig 12. Package outline SOT505-2 (TSSOP8) NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 18 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm SOT833-1 1 2 3 b 4 4× L (2) L1 e 8 e1 7 e1 6 e1 5 8× (2) A A1 D E terminal 1 index area 0 DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max 0.5 A1 max 0.04 b 0.25 0.17 D 2.0 1.9 E 1.05 0.95 e 0.6 e1 0.5 L 0.35 0.27 L1 0.40 0.32 1 scale 2 mm Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT833-1 REFERENCES IEC --JEDEC MO-252 JEITA --EUROPEAN PROJECTION ISSUE DATE 07-11-14 07-12-07 Fig 13. Package outline SOT833-1 (XSON8) NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 19 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing XSON8U: plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 3 x 2 x 0.5 mm SOT996-2 D B A E A A1 detail X terminal 1 index area e1 L1 1 e b 4 v w M M CAB C C y1 C y L2 L 8 5 X 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max 0.5 A1 0.05 0.00 b 0.35 0.15 D 2.1 1.9 E 3.1 2.9 e 0.5 e1 1.5 L 0.5 0.3 L1 0.15 0.05 L2 0.6 0.4 v 0.1 w 0.05 y 0.05 y1 0.1 OUTLINE VERSION SOT996-2 REFERENCES IEC --JEDEC JEITA --- EUROPEAN PROJECTION ISSUE DATE 07-12-18 07-12-21 Fig 14. Package outline SOT996-2 (XSON8U) NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 20 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.35 x 1 x 0.5 mm E SOT1089 terminal 1 index area D A A1 detail X (4×)(2) e L (8×)(2) b4 5 e1 1 terminal 1 index area 8 L1 0 0.5 scale 1 mm X Dimensions Unit mm max nom min A(1) 0.5 A1 b D E e e1 L L1 0.35 0.40 0.04 0.20 1.40 1.05 0.15 1.35 1.00 0.55 0.35 0.30 0.35 0.27 0.32 0.12 1.30 0.95 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version SOT1089 References IEC JEDEC MO-252 JEITA European projection sot1089_po Issue date 10-04-09 10-04-12 Fig 15. Package outline SOT1089 (XSON8) NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 21 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing XQFN10: plastic, extremely thin quad flat package; no leads; 10 terminals; body 1.40 x 1.80 x 0.50 mm SOT1160-1 X D B A terminal 1 index area E A A1 A3 detail X e1 e b 3 L 5 v w CAB C y1 C C y 2 1 6 e2 7 terminal 1 index area 10 L1 8 0 Dimensions Unit(1) mm max nom min A 0.5 A1 0.05 A3 b D 1.5 1.4 1.3 E 1.9 1.8 1.7 e 0.4 e1 0.8 e2 0.4 1 scale L L1 v 0.1 2 mm w y y1 0.25 0.127 0.20 0.15 0.00 0.45 0.55 0.40 0.50 0.35 0.45 0.05 0.05 0.05 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. Outline version SOT1160-1 References IEC --JEDEC --JEITA --European projection sot1160-1_po Issue date 09-12-28 09-12-29 Fig 16. Package outline SOT1160-1 (XQFN10) NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 22 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing XQFN8: plastic, extremely thin quad flat package; no leads; 8 terminals; body 1.4 x 1.2 x 0.5 mm SOT1309-1 D B A E A A1 A3 terminal 1 index area detail X e1 terminal 1 index area 2 L b e 4 v w CAB C y1 C C y 1 5b 8 L1 6 X 0 Dimensions Unit mm A A1 A3 b D E e 0.4 e1 0.8 L scale L1 v w y 3 mm y1 max 0.50 0.025 0.25 1.45 1.25 nom 0.127 0.20 1.40 1.20 0.00 0.15 1.35 1.15 min 0.35 0.45 0.30 0.40 0.10 0.05 0.05 0.05 0.25 0.35 sot1309-1_po Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included Outline version SOT1309-1 References IEC JEDEC MO-255 JEITA European projection Issue date 11-08-18 11-08-23 Fig 17. Package outline SOT1309-1 (XQFN8) NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 23 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing 16. Abbreviations Table 14. Acronym CDM CMOS DUT ESD GPIO HBM I2C MM PCB PMOS SMBus UART UTLP Abbreviations Description Charged Device Model Complementary Metal Oxide Semiconductor Device Under Test ElectroStatic Discharge General Purpose Input Output Human Body Model Inter-Integrated Circuit Machine Model Printed Circuit Board Positive Metal Oxide Semiconductor System Management Bus Universal Asynchronous Receiver Transmitter Ultra Thin Leadless Package 17. Revision history Table 15. Revision history Release date 20111117 Data sheet status Product data sheet Product data sheet Product data sheet Change notice Supersedes NTS0102 v.2 NTS0102 v.1 Document ID NTS0102 v.3 Modifications: NTS0102 v.2 NTS0102 v.1 • Added type number NTS0102GU8 (SOT1309-1/XQFN8 package). 20110411 20100921 NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 24 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing 18. Legal information 18.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 18.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. © NXP B.V. 2011. All rights reserved. 18.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or NTS0102 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 3 — 17 November 2011 25 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 18.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 19. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com NTS0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 17 November 2011 26 of 27 NXP Semiconductors NTS0102 Dual supply translating transceiver; open drain; auto direction sensing 20. Contents 1 2 3 4 5 6 7 7.1 7.2 8 9 10 11 12 13 14 14.1 14.2 14.3 14.4 14.5 14.6 14.7 15 16 17 18 18.1 18.2 18.3 18.4 19 20 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 Functional description . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Application information. . . . . . . . . . . . . . . . . . 15 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input driver requirements . . . . . . . . . . . . . . . . 16 Output load considerations . . . . . . . . . . . . . . . 16 Power up . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Enable and disable . . . . . . . . . . . . . . . . . . . . . 16 Pull-up or pull-down resistors on I/Os lines . . 17 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 24 Legal information. . . . . . . . . . . . . . . . . . . . . . . 25 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 25 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Contact information. . . . . . . . . . . . . . . . . . . . . 26 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 17 November 2011 Document identifier: NTS0102