OM5284IB01

INTEGRATED CIRCUITS OM5234/OM5284 CMOS single-chip 8-bit microcontrollers Preliminary specification 1996 Nov 01 Philips Semiconductors Philips Semiconductors Preliminary specification CMOS single-chip 8-bit microcontrollers OM5234/OM5284 DESCRIPTION The OM5234 and OM5284 single-chip 8-bit microcontrollers are manufactured in an advanced CMOS process and are derivatives of the 80C51 microcontroller family. The OM5234 and OM5284 are pre-programmed devices for specific applications. Unless specifically stated otherwise, all references to OM5234 apply equally to OM5284. The OM5234 contains a non-volatile 16k × 8 read-only program memory, a volatile 256 × 8 read/write data memory, four 8-bit I/O ports, two 16-bit timer/event counters (identical to the timers of the 80C51), a multi-source, two-priority-level, nested interrupt structure, UART and on-chip oscillator and timing circuits. FEATURES • 80C51 central processing unit • 6k × 8 ROM • 256 × 8 RAM • Two standard 16-bit timer/counters • Four 8-bit I/O ports • Full-duplex UART facilities • Power control modes – Idle mode – Power-down mode • ROM code protection ORDERING INFORMATION OM5234 / F T P / YYY Device OM5234 Frequency Range F = 3.5 to 16MHz I = 3.5 to 24MHz Temperature Range B = 0 to 70°C PART NUMBER OM5234/FBB/YYY OM5234/FBP/YYY OM5234/FBA/YYY OM5284EBYY OM5284EAYY OM5284EPYY ROM code for application 5XX, etc. Package designator A = Plastic Leaded Chip Carrier B = Plastic Quad Flat Package P = Plastic Dual In-Line Package Device OM5284 Frequency Range E = 3.5 to 16MHz I = 3.5 to 24MHz OM5284 X Y ZZ ROM code for application 01, 02, 03 Package designator A = Plastic Leaded Chip Carier B = Plastic Quad Flat Package P = Plastic Dual In-Line Package FREQUENCY (MHz) 16 16 16 16 16 16 DRAWING NUMBER SOT307-2 SOT129-1 SOT187-2 SOT307-2 SOT187-2 SOT129-1 TEMPERATURE RANGE °C AND PACKAGE 0 to 70°C, Plastic Quad Flat Package 0 to 70°C, Plastic Dual In-Line Package 0 to 70°C, Plastic Leaded Chip Carrier 0 to 70°C, Plastic Quad Flat Package 0 to 70°C, Plastic Leaded Chip Carrier 0 to 70°C, Plastic Dual In-Line Package LOGIC SYMBOL VCC VSS RST PORT 0 XTAL1 XTAL2 EA PSEN ALE ADDRESS AND DATA BUS ALTERNATE FUNCTIONS RxD TxD INT0 INT1 T0 T1 WR RD PORT 3 PORT 2 PORT 1 ADDRESS BUS SU00800 1996 Nov 01 2 Philips Semiconductors Preliminary specification CMOS single-chip 8-bit microcontrollers OM5234/OM5284 PIN CONFIGURATIONS DUAL IN-LINE PACKAGE PIN FUNCTIONS P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST 1 2 3 4 5 6 7 8 9 DUAL IN-LINE PACKAGE 40 VDD 39 P0.0/AD0 38 P0.1/AD1 37 P0.2/AD2 36 P0.3/AD3 17 35 P0.4/AD4 34 P0.5/AD5 33 P0.6/AD6 32 P0.7/AD7 31 EA 30 ALE 29 PSEN 28 P2.7/A15 27 P2.6/A14 26 P2.5/A13 25 P2.4/A12 24 P2.3/A11 23 P2.2/A10 22 P2.1/A9 21 P2.0/A8 Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Function NC* P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST P3.0/RxD NC* P3.1/TxD P3.2/INT0 P3.3/INT1 18 Pin 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Function P3.4/T0 P3.5/T1 P3.6/WR P3.7/RD XTAL2 XTAL1 VSS NC* P2.0/A8 P2.1/A9 P2.2/A10 P2.3/A11 P2.4/A12 P2.5/A13 P2.6/A14 28 Pin 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function P2.7/A15 PSEN ALE NC* EA P0.7/AD7 P0.6/AD6 P0.5/AD5 P0.4/AD4 P0.3/AD3 P0.2/AD2 P0.1/AD1 P0.0/AD0 VDD 29 PLCC 7 39 PLASTIC LEADED CHIP CARRIER PIN FUNCTIONS 6 1 40 P3.0/RxD 10 P3.1/TxD 11 P3.2/INT0 12 P3.3/INT1 13 P3.4/T0 14 P3.5/T1 15 P3.6/WR 16 P3.7/RD 17 XTAL2 18 XTAL1 19 VSS 20 * DO NOT CONNECT SU00798 SU00802 PLASTIC QUAD FLAT PACK PIN FUNCTIONS 44 34 1 33 PQFP 11 23 12 Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Function P1.5 P1.6 P1.7 RST P3.0/RxD VSS4 P3.1/TxD P3.2/INT0 P3.3/INT1 P3.4/T0 P3.5/T1 P3.6/WR P3.7/RD XTAL2 XTAL1 Pin 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Function VSS1 NC* P2.0/A8 P2.1/A9 P2.2/A10 P2.3/A11 P2.4/A12 P2.5/A13 P2.6/A14 P2.7/A15 PSEN ALE VSS2 EA/VPP P0.7/AD7 22 Pin 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function P0.6/AD6 P0.5/AD5 P0.4/AD4 P0.3/AD3 P0.2/AD2 P0.1/AD1 P0.0/AD0 VDD VSS3 P1.0 P1.1 P1.2 P.13 P1.4 SU00799 1996 Nov 01 3 Philips Semiconductors Preliminary specification CMOS single-chip 8-bit microcontrollers OM5234/OM5284 PIN DESCRIPTIONS PIN NUMBER MNEMONIC PLCC VSS VDD P0.0–0.7 22 44 43–36 QFP 6, 16, 28, 39 38 37–30 DIP 20 40 39–32 TYPE I I I/O NAME AND FUNCTION Ground: 0V reference. With the QFP package, all VSS pins (VSS1 to VSS4) must be connected. Power Supply: This is the power supply voltage for normal, idle, and power-down operation. Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to them float and can be used as high-impedance inputs. Port 0 is also the multiplexed low-order address and data bus during accesses to external program and data memory. In this application, it uses strong internal pull-ups when emitting 1s. Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups, except P1.6 and P1.7, which are open drain for OM5234 (only). Port 1 pins that have 1s written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, port 1 pins that are externally pulled low will source current because of the internal pull-ups. (See DC Electrical Characteristics: IIL). Alternate functions include: Bidirectional I/O with internal pull-ups (OM5284), and open drain for (OM5234). Bidirectional I/O with internal pull-ups (OM5284), and open drain for (OM5234). Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that have 1s written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, port 2 pins that are externally being pulled low will source current because of the internal pull-ups. (See DC Electrical Characteristics: IIL). Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOV @Ri), port 2 emits the contents of the P2 special function register. Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have 1s written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, port 3 pins that are externally being pulled low will source current because of the pull-ups. (See DC Electrical Characteristics: IIL). Port 3 also serves the special features of the 80C51 family, as listed below: RxD (P3.0): Serial input port TxD (P3.1): Serial output port INT0 (P3.2): External interrupt INT1 (P3.3): External interrupt T0 (P3.4): Timer 0 external input T1 (P3.5): Timer 1 external input WR (P3.6): External data memory write strobe RD (P3.7): External data memory read strobe Reset: A high on this pin for two machine cycles while the oscillator is running, resets the device. An internal diffused resistor to VSS permits a power-on reset using only an external capacitor to VCC. Address Latch Enable: Output pulse for latching the low byte of the address during an access to external memory. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency. Note that one ALE pulse is skipped during each access to external data memory. Program Store Enable: Read strobe to external program memory via Port 0 and Port 2. It is activated twice each machine cycle during fetches from the external program memory. When executing out of external program memory, two activations of PSEN are skipped during each access to external data memory. PSEN is not activated (remains HIGH) during fetches from external program memory. PSEN can sink/source 8 LSTTL inputs and can drive CMOS inputs without external pull-ups. External Access: If during a RESET, EA is held at TTL, level HIGH, the CPU executes out of the internal program memory ROM provided the Program Counter is less than 16384. If during a RESET, EA is held at TTL LOW level, the CPU executes out of external program memory. EA is not allowed to float. Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock generator circuits. P1.0–P1.7 2–9 40–44, 1–3 1–8 I/O P1.6 P1.7 P2.0–P2.7 8 9 24–31 2 3 18–25 7 8 21–28 I/O I/O I/O P3.0–P3.7 11, 13–19 5, 7–13 10–17 I/O 11 13 14 15 16 17 18 19 RST 10 5 7 8 9 10 11 12 13 4 10 11 12 13 14 15 16 17 9 I O I I I I O O I ALE 33 27 30 I/O PSEN 32 26 29 O EA 35 29 31 I XTAL1 21 15 19 I XTAL2 20 14 18 O Crystal 2: Output from the inverting oscillator amplifier. NOTE: To avoid “latch-up” effect at power-on, the voltage on any pin at any time must not be higher than VDD + 0.5V or VSS – 0.5V, respectively. 1996 Nov 01 4 Philips Semiconductors Preliminary specification CMOS single-chip 8-bit microcontrollers OM5234/OM5284 DC ELECTRICAL CHARACTERISTICS VSS = 0V, VDD = 5V ± 10%, Tamb = 0°C to +70°C TEST SYMBOL VIL VIL1 VIL2 VIH VIH1 VOL VOL1 VOL2 VOH IIL ITL IL1 IDD PARAMETER Input low voltage, except EA, P1.6, P1.7 Input low voltage to EA Input low voltage to P1.6, P1.7 Input high voltage, except XTAL1, RST, P1.6, P1.7 Input high voltage, XTAL1, RST Output low voltage, ports 1, 2, 3, except P1.6, P1.7 Output low voltage, port 0, ALE, PSEN Output low voltage, P1.6, P1.7 Output high voltage, ports 1, 2, 3, ALE, PSEN8 Logical 0 input current, ports 1, 2, 3, except P1.6, P1.7 Logical 1-to-0 transition current, ports 1, 2, 3, except P1.6, P1.7 Input leakage current, port 0, EA, P1.6, P1.7 Power supply current: Active mode @ 16MHz1, 9 Idle mode @ 16MHz2, 9 Power down mode3, 4 Internal reset pull-down resistor Pin capacitance IOL = 1.6mA6, 7 IOL = 3.2mA6, 7 IOL = 3.0mA IOH = –25µA VIN = 0.45V See note 5 0.45V < VI < 4.7V VDD=5.5V 0.75VDD –50 –650 ±10 32.0 6 50 40 225 15 CONDITIONS MIN. –0.5 –0.5 –0.5 0.2VDD+0.9 0.7VDD LIMITS MAX. 0.2VDD–0.1 0.2VDD–0.3 0.3VDD VDD+0.5 VDD+0.5 0.45 0.45 0.4 UNIT V V V V V V V V V µA µA µA mA mA µA kΩ pF RRST CIO NOTES: 1. The operating supply current is measured with all output pins disconnected; XTAL1 driven with tr = tf = 5ns; VIL = VSS + 0.5V; VIH = VDD –0.5V; XTAL2 not connected; EA = RST = Port 0 = P1.6 = P1.7 = VDD. 2. The idle mode supply current is measured with all output pins disconnected; XTAL1 driven with tr = tf = 5ns; VIL = VSS + 0.5V; VIH = VDD –0.5V; XTAL2 not connected; Port 0 = P1.6 = P1.7 = VDD; EA = RST = VSS. 3. The power-down current is measured with all output pins disconnected; XTAL2 not connected; Port 0 = P1.6 = P1.7 = VDD; EA = RST = VSS. 4. 2V ≤ VPD ≤ VDDmax. 5. Pins of ports 1 , 2, and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its maximum value when VIN is approximately 2V. 6. Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the VOLs of ALE and ports 1 and 3. The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions during bus operations. In the worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be desirable to qualify ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input. 7. Under steady state (non-transient) conditions, IOL must be externally limited as follows: Maximum IOL = 10mA per port pin; Maximum IOL = 26mA total for Port 0; Maximum IOL = 15mA total for Ports 1, 2, and 3; Maximum IOL = 71mA total for all output pins. If IOL exceeds the test conditions, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions. 8. Capacitive loading on ports 0 and 2 may cause the VOH on ALE and PSEN to momentarily fall below the 0.9VDD specification when the address bits are stabilizing. 9. IDDMAX for other frequencies can be derived from Figure 1, where FREQ is the external oscillator frequency in MHz. IDDMAX is given in mA. 1996 Nov 01 5 Philips Semiconductors Preliminary specification CMOS single-chip 8-bit microcontrollers OM5234/OM5284 40 IDD (mA) IDD (mA) 50 40 30 (1) 30 20 20 (1) 10 10 (2) (2) 0 0 4 8 12 fXTAL1 (MHz) 16 0 0 4 8 12 16 24 fXTAL1 (MHz) (1) MAXIMUM OPERATING MODE: VDD = VDDmax (2) MAXIMUM IDLE MODE: VDD = VDDmax These values are valid within the specified frequency range. (1) MAXIMUM OPERATING MODE: VDD = VDDmax (2) MAXIMUM IDLE MODE: VDD = VDDmax These values are valid within the specified frequency range. SU00801 Figure 1. IDD vs. Frequency AC ELECTRICAL CHARACTERISTICS1, 2 16MHz CLOCK SYMBOL FIGURE High time3 Low time3 Rise time3 Fall time3 PARAMETER MIN MAX VARIABLE CLOCK MIN MAX UNIT External Clock tCHCX tCLCX tCLCH tCHCL 2 2 2 2 20 20 20 20 20 20 tCLCL – tLOW tCLCL – tHIGH 20 20 ns ns ns ns NOTES: 1. Parameters are valid over operating temperature range unless otherwise specified. 2. Load capacitance for port 0, ALE, and PSEN = 100pF, load capacitance for all other outputs = 80pF. 3. These values are characterized but not 100% production tested. VCC–0.5 0.2VCC+0.9 0.2VCC–0.1 0.45V NOTE: AC inputs during testing are driven at VCC –0.5 for a logic ‘1’ and 0.45V for a logic ‘0’. Timing measurements are made at VIH min for a logic ‘1’ and VIL max for a logic ‘0’. SU00010 Figure 2. AC Testing Input/Output 1996 Nov 01 6 Philips Semiconductors Preliminary specification CMOS single-chip 8-bit microcontrollers OM5234/OM5284 PLCC44: plastic leaded chip carrier; 44 leads SOT187-2 1996 Nov 01 7 Philips Semiconductors Preliminary specification CMOS single-chip 8-bit microcontrollers OM5234/OM5284 DIP40: plastic dual in-line package; 40 leads (600 mil) SOT129-1 1996 Nov 01 8 Philips Semiconductors Preliminary specification CMOS single-chip 8-bit microcontrollers OM5234/OM5284 QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm SOT307-2 1996 Nov 01 9 Philips Semiconductors Preliminary specification CMOS single-chip 8-bit microcontrollers OM5234/OM5284 DEFINITIONS Data Sheet Identification Objective Specification Product Status Formative or in Design Definition This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Preliminary Specification Preproduction Product Product Specification Full Production Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. 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Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Philips Semiconductors and Philips Electronics North America Corporation register eligible circuits under the Semiconductor Chip Protection Act. © Copyright Philips Electronics North America Corporation 1996 All rights reserved. Printed in U.S.A. Philips Semiconductors 1996 Nov 01 10