PCA9517

INTEGRATED CIRCUITS PCA9517 Level translating I2C-bus repeater Product data sheet 2004 Oct 05 Philips Semiconductors Philips Semiconductors Product data sheet Level translating I2C-bus repeater PCA9517 DESCRIPTION The PCA9517 is a CMOS integrated circuit that provides level shifting between low voltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C or SMBus applications. While retaining all the operating modes and features of the I2C system during the level shifts, it also permits extension of the I2C-bus by providing bi-directional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Using the PCA9517 enables the system designer to isolate two halves of a bus for both voltage and capacitance. The SDA and SCL pins are over voltage tolerant and are high-impedance when the PCA9517 is unpowered. The 2.7 V to 5.5 V bus B side drivers behave much like the drivers on the PCA9515A device while the adjustable voltage bus A side drivers drive more current and eliminate the static offset voltage. This results in a LOW on the B side translating into a nearly 0 V LOW on the A side which accommodates smaller voltage swings of lower voltage logic. The static offset design of the B side PCA9517 I/O drivers prevent them from being connected to another PCA9510, PCA9511, PCA9512, PCA9513, PCA9514, PCA9515A, PCA9516A, PCA9517 (B side), or PCA9518. The A side of two or more PCA9517s can be connected together, however, to allow a star topography with the A side on the common bus, and the A side can be connected directly to any other buffer with static or dynamic offset voltage. Multiple PCA9517s can be connected in series, A side to B side, with no build-up in offset voltage with only time of flight delays to consider. The PCA9517 drivers are not enabled unless VCCA is above 0.8 V and VCC is above 2.5 V. The EN pin can also be used to turn the drivers on and off under system control. Caution should be observed to only change the state of the enable pin when the bus is idle. FEATURES • 2 channel, bi-directional buffer isolates capacitance and allows • Voltage level translation from 0.9 V to 5.5 V and from • Footprint and functions replacement for PCA9515/15A • I2C-bus and SMBus compatible • Active-HIGH repeater enable input • Open-drain input/outputs • Lock-up free operation • Supports arbitration and clock stretching across the repeater • Accommodates standard mode and fast mode I2C devices and • Powered-off high-impedance I2C pins • Operating supply voltage range of 2.7 V to 3.6 V • 5 V tolerant I2C and enable pins • 0 kHz to 400 kHz clock frequency1 • ESD protection exceeds 2000 V HBM per JESD22-A114, • • 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101. Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA. Packages offered: SO8, TSSOP8 (MSOP8) multiple masters 2.7 V to 5.5 V 400 pF on either side of the device ORDERING INFORMATION PACKAGES 8-pin plastic SO 8-pin plastic TSSOP (MSOP) TEMPERATURE RANGE –40 to +85 °C –40 to +85 °C ORDER CODE PCA9517D PCA9517DP TOPSIDE MARK PCA9517 9517 DRAWING NUMBER SOT96-1 SOT505-1 Standard packing quantities and other packaging data are available at www.standardproducts.philips.com/packaging/. PIN CONFIGURATION VCCA SCLA SDAA GND 1 2 3 4 8 7 6 5 VCCB SCLB SDAB EN PIN DESCRIPTION PIN 1 2 3 4 SU01790 SYMBOL VCCA SCLA SDAA GND EN SDAB SCLB VCCB FUNCTION A side supply voltage (0.9 V to 5.5 V) Serial clock A side bus Serial data A side bus Supply ground Active-HIGH repeater enable input Serial data B side bus Serial clock B side bus B side and device supply voltage (2.7 V to 3.6 V) 5 6 7 8 Figure 1. Pin configuration 1. The maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater. 2004 Oct 05 2 Philips Semiconductors Product data sheet Level translating I2C-bus repeater PCA9517 BLOCK DIAGRAM VCCA VCCB PCA9517 SDAA SDAB SCLA SCLB VCCB PULL-UP RESISTOR EN SU01791 GND Figure 2. PCA9517 block diagram The output pull-down on the B side internal buffer LOW is set for approximately 0.5 V, while the input threshold of the internal buffer is set about 70 mV lower (0.43 V). When the B side I/O is driven LOW internally, the LOW is not recognized as a LOW by the input. This prevents a lock-up condition from occurring. The output pull-down on the A side drives a hard LOW and the input level is set at 0.3 VCCA to accommodate the need for a lower LOW level in systems where the low voltage side supply voltage is as low as 0.9 V. be able to rise to 0.5 V until the A side rises above 0.3VCCA, then the B side will continue to rise being pulled up by the external pull-up resistor. The VCCA is only used to provide the 0.3VCCA reference to the A side input comparators and for the power good detect circuit. The PCA9517 logic and all I/Os are powered by the VCCB pin. Enable The EN pin is active-HIGH with an internal pull-up to VCCB and allows the user to select when the repeater is active. This can be used to isolate a badly behaved slave on power-up until after the system power-up reset. It should never change state during an I2C operation because disabling during a bus operation will hang the bus and enabling part way through a bus cycle could confuse the I2C parts being enabled. The enable pin should only change state when the global bus and the repeater port are in an idle state to prevent system failures. FUNCTIONAL DESCRIPTION The PCA9517 enables I2C-bus or SMBus translation down to VCCA as low as 0.9 V without degradation of system performance. The PCA9517 contains two bi-directional, open drain buffers specifically designed to support up-translation/down-translation between the low voltage (as low as 0.9 V ) and a 3.3 V or 5 V I2C-bus or SMBuses. All inputs and I/Os are over voltage tolerant to 5.5 V even when the device is unpowered (VCCB and/or VCCA = 0 V). The PCA9517 includes a power-up circuit that keeps the output drivers turned off until VCCB is above 2.5 V and the VCCA is above 0.8 V. VCCB and VCCA can be applied in any sequence at power-up. After power-up and with the enable (EN) HIGH, a LOW level on the A side (below 0.3VCCA) turns the corresponding B side driver (either SDA or SCL) on and drives the B side down to about 0.5 V. When the A side rises above 0.3VCCA the B side pull-down driver is turned off and the external pull-up resistor pulls the pin HIGH. When the B side falls first and goes below 0.3VCCB the A side driver is turned on and the A side pulls down to 0 V. The B side pull-down is not enabled unless the B side voltage goes below 0.4 V. If the B side low voltage does not go below 0.5 V, the A side driver will turn off when the B side voltage is above 0.7VCCB. If the B side low voltage goes below 0.4 V, the B side pull-down driver is enabled and the B side will only I2C Systems As with the standard I2C system, pull-up resistors are required to provide the logic HIGH levels on the Buffered bus (Standard open-collector configuration of the I2C-bus). The size of these pull-up resistors depends on the system, but each side of the repeater must have a pull-up resistor. This part designed to work with standard mode and fast mode I2C devices in addition to SMBus devices. Standard mode I2C devices only specify 3 mA output drive, this limits the termination current to 3 mA in a generic I2C system where standard mode devices and multiple masters are possible. Under certain conditions higher termination currents can be used. Please see Application Note AN255 “I 2C & SMBus Repeaters, Hubs and Expanders” for additional information on sizing resistors and precautions when using more than one PCA9517 in a system or using the PCA9517 in conjunction with other bus buffers. 2004 Oct 05 3 Philips Semiconductors Product data sheet Level translating I2C-bus repeater PCA9517 APPLICATION INFORMATION A typical application is shown in Figure 3. In this example, the system master is running on a 3.3 V I2C-bus while the slave is connected to a 1.2 V bus. Both buses run at 400 kHz. Master devices can be placed on either bus. The PCA9517 is 5 V tolerant so it does not require any additional circuitry to translate between 0.9 V to 5.5 V bus voltages and 2.7 V to 5.5 V bus voltages. 3.3 V 1.2 V 10 kΩ 10 kΩ VCCB 10 kΩ VCCA SDAA SCLA 10 kΩ When the A side of the PCA9517 is pulled LOW by a driver on the I2C-bus, a comparator detects the falling edge when it goes below 0.3VCCA and causes the internal driver on the B side to turn on, causing the B side to pull down to about 0.5 V. When the B side of the PCA9517 falls, first a CMOS hysteresis type input detects the falling edge and causes the internal driver on the A side to turn on and pull the A side pin down to ground. In order to illustrate what would be seen in a typical application, refer to Figures 6 and 7. If the bus master in Figure 3 were to write to the slave through the PCA9517, waveforms shown in Figure 6 would be observed on the A bus. This looks like a normal I2C transmission except that the HIGH level may be as low as 0.9 V, and the turn on and turn off of the acknowledge signals are slightly delayed. On the B bus side of the PCA9517, the clock and data lines would have a positive offset from ground equal to the VOL of the PCA9517. After the 8th clock pulse, the data line will be pulled to the VOL of the slave device which is very close to ground in this example. At the end of the acknowledge, the level rises only to the LOW level set by the driver in the PCA9517 for a short delay while the A bus side rises above 0.3VCCA then it continues HIGH. It is important to note that any arbitration or clock stretching events require that the LOW level on the B bus side at the input of the PCA9517 (VIL) be at or below 0.4 V to be recognized by the PCA9517 and then transmitted to the A bus side. SDA SCL BUS MASTER 400 kHz SDAB SCLB SDA SCL SLAVE 400 kHz PCA9517 EN BUS B BUS A SW02166 Figure 3. Typical application VCCA VCCB 10 kΩ 10 kΩ 10 kΩ 10 kΩ SDA SCL BUS MASTER SDAA SCLA SDAB SCLB SDA SCL SLAVE 400 kHz PCA9517 EN 10 kΩ 10 kΩ SDAA SCLA SDAB SCLB SDA SCL SLAVE 400 kHz PCA9517 EN 10 kΩ 10 kΩ SDAA SCLA SDAB SCLB SDA SCL SLAVE 400 kHz PCA9517 EN SW02347 Figure 4. Typical star application Multiple PCA9517 A sides can be connected in a star configuration, allowing all nodes to communicate with each other. 2004 Oct 05 4 Philips Semiconductors Product data sheet Level translating I2C-bus repeater PCA9517 VCC 10 kΩ SDA SCL BUS MASTER 10 kΩ SDAA SCLA SDAB SCLB 10 kΩ SDAA SCLA SDAB SCLB 10 kΩ SDAA SCLA SDAB SCLB 10 kΩ SDA SCL SLAVE 400 kHz PCA9517 EN PCA9517 EN PCA9517 EN SW02348 Figure 5. Typical series application Multiple PCA9517s can be connected in series as long as the A side is connected to the B side. I2C-bus slave devices can be connected to any of the bus segments. The number of devices that can be connected in series is limited by repeater delay/time of flight considereations on the maximum bus speed requirements. 9th CLOCK PULSE — ACKNOWLEDGE 0.5 V/DIV SCL SDA SW02167 Figure 6. Bus A (0.9 V to 5.5 V bus) waveform 9th CLOCK PULSE — ACKNOWLEDGE 2 V/DIV SCL SDA VOL OF PCA9517 VOL OF SLAVE SW02168 Figure 7. Bus B (2.7 V to 5.5 V bus) waveform 2004 Oct 05 5 Philips Semiconductors Product data sheet Level translating I2C-bus repeater PCA9517 ABSOLUTE MAXIMUM RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134). Voltages with respect to pin GND. LIMITS SYMBOL VCCB VCCA Vbus I Ptot Tstg Tamb Tj PARAMETER 2.7 V to 3.3 V bus supply voltage range Adjustable bus supply voltage range Voltage range I2C-bus, SCL or SDA or enable (EN) DC current (any pin) Power dissipation Storage temperature range Operating ambient temperature range Junction temperature MIN. –0.5 –0.5 –0.5 — — –55 –40 – MAX. +7 +7 +7 50 100 +125 +85 +125 UNIT V V V mA mW °C °C °C 2004 Oct 05 6 Philips Semiconductors Product data sheet Level translating I2C-bus repeater PCA9517 DC ELECTRICAL CHARACTERISTICS VCC = 2.7 V to 3.3 V; GND = 0 V; Tamb = –40 °C to +85 °C; unless otherwise specified. SYMBOL Supplies VCCB VCCA ICC ICCH ICCA DC supply voltage LOW-level DC supply voltage Quiescent supply current for VCCA Quiescent supply current, both channels HIGH Quiescent supply current, both channels LOW Quiescent supply current in contention VCC = 3.6 V; SDAn = SCLn = VCC VCC = 3.6 V; one SDA and one SCL = GND, other SDA and SCL open VCC = 3.6 V; SDAn = SCLn = GND 2.7 0.9 — — — — — — 1.5 1.5 3.3 5.5 1 5 5 V V mA mA mA PARAMETER TEST CONDITIONS CONDITIONS LIMITS MIN. TYP. MAX. UNIT ICCAc — 1.5 5 mA Input and output SDAB and SCLB VIH VIL VILc VIK II IIL VOL VOL–VILc IOH CI/O CI/O VIH VIL VIK II IIL VOL IOH CI/O CI/O Enable VIL VIH IIL ILI CI LOW-level input voltage HIGH-level input voltage Input current LOW, EN Input leakage current Input capacitance VI = 3.0 V or 0 V VI = 0.2 V, EN; VCC = 3.6 V –0.5 0.7VCCB — –1 — — — 10 — 6 0.3VCCB 5.5 30 1 7 V V µA µA pF HIGH-level input voltage LOW-level input voltage (Note 1) LOW-level input voltage contention (Note 1) Input clamp voltage Input leakage current Input current LOW, SDA, SCL LOW-level output voltage LOW-level input voltage below output low level voltage Output HIGH-level leakage current Input/output capacitance Input/output capacitance HIGH-level input voltage LOW-level input voltage (Note 1) Input clamp voltage Input leakage current Input current LOW, SDA, SCL LOW-level output voltage Output HIGH-level leakage current Input/output capacitance Input/output capacitance II = –18 mA VI = 3.6 V VI = 0.2 V, SDA, SCL IOL = 6 mA VO = 3.6 V VI = 3 V or 0 V; VCC = 3.3 V VI = 3 V or 0 V; VCC = 0 V II = –18 mA VI = 3.6 V VI = 0.2 V, SDA, SCL IOL = 100 µA or 6 mA Guaranteed by design VO = 3.6 V VI = 3 V or 0 V; VCC = 3.3 V VI = 3 V or 0 V; VCC = 0 V 0.7VCCB –0.5 –0.5 — — — 0.47 — — — — 0.7VCCA –0.5 — — — — — — — — — — — — — 0.52 — — 6 6 — — — — — 0.1 — 6 6 5.5 0.3VCCB 0.4 –1.2 ±1 10 0.6 70 10 7 7 5.5 0.3VCCA –1.2 ±1 10 0.2 10 7 7 V V V V µA µA V mV µA pF pF V V V µA µA V µA pF pF Input and output SDAA and SCLA NOTE: 1. VIL specification is for the first LOW level seen by the SDAx/SCLx lines. VILc is for the second and subsequent LOW levels seen by the SDAx/SCLx lines. 2004 Oct 05 7 Philips Semiconductors Product data sheet Level translating I2C-bus repeater PCA9517 AC ELECTRICAL CHARACTERISTICS SYMBOL tPLH tPHL tTLH tTHL tPLH tPHL tTLH tTHL tSET tHOLD PARAMETER Propagation delay, B to A side Propagation delay, B to A side Transition time, A side Transition time, A side Propagation delay, A to B side Propagation delay, A to B side Transition time, B side Transition time, B side Enable HIGH before Start condition Enable HIGH after Stop condition TEST CONDITIONS CONDITIONS Waveform 3; Note 3 VCCA ≤ 2.7 V; Waveform 1 VCCA ≥ 3 V; Waveform 1 Waveform 2 VCCA ≤ 2.7 V; Waveform 2 VCCA ≥ 3 V; Waveform 2 Waveform 2; Note 2 Waveform 2; Note 2 Waveform 1 Waveform 1 Note 6 Note 6 LIMITS MIN. 100 30 10 10 1 20 25 60 120 30 100 100 TYP. 170 80 7 66 20 77 7 MAX. 250 110 300 30 105 175 110 230 170 90 – – UNIT ns ns ns ns ns ns ns ns ns ns ns ns 70 53 79 140 48 – – NOTES: 1. Times are specified with loads of 1.35 kΩ pull-up resistance and 57 pF load capacitance on the B side and 167 Ω pull-up and 57 pF load capacitance on the A side. Different load resistnace and capacitance will alter the RC time constant, thereby changing the propagation delay and transition times. 2. The proportional delay data from A to B side is measured at 0.3VCCA on the A side to 1.5 V on the B side. 3. The tPLH delay data from B to A side is measured at 0.5 V on the B side to 0.5VCCA on the A side when VCCA is less than 2 V, and 1.5 V on the A side if VCCA is greater than 2 V. 4. Pull-up voltages are VCCA on the A side and VCCB on the B side. 5. Typical values were measured with VCCA = 3.6 V at Tamb = 25 °C, unless otherwise noted. 6. The enable pin, EN, should only change state when the global bus and the repeater port are in an idle state. 7. Typical value measured with VCCA = 2.7 V at Tamb = 25 °C. AC WAVEFORMS 3.3 V INPUT 1.5 V 1.5 V 0.1 V tPHL 80% OUTPUT 0.6 V 20% tTHL 0.6 V 20% VOL tTLH tPLH tPLH 1.2 V 80% OUTPUT SCLA, SDAA 50 % if VCCA is less than 2 V 1.5 V if VCCA is greater than 2 V INPUT SDAB, SCLB 0.5 V SW02169 SW02341 Waveform 1. Waveform 3. VCCA INPUT 0.3VCCA 0.3VCCA VCCA 3.3 V 80% OUTPUT 20% 1.5 V 1.5 V 20% 80% SW02170 Waveform 2. 2004 Oct 05 8 Philips Semiconductors Product data sheet Level translating I2C-bus repeater PCA9517 TEST CIRCUIT VCCA VCCB VCCB PULSE GENERATOR VIN D.U.T. RT VOUT RL CL Test Circuit for Open Drain Outputs DEFINITIONS RL = Load resistor; 1.35 kΩ on B side, 167 Ω on A side CL = Load capacitance includes jig and probe capacitance; 57 pF RT = Termination resistance should be equal to ZOUT of pulse generators. SW02342 2004 Oct 05 9 Philips Semiconductors Product data sheet Level translating I2C-bus repeater PCA9517 SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 2004 Oct 05 10 Philips Semiconductors Product data sheet Level translating I2C-bus repeater PCA9517 TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm SOT505-1 2004 Oct 05 11 Philips Semiconductors Product data sheet Level translating I2C-bus repeater PCA9517 REVISION HISTORY Rev _1 Date 20041005 Description Product data sheet (9397 750 13252). 2004 Oct 05 12 Philips Semiconductors Product data sheet Level translating I2C-bus repeater PCA9517 Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specifications defined by Philips. This specification can be ordered using the code 9398 393 40011. Data sheet status Level I Data sheet status [1] Objective data Product status [2] [3] Development Definitions This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 © Koninklijke Philips Electronics N.V. 2004 All rights reserved. Published in the U.S.A. Date of release: 10-04 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. Document number: 9397 750 13252 Philips Semiconductors 2004 Oct 05 13