PCA9556PW

INTEGRATED CIRCUITS PCA9556 Octal SMBus and I2C registered interface Product data Supersedes data of 2000 Nov 13 2002 Mar 28 Philips Semiconductors Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 The power-on reset puts the registers in their default state and initializes the SMBus state machine. The RESET pin causes the same reset/initialization to occur without depowering the part. The PCA9557 8-bit I2C SMBus I/O port with reset is the higher performance pin-for-pin replacement for the PCA9556. PIN CONFIGURATION SCL 1 SDA 2 16 VDD 15 RESET 14 I/O7 13 I/O6 12 I/O5 11 I/O4 10 I/O3 9 I/O2 FEATURES • SMBus compliance with fixed 3.3V voltage levels • Operating power supply voltage range of 3.0 V – 5.5 V • Active high polarity inverter register • Each I/O is configurable as an input or output • Active low reset pin • Low leakage current on power-down • Noise filter on SCL/SDA inputs • No glitch on power-up • Internal power-on reset • 8 I/O pins which default to 8 inputs • High impedance open drain on I/O0 • ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 A0 3 A1 4 A2 5 I/O0 6 I/O1 7 VSS 8 su01045 Figure 1. Pin configuration PIN DESCRIPTION PIN NUMBER 1 2 3 4 5 6 7 8 9–14 15 16 SYMBOL SCL SDA A0 A1 A2 I/O0 I/O1 VSS I/O2–I/O7 RESET VDD FUNCTION Serial clock line Serial data line Address input 0 Address input 1 Address input 2 I/O0 (open drain) I/O1 Supply GROUND I/O2 to I/O7 External reset (active LOW) Supply voltage • Latch-up testing is done to JESDEC Standard JESD78 which exceeds 100 mA DESCRIPTION The PCA9556 is a silicon CMOS circuit which provides parallel input/output expansion for SMBus applications. The PCA9556 consists of an 8-bit input port register, 8-bit output port register, and an SMBus interface. It has low current consumption and a high impedance open drain output pin, I/O0. The SMBus system master can reset the PCA9556 in the event of a timeout by asserting a LOW on the reset input. The SMBus system master can also invert the PCA9556 inputs by writing to the active HIGH polarity inversion bits. Finally, the system master can enable the PCA9556’s I/Os as either inputs or outputs by writing to the configuration register. ORDERING INFORMATION PACKAGES 16-Pin Plastic TSSOP TEMPERATURE RANGE –40 to +85 °C ORDER CODE PCA9556PW DRAWING NUMBER SOT403-1 Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging. SMBus as specified by the Smart Battery System Implementers Forum is a derivative of the Philips I2C patent. I2C is a trademark of Philips Semiconductors Corporation. 2002 Mar 28 2 853-2138 27929 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 BLOCK DIAGRAM A0 A1 A2 SCL SDA INPUT FILTER 8-BIT INPUT/ OUTPUT PORTS I/O0 I/O1 I/O2 SMBus CONTROL I/O3 I/O4 I/O5 I/O6 I/O7 WRITE pulse READ pulse VDD VSS POWER-ON RESET RESET NOTE: ALL I/Os ARE SET TO INPUTS AT RESET SW00793 Figure 2. Block diagram SYSTEM DIAGRAM Input Port Q7 Polarity Inversion Q7 Configuration Q7 Output Port 1.1 KΩ Q7 I/O0 6 VCC= 16 GND = 8 Q6 1.1 KΩ 15 RESET Q5 Q6 Q6 Q6 I/O1 7 Q5 Q5 Q5 I/O2 9 1.6 KΩ 1 SCL I2C/SMBus Interface logic Q4 Q4 Q4 Q4 I/O3 10 1.6 KΩ 2 SDA Q3 Q3 Q3 Q3 I/O4 11 5 A2 or 1.1 KΩ Q2 Q2 Q2 Q2 I/O5 12 4 A1 or 1.1 KΩ Q1 Q1 Q1 Q1 I/O6 13 3 A0 or 1.1 KΩ Q0 Q0 Q0 Q0 I/O7 14 SW00794 Figure 3. System diagram 2002 Mar 28 3 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 REGISTERS Command Byte Command 0 1 2 3 Protocol Read byte Read/write byte Read/write byte Read/write byte Function Input port register Output port register Polarity inversion register Configuration register Register 2 — Polarity Inversion Register bit default N7 1 N6 1 N5 1 N4 1 N3 0 N2 0 N1 0 N0 0 The command byte is the first byte to follow the address byte during a write transmission. It is used as a pointer to determine which of the following registers will be written or read. This register enables polarity inversion of pins defined as inputs by register 3. If a bit in this register is set (written with ‘1’), the corresponding port pin’s polarity is inverted. If a bit in this register is cleared (written with a ‘0’), the corresponding port pin’s original polarity is retained. Register 3 — Configuration Register bit default Register 0 — Input Port Register I7 I6 I5 I4 I3 I2 I1 I0 This register is an read-only port. It reflects the incoming logic levels of the pins, regardless of whether the pin is defined as an input or an output by register 3. Writes to this register have no effect. C7 1 C6 1 C5 1 C4 1 C3 1 C2 1 C1 1 C0 1 This register configures the directions of the I/O pins. If a bit in this register is set, the corresponding port pin is enabled as an input with high impedance output driver. If a bit in this register is cleared, the corresponding port pin is enabled as an output. Register 1 — Output Port Register bit default O7 0 O6 0 O5 0 O4 0 O3 0 O2 0 O1 0 O0 0 RESET Power-on Reset When power is applied to VDD, an internal power-on reset holds the PCA9556 in a reset state until VDD has reached VPOR. At that point, the reset condition is released and the PCA9556 registers and SMBus state machine will initialize to their default states. This register reflects the outgoing logic levels of the pins defined as outputs by register 3. Bit values in this register have no effect on pins defined as inputs. In turn, reads from this register reflect the value that is in the flip-flop controlling the output selection, NOT the actual pin value. External Reset A reset can be accomplished by holding the RESET pin low for a minimum of TW. The PCA9556 registers and SMBus/I2C state machine will be held in their default state until the RESET input is once again high. This input typically requires a pull-up to 3.3 V VCC. 2002 Mar 28 4 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 SIMPLIFIED SCHEMATIC OF I/O0 DATA FROM SHIFT REGISTER CONFIGURATION REGISTER DATA FROM SHIFT REGISTER WRITE CONFIGURATION PULSE WRITE PULSE D FF CK Q D FF I/O0 CK Q ESD PROTECTION DIODE Q Q OUTPUT PORT REGISTER DATA OUTPUT PORT REGISTER INPUT PORT REGISTER D FF READ PULSE CK Q Q VSS INPUT PORT REGISTER DATA DATA FROM SHIFT REGISTER WRITE POLARITY PULSE D FF CK Q POLARITY REGISTER DATA Q POLARITY INVERSION REGISTER SW00795 NOTE: On power–up or reset, all registers return to default values. Figure 4. Simplified schematic of I/O0 2002 Mar 28 5 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 SIMPLIFIED SCHEMATIC OF I/O1 TO I/O7 DATA FROM SHIFT REGISTER CONFIGURATION REGISTER DATA FROM SHIFT REGISTER D FF WRITE CONFIGURATION PULSE WRITE PULSE CK Q D FF I/O0 TO I/O15 CK Q ESD PROTECTION DIODE Q Q ESD PROTECTION DIODE OUTPUT PORT REGISTER DATA VDD OUTPUT PORT REGISTER INPUT PORT REGISTER D FF READ PULSE CK Q Q VSS INPUT PORT REGISTER DATA DATA FROM SHIFT REGISTER WRITE POLARITY PULSE D FF CK Q POLARITY REGISTER DATA Q POLARITY INVERSION REGISTER SW00796 NOTE: On power–up or reset, all registers return to default values. Figure 5. Simplified schematic of I/O1 to I/O7 2002 Mar 28 6 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 SMBus Address slave address 0 0 1 1 A2 A1 A0 R/W fixed programmable su01048 Figure 6. PCA9556 address SMBus Transactions Data is transmitted to the PCA9556 registers using Write Byte transfers (see Figures 7 and 8). Data is read from the PCA9556 registers using Read and Receive Byte transfers (see FIgures 9 and 10). SCL 1 2 3 4 5 6 7 8 9 command byte slave address data to port SDA S 0 0 1 1 A2 A1 A0 0 R/W A 0 0 0 0 0 0 0 1 A acknowledge from slave DATA 1 A P start condition acknowledge from slave acknowledge from slave WRITE TO PORT DATA OUT FROM PORT tpv DATA 1 VALID SW00797 Figure 7. WRITE to output port register via Write Byte Protocol SCL 1 2 3 4 5 6 7 8 9 slave address command byte data to register SDA S 0 0 1 1 A2 A1 A0 0 R/W A 0 0 0 0 0 0 1 1/0 A acknowledge from slave DATA A P start condition acknowledge from slave acknowledge from slave SW00798 Figure 8. WRITE to I/O configuration or polarity inversion registers via Write Byte Protocol 2002 Mar 28 7 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 slave address acknowledge from slave acknowledge from slave slave address acknowledge from slave data from register acknowledge from master S 0 0 1 1 A2 A1 A0 0 R/W A COMMAND BYTE A S 0 0 1 1 A2 A1 A0 1 R/W A DATA first byte A at this moment master-transmitter becomes master-receiver and slave-receiver becomes slave-transmitter data from register no acknowledge from master DATA last byte NA P su01052 Figure 9. READ from register via Read byte protocol slave address data from port data from port SDA S 0 0 1 1 A2 A1 A0 1 R/W A acknowledge from slave DATA 1 A acknowledge from master DATA 4 NA P stop condition start condition no acknowledge from master READ FROM PORT DATA INTO PORT tph DATA 2 DATA 3 tps DATA 4 SW00799 NOTES: 1. This figure assumes the command byte has previously been programmed with 00h. 2. Transfer of data can be stopped at any moment by a stop condition. When this occurs, data present at the last acknowledge phase is valid (output mode). Input data is lost. Figure 10. READ input port register via Receive byte protocol 2002 Mar 28 8 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 ABSOLUTE MAXIMUM RATINGS In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDD VI II VI/O VI/O0 II/O0 /O II/O Ptot PO Tstg Tamb Supply voltage Input voltage DC input current DC voltage on an I/O as an input other than I/O0 DC voltage on I/O0 as an input DC input current on I/O0 input current on I/O0 DC output current on an I/O Total power dissipation Power dissipation per output Storage temperature range Operating ambient temperature PARAMETER CONDITIONS MIN –0.5 VSS – 0.5 — VSS – 0.5 VSS – 0.5 — — — — — –65 –40 MAX +6 VDD + 0.5 ± 20 VDD + 0.5 4.6 +400 –20 ± 20 — — +150 +85 UNIT V V mA V V µA mA mA mW mW °C °C HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC24 under ”Handling MOS devices”. 2002 Mar 28 9 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 DC CHARACTERISTICS SYMBOL Supplies VDD IDD Supply voltage Supply current VDD = 3.0 to 5.5 V; VSS = 0 V; Tamb = –40 to +85 °C; unless otherwise specified. PARAMETER CONDITIONS VDD = 3.3 V MIN TYP MAX MIN VDD = 5 V TYP MAX UNIT 3.0 Operating mode; no load; VI = VDD or VSS; fSCL = 100 kHz Standby mode; no load; VI = VDD or VSS; fSCL = 0 kHz VDD = 3.3 V; no load; VI = VDD or VSS; note 1 — — 300 3.6 425 4.5 — — 1100 5.5 1500 V µA Istb VPOR Standby current — 25 50 – 65 100 µA V Power-on reset voltage — 1.3 2.4 – 1.3 2.4 Input SCL; input/output SDA VIL VIH IOL IL CI I/Os VIL VIH IIHL(max) IOL LOW level input voltage HIGH level input voltage Maximum allowed input current through protection diode (I/O1 – I/O7) LOW level output current HIGH level output current except I/O0 IOH HIGH level output current on I/O0 level output current on I/O0 IL CI CO VIL VIH Input leakage current Input capacitance Output capacitance VI ≥ VDD or VI ≤ VSS VOL = 0.55 V; VDD = 3.3 V; note 2 VOH = 2.4 V; VDD = 3.3 V; note 3 VDD = 3.6 V; VOH = 4.6 V VDD = 0 V; VOH = 3.3 V VDD = 3.6 V; VI = 0 or VDD –0.5 2.0 — 8 4 — — –1 — — — — — 10 — — — — — — 0.8 VDD + 0.5 ±400 — — 1 1 1 10 10 –0.5 2.0 — 8 4 — — –1 — — — — — 10 — — — — — — 0.8 VDD + 0.5 ±400 — — 1 1 1 10 10 V V µA mA mA µA µA pF pF LOW level input voltage HIGH level input voltage LOW level output current Leakage current Input capacitance VOL = 0.4 V VI = VDD = VSS VI = VSS –0.5 2.1 3 –1 — — — — — — 0.8 5.5 — +1 10 –0.5 2.1 3 –1 — — — — — — 0.8 5.5 — +1 10 V V mA µA pF Select Inputs A0, A1, A2, and RESET LOW level input voltage HIGH level input voltage –0.5 2.0 — — 0.8 VDD + 0.5 –0.5 2.0 –1 — — — 0.8 VDD + 0.5 1 V V µA ILI Input leakage current –1 — 1 NOTES: 1. The power-on reset circuit resets the SMBus logic with VDD < VPOR and sets all I/Os to their default values. 2. The maximum total sink current must be limited to 54 mA at +85 °C, and 80 mA at +70 °C. 3. The maximum total source current must be limited to 54 mA at +85 °C, and 80 mA at +70 °C. 2002 Mar 28 10 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 AC SPECIFICATIONS SYMBOL fSBM tBUF tHO:STA tSU:STA tHO:DAT tSU:DAT tLOW tHIGH tF tR Port Timing tPV tPS tPH Reset tW Reset pulse width 2 — ns Output data valid Input data setup time Input data hold time — 0 4 4 — — µs µs µs SMB operating frequency Bus free time between stop and start conditions Hold time after (repeated) start condition Repeated start condition setup time Data hold time Data setup time Clock LOW period Clock HIGH period Clock/Data fall time Clock/Data rise time PARAMETER LIMITS MIN 10 4.7 4.0 4.7 300 250 4.7 4.0 — — MAX 100 — — — — — — — 300 1000 UNITS KHz µs µs µs ns ns µs µs ns ns 2002 Mar 28 11 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 2002 Mar 28 12 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specifications defined by Philips. This specification can be ordered using the code 9398 393 40011. Data sheet status Data sheet status [1] Objective data Preliminary data Product status [2] Development Qualification Definitions This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 © Koninklijke Philips Electronics N.V. 2002 All rights reserved. Printed in U.S.A. Date of release: 03-02 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. Document order number: 9397 750 09609 Philips Semiconductors 2002 Mar 28 13