PCF8582E-2

INTEGRATED CIRCUITS DATA SH EET PCX8582X-2 Family 256 x 8-bit CMOS EEPROMS with I2C-bus interface Product specification Supersedes data of February 1992 File under Integrated Circuits, IC12 December 1994 Philips Semiconductors Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface FEATURES • Low power CMOS – maximum active current 2.0 mA – maximum standby current 10 µA (at 6.0 V), typical 4 µA • Non-volatile storage of 2-Kbits organized as 256 × 8-bits • Single supply with full operation down to 2.5 V • On-chip voltage multiplier • Serial input/output • Write operations – byte write mode – 8-byte page write mode (minimizes total write time per byte) • Read operations – sequential read – random read • Internal timer for writing (no external components) • Power-on reset • High reliability by using a redundant storage code • Endurance – >500 k E/W-cycles at Tamb = 22 °C • 40 years non-volatile data retention time (typ.) • Pin and address compatible to – PCX8570, PCF8571, PCF8572 and PCF8581 – PCX8494X-2, PCX8598X-2 -Family. QUICK REFERENCE DATA SYMBOL VDD IDDR PARAMETER supply voltage supply current READ fSCL = 100 kHz VDD = 3 V VDD = 6 V IDDW supply current ERASE/WRITE fSCL = 100 kHz VDD = 3 V VDD = 6 V IDDSB supply current STANDBY VDD = 3 V VDD = 6 V CONDITIONS I2C-bus DESCRIPTION PCX8582X-2 Family The PCX8582X-2 is a 2-Kbit (256 × 8-bit) floating gate electrically erasable programmable read only memory (EEPROM). By using an internal redundant storage code it is fault tolerant to single bit errors. This feature dramatically increases reliability compared to conventional EEPROM memories. Power consumption is low due to the full CMOS technology used. The programming voltage is generated on-chip, using a voltage multiplier. As data bytes are received and transmitted via the serial I2C-bus, a package using eight pins is sufficient. Up to eight PCX8582X-2 devices may be connected to the I2C-bus. Chip select is accomplished by three address inputs (A0, A1, A2). Timing of the ERASE/WRITE cycle is carried out internally, thus no external components are required. Pin 7 (PTC) must be connected to either VDD or left open-circuit. There is an option of using an external clock for timing the length of an ERASE/WRITE cycle. MIN. 2.5 − − − − − − MAX. 6.0 60 200 0.6 2.0 3.5 10 V UNIT µA µA mA mA µA µA December 1994 2 Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface ORDERING INFORMATION TYPE NUMBER PCF8582C-2P PCD8582D-2P PCF8582E-2P PCA8582F-2P PCF8582C-2T PCD8582D-2T PCF8582E-2T PCA8582F-2T DEVICE SELECTION Table 1 Device selection code DEVICE CODE b71 1 b6 0 b5 1 b4 0 b3 A2 SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 PACKAGE NAME DIP8 DESCRIPTION plastic dual in-line package; 8 leads (300 mil) VERSION SOT97-1 PCX8582X-2 Family TEMPERATURE (°C) MIN. −40 −25 −40 −40 −40 −25 −40 −40 MAX. +85 +70 +85 +125 +85 +70 +85 +125 SUPPLY (V) MIN. 2.5 3.0 4.5 4.5 2.5 3.0 4.5 4.5 MAX. 6.0 6.0 5.5 5.5 6.0 6.0 5.5 5.5 SELECTION Bit Device Note 1. The MSB b7 is sent first. Table 2 CHIP ENABLE b2 A1 b1 A0 R/W b0 R/W Endurance and data retention guarantees DEVICE ENDURANCE E/W CYCLES 500000(1) DATA RETENTION YEARS 40 PCF8582C-2; PCA8582F-2 Note 1. At the time of publication of this data sheet the statistical history was not yet sufficient to guarantee 1000000000 E/W cycle performance for these types. December 1994 3 PCX8582X-2 Family Product specification Fig.1 Block diagram. handbook, full pagewidth December 1994 INPUT FILTER I 2 C - BUS CONTROL LOGIC VDD BLOCK DIAGRAM 8 Philips Semiconductors SCL 6 SDA 5 n 256 x 8-bit CMOS EEPROMS with I2C-bus interface BYTE COUNTER SEQUENCER 3 4 EE CONTROL ADDRESS HIGH REGISTER DIVIDER ( 128) ADDRESS SWITCH 8 EEPROM SHIFT REGISTER BYTE LATCH (8 bytes) ADDRESS POINTER 4 TEST MODE DECODER TIMER ( 16) 7 PTC A2 A1 A0 3 2 1 PCX8582X-2 POWER - ON RESET OSCILLATOR 4 MBC794 VSS Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface PINNING SYMBOL A0 A1 A2 VSS SDA SCL PTC VDD PIN 1 2 3 4 5 6 7 8 DESCRIPTION address input 0 address input 1 address input 2 negative supply voltage serial data input/output (I2C-bus) serial clock input (I2C-bus) programming time control output positive supply voltage A1 A2 VSS 2 handbook, halfpage PCX8582X-2 Family A0 1 8 7 PCX8582X-2 6 5 MBC792 V DD PTC SCL SDA 3 4 Fig.2 Pin configuration. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC134). SYMBOL VDD VI II IO Tstg Tamb supply voltage voltage on any input pin current on any input pin output current storage temperature operating ambient temperature PCF8582C-2; PCF8582E-2 PCD8582D-2 PCA8582F-2 −40 −25 −40 +85 +70 +125 °C °C °C |ZI| > 500 Ω PARAMETER CONDITIONS MIN. −0.3 VSS − 0.8 − − −65 MAX. +7.0 VDD + 0.8 1 10 +150 V V mA mA °C UNIT December 1994 5 Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface PCX8582X-2 Family CHARACTERISTICS PCF8582C-2: VDD = 2.5 to 6.0 V; VSS = 0 V; Tamb = −40 to +85 °C; unless otherwise specified. PCD8582D-2: VDD = 3.0 to 6.0 V; VSS = 0 V; Tamb = −25 to +70 °C; unless otherwise specified. PCF8582E-2: VDD = 4.5 to 5.5 V; VSS = 0 V; Tamb = −40 to +85 °C; unless otherwise specified. PCA8582F-2: VDD = 4.5 to 5.5 V; VSS = 0 V; Tamb = −40 to +125 °C; unless otherwise specified. SYMBOL Supplies VDD supply voltage PCF8582C-2 PCD8582D-2 PCF8582E-2; PCA8582F-2 IDDR supply current READ PCF8582C-2; PCD8582D-2 PCF8582E-2; PCA8582F-2 IDDW supply current ERASE/WRITE PCF8582C-2; PCD8582D-2 PCF8582E-2; PCA8582F-2 IDDSB supply current STANDBY PCF8582C-2; PCD8582D-2 PCF8582E-2; PCA8582F-2 PTC input (pin 7) VIL VIH VIL VIH ILI fSCL CI VIL VIH VOL ILO CI tS LOW level input voltage HIGH level input voltage −0.8 0.9VDD −0.8 0.7VDD VI = VDD or VSS VI = VSS − 0 − −0.8 0.7VDD IOL = 3 mA; VDD(min) VOH = VDD VI = VSS Tamb = 55 °C − − − 0.1VDD V VDD + 0.8 V 0.3VDD ±1 100 7 V µA kHz pF fSCL = 100 kHz VDD = 3.0 V VDD = 6.0 V VDD = 5.5 V fSCL = 100 kHz VDD = 3.0 V VDD = 6.0 V VDD = 5.5 V fSCL = 100 kHz VDD = 3.0 V VDD = 6.0 V VDD = 5.5 V − − − 3.5 10 10 µA µA µA − − − 0.6 2.0 2.0 mA mA mA − − − 60 200 200 µA µA µA 2.5 3.0 4.5 6.0 6.0 5.5 V V V PARAMETER CONDITIONS MIN. MAX. UNIT SCL input (pin 6) LOW level input voltage HIGH level input voltage input leakage current clock input frequency input capacitance VDD + 0.8 V SDA input/output (pin 5) LOW level input voltage HIGH level input voltage LOW level output voltage output leakage current input capacitance 0.3VDD 0.4 1 7 − V V µA pF VDD + 0.8 V Data retention time data retention time 10 years December 1994 6 Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface PCX8582X-2 Family WRITE CYCLE LIMITS Selection of the chip address is achieved by connecting the A0, A1 and A2 inputs to either VSS or VDD. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT ERASE/WRITE cycle timing tE/W ERASE/WRITE cycle time internal oscillator external clock Endurance NE/W ERASE/WRITE cycle per byte PCF8582C-2 PCD8582D-2 Tamb = 85 °C; tE/W = 4 to 10 ms Tamb = 22 °C; tE/W = 5 ms Tamb = −25 to +70 °C; tE/W = 4 to 10 ms Tamb = −25 to +40 °C; tE/W = 5 ms PCF8582E-2 Tamb = −40 to +85 °C; tE/W = 4 to 10 ms Tamb = 22 °C; tE/W = 5 ms PCA8582F-2 Tamb = 125 °C; tE/W = 4 to 10 ms Tamb = 85 °C; tE/W = 4 to 10 ms Tamb = 22 °C; tE/W = 5 ms 100000 − 500000 − 10000 − − − − − − − − − − cycles cycles cycles cycles cycles cycles cycles cycles cycles − 4 7 − − 10 ms ms 100000 − 10000 − 100000 − 50000 − 100000 − 500000 − December 1994 7 Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface I2C-BUS PROTOCOL The is for 2-way, 2-line communication between different ICs or modules. The serial bus consists of two bidirectional lines: one for data signals (SDA), and one for clock signals (SCL). Both the SDA and SCL lines must be connected to a positive supply voltage via a pull-up resistor. The following protocol has been defined: • Data transfer may be initiated only when the bus is not busy. • During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in the data line while the clock line is HIGH will be interpreted as control signals. The following bus conditions have been defined: • Bus not busy: both data and clock lines remain HIGH. • Start data transfer: a change in the state of the data line, from HIGH-to-LOW, while the clock is HIGH, defines the start condition. • Stop data transfer: a change in the state of the data line, from LOW-to-HIGH, while the clock is HIGH, defines the stop condition. • Data valid: the state of the data line represents valid data when, after a start condition, the data line is stable for the duration of the HIGH period of the clock signal. There is one clock pulse per bit of data. Each data transfer is initiated with a start condition and terminated with a stop condition; the number of the data bytes, transferred between the start and stop conditions is limited to seven bytes in the ERASE/WRITE mode and eight bytes in the PAGE ERASE/WRITE mode. Data transfer is unlimited in the READ mode. The information is transmitted in bytes and each receiver acknowledges with a ninth bit. Within the I2C-bus specifications a low-speed mode (2 kHz clock rate) and a high speed mode (100 kHz clock rate) are defined. The PCX8582X-2 operates in both modes. By definition a device that sends a signal is called a ‘transmitter’, and the device which receives the signal is called a ‘receive’. The device which controls the signal is called the ‘master’. The devices that are controlled by the master are called ‘slaves’. I2C-bus PCX8582X-2 Family Each byte is followed by one acknowledge bit. This acknowledge bit is a HIGH level, put on the bus by the transmitter. The master generates an extra acknowledge related clock pulse. The slave receiver which is addressed is obliged to generate an acknowledge after the reception of each byte. The master receiver must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down the SDA line during the acknowledge clock pulse in such a way that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse. Set-up and hold times must be taken into account. A master receiver must signal an end of data to the slave transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event the transmitter must leave the data line HIGH to enable the master generation of the stop condition. DEVICE ADDRESSING Following a start condition the bus master must output the address of the slave it is accessing. The most significant four bits of the slave address are the device type identifier (see Fig.3). For the PCX8582X-2 this is fixed as 1010. handbook, halfpage 1 0 1 0 A2 A1 A0 R/W MBC793 Fig.3 Slave address. The next three significant bits address a particular device. A system could have up to eight PCX8582X-2 devices on the bus. The eight addresses are defined by the state of the A0, A1 and A2 inputs. The last bit of the slave address defines the operation to be performed. When set to logic 1 a read operation is selected. Address bits must be connected to either VDD or VSS. December 1994 8 Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface WRITE OPERATIONS Byte/word write For a write operation the PCX8582X-2 requires a second address field. This address field is a word address providing access to the 256 words of memory. Upon receipt of the word address the PCX8582X-2 responds with an acknowledge and awaits the next eight bits of data, again responding with an acknowledge. Word address is automatically incremented. The master can now terminate the transfer by generating a stop condition or transmit up to six more bytes of data and then terminate by generating a stop condition. After this stop condition the ERASE/WRITE cycle starts and the bus is free for another transmission. Its duration is 7 ms (typ.) per byte. During the ERASE/WRITE cycle the slave receiver does not send an acknowledge bit if addressed via the I2C-bus. PAGE WRITE PCX8582X-2 Family The PCX8582X-2 is capable of an eight-byte page write operation. It is initiated in the same manner as the byte write operation. The master can transmit eight data bytes within one transmission. After receipt of each byte the PCX8582X-2 will respond with an acknowledge. The typical ERASE/WRITE time in this mode is 9 × 7 ms = 63 ms. After the receipt of each data byte the three low order bits of the word address are internally incremented. The high order five bits of the address remain unchanged. If the master transmits more than eight bytes prior to generating the stop condition, no acknowledge will be given on the ninth (and following) data bytes and the whole transmission will be ignored. As in the byte write operation, all inputs are disabled until completion of the internal write cycles. December 1994 9 Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface PCX8582X-2 Family handbook, full pagewidth acknowledge from slave acknowledge from slave acknowledge from slave acknowledge from slave S SLAVE ADDRESS 0A WORD ADDRESS A DATA A DATA A P R/W auto increment word address auto increment word address MBA701 Fig.4 Auto increment memory word address; two byte write. handbook, full pagewidth acknowledge from slave acknowledge from slave acknowledge from slave acknowledge from slave S SLAVE ADDRESS 0A WORD ADDRESS A DATA N A DATA N + 1 A R/W auto increment word address auto increment word address acknowledge from slave DATA N + 7 1 A last byte MBA702 auto increment word address Fig.5 Page write operation; eight byte. December 1994 10 Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface READ OPERATIONS PCX8582X-2 Family Read operations are initiated in the same manner as write operations with the exception that the LSB of the slave address is set to logic 1. There are three basic read operations; current address read, random read and sequential read. handbook, full pagewidth acknowledge from slave acknowledge from slave acknowledge from slave acknowledge from master S SLAVE ADDRESS 0A WORD ADDRESS A S SLAVE ADDRESS 1A DATA A R/W at this moment master transmitter becomes master receiver and EEPROM slave receiver becomes slave transmitter R/W n bytes auto increment word address no acknowledge from master DATA 1 P last byte MBA703 - 1 auto increment word address Fig.6 Master reads PCX8582X-2 slave after setting word address (WRITE word address; READ data). handbook, full pagewidth acknowledge from slave acknowledge from master no acknowledge from master S SLAVE ADDRESS 1A DATA n bytes A DATA last bytes 1 P R/W auto increment word address auto increment word address MBA704 - 1 Fig.7 Master reads PCX8582X-2 immediately after first byte (READ mode). December 1994 11 Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface I2C-BUS TIMING PCX8582X-2 Family P t HD;STA S t SU;STA MBA705 t SU;STO t LOW t BUF SDA December 1994 12 SCL P S t HD;STA tr Fig.8 Timing requirements for the I2C-bus. t SU;DAT t HD;DAT t HIGH tf handbook, full pagewidth Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface PCX8582X-2 Family I2C-BUS CHARACTERISTICS All of the timing values are valid within the operating supply voltage and ambient temperature range and refer to VIL and VIH with an input voltage swing from VSS to VDD. SYMBOL fSCL tBUF tHD;STA tLOW tHIGH tSU;STA tHD;DAT tHD;DAT tSU;DAT tr tf tSU;STO Note 1. The hold time required (not greater than 300 ns) to bridge the undefined region of the falling edge of SCL must be internally provided by a transmitter. clock frequency time the bus must be free before new transmission can start start condition hold time after which first clock pulse is generated LOW level clock period HIGH level clock period set-up time for start condition data hold time for bus compatible masters data hold time for bus devices data set-up time SDA and SCL rise time SDA and SCL fall time set-up time for stop condition note 1 repeated start PARAMETER CONDITIONS MIN. MAX. UNIT 0 4.7 4.0 4.7 4.0 4.7 5 0 250 − − 4.7 100 − − − − − − − − 1 300 − kHz µs µs µs µs µs µs ns ns µs ns µs December 1994 13 Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface EXTERNAL CLOCK TIMING PCX8582X-2 Family handbook, full pagewidth td tr t HIGH tf t LOW PTC 1 2 257 SDA SCL STOP MBA697 Fig.9 One byte ERASE/WRITE cycle. handbook, full pagewidth td tr t HIGH tf t LOW n x 256 + 1 PTC 1 2 SDA SCL STOP MBA698 Fig.10 n byte ERASE/WRITE cycle (n = 2 to 7). td handbook, full pagewidth tr t HIGH tf t LOW PTC 1 2 1153 SDA SCL STOP MBA699 Fig.11 Page mode. December 1994 14 Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface PCX8582X-2 Family handbook, full pagewidth SLAVE ADDRESS WORD ADDRESS A DATA A DATA A P (1) I C-bus S 2 0A HIGH PTC LOW undefined 1 1 1 td 0 2 2 2 257 513 1153 undefined clock (2) clock (3) clock (4) MBA700 negative edge SCL 8-bit (1) If an external clock is chosen, this information is latched internally by setting pin 7 (PTC) LOW after transmission of the eighth bit of the word address (negative edge of SCL). Thus the state of pin 7 may be previously undefined. Leaving pin 7 LOW causes a higher standby current. (2) 1-byte programming. (3) 2-byte programming. (4) One page (8 byte) programming. Fig.12 External clock. December 1994 15 Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface PACKAGE OUTLINES PCX8582X-2 Family handbook, full pagewidth 9.8 9.2 8.25 7.80 seating plane 3.2 max 4.2 max 3.60 3.05 0.51 min 1.15 max 2.54 (3x) 1.73 max 0.53 max 0.254 M 0.38 max 7.62 10.0 8.3 MSA252 - 1 8 5 6.48 6.20 1 4 Dimensions in mm. Fig.13 Plastic dual in-line package; 8 leads (300 mil) DIP8; SOT97-1. December 1994 16 Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface PCX8582X-2 Family handbook, full pagewidth 5.0 4.8 4.0 3.8 A S 0.1 S 6.2 5.8 0.7 0.3 8 5 1.45 1.25 0.7 0.6 0.25 0.19 1.75 1.35 1 pin 1 index 4 0.25 0.10 detail A 1.0 0.5 0 to 8 o MBC180 - 1 1.27 0.49 0.36 0.25 M (8x) Dimensions in mm. Fig.14 Plastic small outline package; 8 leads; body width 3.9 mm (SO8; SOT96-1). December 1994 17 Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface SOLDERING Plastic dual in-line packages BY DIP OR WAVE The maximum permissible temperature of the solder is 260 °C; this temperature must not be in contact with the joint for more than 5 s. The total contact time of successive solder waves must not exceed 5 s. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified storage maximum. If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low-voltage soldering iron below the seating plane (or not more than 2 mm above it). If its temperature is below 300 °C, it must not be in contact for more than 10 s; if between 300 and 400 °C, for not more than 5 s. Plastic small-outline packages BY WAVE During placement and before soldering, the component must be fixed with a droplet of adhesive. After curing the adhesive, the component can be soldered. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder bath is 10 s, if allowed to cool to less than 150 °C within 6 s. Typical dwell time is 4 s at 250 °C. A modified wave soldering technique is recommended using two solder waves (dual-wave), in which a turbulent wave with high upward pressure is followed by a smooth laminar wave. Using a mildly-activated flux eliminates the need for removal of corrosive residues in most applications. PCX8582X-2 Family BY SOLDER PASTE REFLOW Reflow soldering requires the solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the substrate by screen printing, stencilling or pressure-syringe dispensing before device placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt, infrared, and vapour-phase reflow. Dwell times vary between 50 and 300 s according to method. Typical reflow temperatures range from 215 to 250 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 min at 45 °C. REPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING IRON OR PULSE-HEATED SOLDER TOOL) Fix the component by first soldering two, diagonally opposite, end pins. Apply the heating tool to the flat part of the pin only. Contact time must be limited to 10 s at up to 300 °C. When using proper tools, all other pins can be soldered in one operation within 2 to 5 s at between 270 and 320 °C. (Pulse-heated soldering is not recommended for SO packages.) For pulse-heated solder tool (resistance) soldering of VSO packages, solder is applied to the substrate by dipping or by an extra thick tin/lead plating before package placement. December 1994 18 Philips Semiconductors Product specification 256 x 8-bit CMOS EEPROMS with I2C-bus interface DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values PCX8582X-2 Family This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications. Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. December 1994 19 Philips Semiconductors – a worldwide company Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428) BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367 Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. (02)805 4455, Fax. (02)805 4466 Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213, Tel. (01)60 101-1236, Fax. (01)60 101-1211 Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands, Tel. (31)40 783 749, Fax. (31)40 788 399 Brazil: Rua do Rocio 220 - 5th floor, Suite 51, CEP: 04552-903-SÃO PAULO-SP, Brazil. P.O. Box 7383 (01064-970). Tel. (011)821-2333, Fax. (011)829-1849 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS: Tel. (800) 234-7381, Fax. (708) 296-8556 Chile: Av. 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(01)481 77 30 Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978, TAIPEI 100, Tel. (02)388 7666, Fax. (02)382 4382. Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, Bangkok 10260, THAILAND, Tel. (662)398-0141, Fax. (662)398-3319. Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. (0 212)279 2770, Fax. (0212)269 3094 United Kingdom: Philips Semiconductors LTD., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. (081)730-5000, Fax. (081)754-8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. (800)234-7381, Fax. (708)296-8556 Uruguay: Coronel Mora 433, MONTEVIDEO, Tel. (02)70-4044, Fax. (02)92 0601 For all other countries apply to: Philips Semiconductors, International Marketing and Sales, Building BE-p, P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-724825 SCD36 © Philips Electronics N.V. 1994 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 493061/1500/02/pp20 Document order number: Date of release: December 1994 9397 743 70011 Philips Semiconductors