LV1144BEV-125.0M

LV1144BEV-125.0M

  • 厂商:

    PLETRONICS

  • 封装:

  • 描述:

    LV1144BEV-125.0M - LVDS Clock Oscillators - Pletronics, Inc.

  • 详情介绍
  • 数据手册
  • 价格&库存
LV1144BEV-125.0M 数据手册
LV11B Series 3.3 V LVDS Clock Oscillators January 2008 This device is obsolete, January 2008 This is replaced by the LV91xxDV device For new designs use the LV93xxDV device • Pletronics’ LV11B Series is a quartz crystal controlled precision square wave generator with an LVDS output. • Solder pad compatible with many 9x14 Plastic Jlead packages. • FR4 base with a mechanical metal cover. • Tape and Reel or cut tape packaging is available. • • • • • 1 to 700 MHz 9.9mm x 13.97mm ‘B’ package Enable/Disable Function on pad 2 Does NOT permit “wired-OR” of outputs Low Jitter Pletronics Inc. certifies this device is in accordance with the RoHS 6/6 (2002/95/EC) and WEEE (2002/96/EC) directives. Pletronics Inc. guarantees the device does not contain the following: Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s Weight of the Device: 2.18 grams or .82 grams or 1.51 grams Moisture Sensitivity Level: 1 As defined in J-STD-020C Second Level Interconnect code: e4 Absolute Maximum Ratings: Parameter VCC Supply Voltage Vi Vo Input Voltage Output Voltage Unit -0.5V to +7.0V -0.5V to VCC + 0.5V -0.5V to VCC + 0.5V Thermal Characteristics The maximum die or junction temperature is 155oC The thermal resistance junction to board is 60 to 100oC/Watt depending on the solder pads, ground plane and construction of the PCB. Product information is current as of publication date. The product conforms to specifications per the terms of the Pletronics standard warranty. Production processsing does not necessarily include testing of all parameters. Copyright © 2006, 2007, 2008 Pletronics Inc. LV11B Series 3.3 V LVDS Clock Oscillators January 2008 Part Number: LV11 45 B E V -125.0M -XX Packaging code or blank T250 = 250 per Tape and Reel T500 = 500 per Tape and Reel T1K = 1000 per Tape and Reel Frequency in MHz Supply Voltage VCC V = 3.3V _ 10% + Optional Enhanced OTR Blank = Temp. range -10 to +70oC E = Temp. range -40 to +85oC Series Model Frequency Stability 45 = + 50 ppm _ 44 = + 25 ppm _ 20 = + 20 ppm _ Series Model Legend: PLE = Pletronics FFFF.F M = Frequency in MHz YMD or YYWW = Date of Manufacture (Year - month - day or year and week) All other marking is internal factory codes Specifications such as frequency stability, supply voltage and operating temperature range, etc. are not identified from the marking. External packaging labels and packing list will correctly identify the ordered Pletronics part number. Codes for Date Code YMD Code Year Code Month Code Day Code Day Code Day 1 1 D 13 T 25 6 2006 A JAN 2 2 E 14 U 26 7 2007 B FEB 3 3 F 15 V 27 8 2008 C MAR 4 4 G 16 W 28 9 2009 D APR E MAY 5 5 H 17 X 29 0 2010 F JUN 6 6 J 18 Y 30 1 2011 G JUL 7 7 K 19 Z 31 H AUG 8 8 L 20 2 2012 J SEP 9 9 M 21 K OCT A 10 N 22 L NOV B 11 P 23 M DEC C 12 R 24 Part Marking: PLE LV11B FFFF.F M C YMDXX or LV11BX FFFF.F M PLE XX C YYWWXX www.pletronics.com 425-776-1880 2 LV11B Series 3.3 V LVDS Clock Oscillators January 2008 Electrical Specification for 3.30V _10% over the specified temperature range + Item Frequency Range Frequency Accuracy “45" “44" “20" Output Waveform Output High Level Output Low Level Differential Output (VOD) Output Offset Voltage (VOS) Differential Output Error (dVOS) Output Symmetry Output TRISE and TFALL -0.90 250 1.125 -45 300 400 Jitter Vcc Supply Current Enable/Disable Internal Pull-up V disable V enable Enable Disable time Start up time Operating Temperature Range 50 2.0 -10 -40 Storage Temperature Range -55 Min 1 -50 -25 -20 Max 700 +50 +25 +20 LVDS 1.60 -450 1.375 50 55 700 900 0.2 2.8 90 0.8 100 100 5 +70 +85 +125 mA Kohm Volts Volts nS nS mS o o o Unit MHz ppm Condition For all supply voltages, load changes, aging for 1 year, shock, vibration and temperatures Volts Volts mVolts Volts mVolts % pS pS pS RMS Referenced to 50% of amplitude or crossing point > 80 MHz Vth is 20% and 80% of waveform < 80 MHz Measured from 12KHz to 20MHz from Fnominal Measured from 10Hz to 1MHz from Fnominal > 80 MHz Includes current of properly terminated device > 80 MHz See load circuit R1 = 50 ohms To Vcc (equivalent resistance) Referenced to Ground Time for output to reach a logic state Time for output to reach a high Z state > 80 MHz Measured from the time Vcc = 3.0V C C C Standard Temperature Range Extended Temperature Range “E” Option Specifications with Pad 2 E/D open circuit www.pletronics.com 425-776-1880 3 LV11B Series 3.3 V LVDS Clock Oscillators January 2008 Typical Phase-Noise Response 0 -20 -40 dBc/Hz -60 -80 -100 -120 -140 -160 10 1,000 100,000 10,000,000 Frequency (Hz) Load Circuit Test Waveform Symmetry Vhigh 80% 50% 20% Vlow Trise Tfall Out Out* www.pletronics.com 425-776-1880 4 LV11B Series 3.3 V LVDS Clock Oscillators January 2008 Reliability: Environmental Compliance Parameter Mechanical Shock Vibration Solderability Thermal Shock Condition MIL-STD-883 Method 2002, Condition B MIL-STD-883 Method 2007, Condition A MIL-STD-883 Method 2003 MIL-STD-883 Method 1011, Condition A ESD Rating Model Human Body Model Charged Device Model Minimum Voltage 1500 1000 Conditions MIL-STD-883 Method 3115 JESD 22-C101 Package Labeling Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Courier New Bar code is 39-Full ASCII Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Arial Layout and application information Recommend connecting Pad 1 and Pad 2 together to permit the design to accept Enable/Disable on both input pads For Optimum Jitter Performance, Pletronics recommends: • a ground plane under the device • no large transient signals (both current and voltage) should be routed under the device • do not layout near a large magnetic field such as a high frequency switching power supply • do not place near piezoelectric buzzers or mechanical fans. www.pletronics.com 425-776-1880 5 LV11B Series 3.3 V LVDS Clock Oscillators January 2008 Mechanical: Inches A B C D1 E1 F1 FR4 PCB Base: Solder masked All via holes tented on bottom Copper Clad ½ oz. Typical Gold plated 0.02 µinch (0.5 µm) Label: White Kapton with Black Letters –or-Blue Epoxy heat cure ink covering top with laser marked lettering G1 Cover: Centered on the base 304 Stainless Steel 0.010 inch (0.25µm) Electroless Nickel Plated 1 µinch (25 µm) typical Pin 3 Ground plane is typical Not to scale H1 I1 J1 K1 0.390 +0.010 _ 0.550 +0.010 _ 0.125 max 0.026 typ. 0.050 0.028 R 0.180 0.100 0.050 0.015 0.380 mm 9.90 +0.25 _ 13.97 +0.25 _ 3.17 max 0.66 1.27 0.72 R 4.57 2.54 1.27 0.38 9.65 • • • The package is not hermetically sealed. The sides are intentionally left open to permit cleaning material to freely flow in the package, thus minimizing the accumulation of contaminants during cleaning processes. The internal part of the package must be thoroughly dry before operating. Pad 1 2 3 4 5 6 Function No connect Output Enable/Disable Ground (GND) Output Output* Supply Voltage (VCC) Note There is no internal connection to this pad When this pad is not connected the oscillator shall operate. When this pad is
LV1144BEV-125.0M
1. 物料型号 - LV11B系列,3.3V LVDS时钟振荡器。文档中提到了不同的型号,例如LV11 45BE V -125.0M -XX,其中包含频率、供电电压和温度范围等参数。

2. 器件简介 - Pletronics' LV11B系列是一个由石英晶体控制的精密方波发生器,具有LVDS输出。与许多9x14塑料Jlead封装兼容,采用FR4基板和机械金属盖。提供卷带和剪带包装。

3. 引脚分配 - Pad 1: 无连接(No connect) - Pad 2: 输出使能/禁用(Output Enable/Disable) - Pad 3: 地(Ground, GND) - Pad 4: 输出(Output) - Pad 5: 输出(Output) - Pad 6: 供电电压(Vcc)

4. 参数特性 - 工作频率范围:1 MHz至700 MHz - 频率精度:根据不同型号,分别为-50 ppm至+50 ppm、-25 ppm至+25 ppm、-20 ppm至+20 ppm - 输出波形:LVDS - 输出高电平:1.60 V - 输出低电平:0.90 V - 差分输出电压(Voo):250 mV至450 mV - 输出偏移电压(Vos):1.125 V至1.375 V(≥80 MHz) - 差分输出误差(dVos):50 mV - 输出对称性:45%至55%(参考幅度的50%或交叉点) - 输出上升时间和下降时间(TRise和TFALL):≥80 MHz时为300 ps至700 ps,<80 MHz时为400 ps至900 ps - 抖动:0.2 ps RMS(从12 kHz至20 MHz测量)和2.8 ps(从10 Hz至1 MHz测量) - Vcc供电电流:≥80 MHz时为90 mA(包括正确终止的设备电流) - 使能/禁用内部上拉电阻:50 kΩ(至Vcc的等效电阻) - 禁用电压(V disable):0.8 V(参考地) - 使能电压(V enable):2.0 V - 使能时间:100 ns(输出达到逻辑状态的时间) - 禁用时间:100 ns(输出达到高阻态的时间) - 启动时间:5 ms(≥80 MHz,从Vcc=3.0V时测量)

5. 功能详解 - LV11B系列提供了一个使能/禁用功能,可以通过Pad 2来控制。当Pad 2未连接时,振荡器工作;当Pad 2电压小于0.30 V时,输出被抑制(高阻抗状态)。推荐如果振荡器需要始终工作,则将Pad 2连接至Voc。 - 输出必须被终止,理想情况下输出之间为100欧姆的终止电阻。当禁用时,输出不是高阻抗状态,不能进行线或连接。

6. 应用信息 - 推荐将Pad 1和Pad 2连接在一起,以允许设计接受两个输入垫上的使能/禁用。 - 为了获得最佳抖动性能,Pletronics推荐在设备下方有一个地平面,不要在设备下方布局大的瞬态信号(电流和电压),不要靠近大磁场(如高频开关电源)布局,不要放置在压电蜂鸣器或机械风扇附近。

7. 封装信息 - FR4 PCB基板:焊膏掩蔽,所有通孔在底部帐篷化,铜层1/2盎司,典型金镀层0.02微英寸(0.5微米)。 - 盖子:位于基板中心的304不锈钢0.010英寸(0.25微米)无镍电镀。 - 标签:1微英寸(25微米)典型白色Kapton带黑字或蓝色环氧树脂固化墨水覆盖顶部,并带有激光标记的字母。
LV1144BEV-125.0M 价格&库存

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