LV88D Dual Frequency
LVDS Clock Oscillators
April 2007
• Pletronics’ LV88D Series is a quartz crystal controlled precision square wave generator with an LVDS output. • The package is designed for high density surface mount designs. • Low cost mass produced oscillator. • Tape and Reel or cut tape packaging is available.
• 106.25 MHz or 212.50 MHz may be selected thru Pad 2 (see page 6) • 5 x 7 mm LCC Ceramic Package • Enable/Disable Function on pad 1 • VCC of 3.3 volts • Low Jitter
Pletronics Inc. certifies this device is in accordance with the RoHS 6/6 (2002/95/EC) and WEEE (2002/96/EC) directives.
Pletronics Inc. guarantees the device does not contain the following: Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s Weight of the Device: 0.16 grams Moisture Sensitivity Level: 1 As defined in J-STD-020C Second Level Interconnect code: e4
Absolute Maximum Ratings:
Parameter VCC Supply Voltage Vi Vo Input Voltage Output Voltage Unit -0.5V to +7.0V -0.5V to VCC + 0.5V -0.5V to VCC + 0.5V
Thermal Characteristics
The maximum die or junction temperature is 155oC The thermal resistance junction to board is 30 to 50oC/Watt depending on the solder pads, ground plane and construction of the PCB.
Product information is current as of publication date. The product conforms to specifications per the terms of the Pletronics standard warranty. Production processsing does not necessarily include testing of all parameters.
Copyright © 2007, Pletronics Inc.
LV88D Dual Frequency
LVDS Clock Oscillators
April 2007
Part Number:
LV88 45 D E V -106 / 212M -XX Packaging code or blank T250 = 250 per Tape and Reel T500 = 500 per Tape and Reel T1K = 1000 per Tape and Reel Frequency in MHz 106.25 or 212.50 MHz are user switchable via Pad 2 Supply Voltage VCC V = 3.3V _ 10% + Optional Enhanced OTR Blank = Temp. range -10 to +70oC E = Temp. range -40 to +85oC Series Model Frequency Stability 45 = _ 50 ppm + 44 = _ 25 ppm + 20 = _ 20 ppm + Series Model Marking Legend: PLE = Pletronics YYWW or YWW or YMD = Date of Manufacture (year and week, or year-month-day) All other marking is internal factory codes Specifications such as frequency stability, supply voltage and operating temperature range, etc. are not identified from the marking. External packaging labels and packing list will correctly identify the ordered Pletronics part number. Codes for Date Code YMD
Code Year Code Month Code Day Code Day Code Day 1 1 D 13 T 25 6 2006 A JAN 2 2 E 14 U 26 7 2007 B FEB 3 3 F 15 V 27 8 2008 C MAR 4 4 G 16 W 28 9 2009 D APR E MAY 5 5 H 17 X 29 0 2010 F JUN 6 6 J 18 Y 30 1 2011 G JUL 7 7 K 19 Z 31 H AUG 8 8 L 20 2 2012 J SEP 9 9 M 21 K OCT A 10 N 22 L NOV B 11 P 23 M DEC C 12 R 24
Part Marking: PLE LV88 106/212M C YMDXX or LV8XYWWXX 106/212 M C PLE XXX
www.pletronics.com
425-776-1880
2
LV88D Dual Frequency
LVDS Clock Oscillators
April 2007
Electrical Specification for 3.30V +10% over the specified temperature range _
Item Frequency Range Frequency Accuracy “45" “44" “20" Output Waveform Output High Level Output Low Level Differential Output (VOD) Output Offset Voltage (VOS) Differential Output Error (dVOS) Output Symmetry Output TRISE and TFALL Jitter -0.93 200 1.125 -48 200 Output Current Vcc Supply Current V disable / Frequency Select Low V enable / Frequency Select High Input High Current Input Low Current Enable Disable time Start up time Operating Temperature Range 2.0 -10 -50 -10 -40 Storage Temperature Range -55 Min 106.25 -50 -25 -20 Max 212.50 +50 +25 +20 LVDS 1.47 -400 1.275 25 52 600 0.8 1.5 12 68 0.8 +10 +10 10 10 5 +70 +85 +125 mA mA Volts Volts uA uA nS nS mS
o o
Unit MHz ppm
Condition
For all supply voltages, load changes, aging for 1 year, shock, vibration and temperatures
Volts Volts mVolts Volts mVolts % pS pS RMS
See load circuit
R1 = 50 ohms
Referenced to 50% of amplitude or crossing point Vth is 20% and 80% of waveform Measured 12KHz to 20MHz from Fnominal Measured 10Hz to 1MHz from Fnominal Outputs shorted together Includes current of terminated device Outputs held in a fixed state
Pad 1 or Pad 2 at VCC Pad 1 or Pad 2 at 0 Volts Time for output to reach a logic state Time for output to reach a high Z state Measured from the time Vcc = 3.0V Standard Temperature Range Extended Temperature Range “E” Option
C C C
o
Specifications with Pad 1 E/D open circuit unless otherwise stated
www.pletronics.com
425-776-1880
3
LV88D Dual Frequency
LVDS Clock Oscillators
April 2007
Typical Phase-Noise Response
0 -20 -40
dBc/Hz
-60 -80 -100 -120 -140 -160 10 1,000 100,000 10,000,000
Frequency (Hz)
Load Circuit
Test Waveform
Symmetry
Vhigh 80% 50% 20% Vlow
Trise Tfall
Out
Out* Showing Out Measurement only
www.pletronics.com
425-776-1880
4
LV88D Dual Frequency
LVDS Clock Oscillators
April 2007
Reliability: Environmental Compliance
Parameter Mechanical Shock Vibration Solderability Thermal Shock Condition MIL-STD-883 Method 2002, Condition B MIL-STD-883 Method 2007, Condition A MIL-STD-883 Method 2003 MIL-STD-883 Method 1011, Condition A
ESD Rating
Model Human Body Model Charged Device Model Minimum Voltage 1500 1000 Conditions MIL-STD-883 Method 3115 JESD 22-C101
Package Labeling
Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Courier New Bar code is 39-Full ASCII Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Arial
www.pletronics.com
425-776-1880
5
LV88D Dual Frequency
LVDS Clock Oscillators
April 2007
Mechanical:
Inches A B C D1 E1 F1 G1 H I1 Contacts: Gold 11.8 μinches 0.3 μm minimum over Nickel 50 to 350 μinches 1.27 to 8.89 μm
1 1
mm 7.00 +0.15 _ 5.00 +0.15 _ 1.70 max 0.96 5.08 0.10 1.27 1.40 0.60 0.10R 0.20R
0.276 +0.006 _ 0.197 +0.006 _ 0.067 max 0.038 0.200 0.004 0.050 0.055 0.024 0.004R 0.008R
Typical dimensions
J1 K1
Not to Scale
Pad 1
Function Output Enable/Disable
Note When this pad is not connected the oscillator shall operate. When this pad is
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