LV9344DV-375.0M-T500

LV93D Series 3.3 V LVDS Clock Oscillators March 2007 • Pletronics’ LV93D Series is a quartz crystal controlled precision square wave generator with an LVDS output. • The package is designed for high density surface mount designs. • Low cost mass produced oscillator. • Tape and Reel or cut tape packaging is available. • • • • • 5 x 7 mm LCC Ceramic Package Enable/Disable Function on pad 2 Output frequency is synthesized. Low Jitter RoHS 6/6 Compliant Pletronics Inc. certifies this device is in accordance with the RoHS 6/6 (2002/95/EC) and WEEE (2002/96/EC) directives. Pletronics Inc. guarantees the device does not contain the following: Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s Weight of the Device: 0.16 grams Moisture Sensitivity Level: 1 As defined in J-STD-020C Second Level Interconnect code: e4 Absolute Maximum Ratings: Parameter VCC Supply Voltage Vi Vo Input Voltage Output Voltage Unit -0.5V to +5.0V -0.5V to VCC + 0.5V -0.5V to VCC + 0.5V Thermal Characteristics The maximum die or junction temperature is 155oC The thermal resistance junction to board is 30 to 50oC/Watt depending on the solder pads, ground plane and construction of the PCB. Product information is current as of publication date. The product conforms to specifications per the terms of the Pletronics standard warranty. Production processsing does not necessarily include testing of all parameters. Copyright © 2007, Pletronics Inc. LV93D Series 3.3 V LVDS Clock Oscillators March 2007 Part Number: LV93 45 D E V -375.0M -XX Packaging code or blank T250 = 250 per Tape and Reel T500 = 500 per Tape and Reel T1K = 1000 per Tape and Reel Frequency in MHz Supply Voltage VCC V = 3.3V _ 10% + Temperature Range blank = -10 to +70oC E = -40 to +85oC Series Model Frequency Stability 45 = + 50 ppm _ 44 = + 25 ppm _ 20 = + 20 ppm _ Series Model Part Marking: PLE LV93 FF.FFF M C YMDXX Marking Legend: PLE = Pletronics FF.FFF M = Frequency in MHZ YMD = Date of Manufacture (year-month-day) All other marking is internal factory codes Codes for Date Code YMD Code Year Code Month Code Day Code Day Code Day 1 1 D 13 T 25 7 2007 A JAN 2 2 E 14 U 26 8 2008 B FEB 9 2009 C MAR 3 3 F 15 V 27 D APR 4 4 G 16 W 28 0 2010 E MAY 5 5 H 17 X 29 1 2011 F JUN 6 6 J 18 Y 30 G JUL 7 7 K 19 Z 31 2 2012 H AUG 8 8 L 20 J SEP 9 9 M 21 K OCT A 10 N 22 L NOV B 11 P 23 M DEC C 12 R 24 www.pletronics.com 425-776-1880 2 LV93D Series 3.3 V LVDS Clock Oscillators March 2007 Electrical Specification for 3.30V _10% over the specified temperature range and the + frequency range of 10.9 MHz to 670 MHz Item Frequency Accuracy “45" “44" “20" Output Waveform Output High Level Output Low Level Differential Output (VOD) Output Offset Voltage (VOS) Differential Output Error (dVOS) Output Symmetry Output TRISE and TFALL Jitter Min -50 -25 -20 Max +50 +25 +20 LVDS Unit ppm Condition For all supply voltages, load changes, aging for 1 year, shock, vibration and temperatures -0.90 250 1.125 -47 150 - 1.60 -450 1.375 50 53 230 0.6 2.8 -20 80 0.8 +20 +20 10 10 5 +70 +85 +125 Volts Volts mVolts Volts mVolts % pS pS RMS Referenced to 50% of amplitude or crossing point Vth is 20% and 80% of waveform Measured from 12KHz to 20MHz from Fnominal Measured from 10Hz to 20MHz from Fnominal mA mA Kohm Volts Volts uA uA nS nS mS o o o See load circuit R1 = 50 ohms Output Short Circuit Current Vcc Supply Current Enable/Disable Internal Pull-up V disable V enable Output leakage VOUT = VCC VOUT = 0V Enable Disable time Start up time Operating Temperature Range 50 2.0 -20 -20 -10 -40 Vout = 0.0V To Vcc (equivalent resistance) Referenced to Ground Referenced to Ground Pad 1 low, device disabled Time for output to reach a logic state Time for output to reach a high Z state Measured from the time Vcc = 3.0V Standard Temperature Range Extended Temperature Range “E” Option C C C Storage Temperature Range -55 Specifications with Pad 1 E/D open circuit www.pletronics.com 425-776-1880 3 LV93D Series 3.3 V LVDS Clock Oscillators March 2007 Typical Phase-Noise Response 0 -20 -40 dBc/Hz -60 -80 -100 -120 -140 -160 10 1,000 100,000 10,000,000 100MHz dBc/Hz 400MHz dBc/Hz Frequency (Hz) Load Circuit Test Waveform Symmetry Vhigh 80% 50% 20% Vlow Trise Tfall Out Out* Showing Out Measurement only www.pletronics.com 425-776-1880 4 LV93D Series 3.3 V LVDS Clock Oscillators March 2007 Reliability: Environmental Compliance Parameter Mechanical Shock Vibration Solderability Thermal Shock Condition MIL-STD-883 Method 2002, Condition B MIL-STD-883 Method 2007, Condition A MIL-STD-883 Method 2003 MIL-STD-883 Method 1011, Condition A ESD Rating Model Human Body Model Charged Device Model Minimum Voltage 2000 1500 Conditions MIL-STD-883 Method 3115 JESD 22-C101 Package Labeling Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Courier New Bar code is 39-Full ASCII Label is 1" x 2.6" (25.4mm x 66.7mm) Font is Arial www.pletronics.com 425-776-1880 5 LV93D Series 3.3 V LVDS Clock Oscillators March 2007 Mechanical: Inches A 6 1 mm 7.00 +0.15 _ 5.00 +0.15 _ 1.70 max 0.96 5.08 0.10 1.27 1.40 0.60 0.10r 0.20r 2.25 0.25r 0.276 +0.006 _ 0.197 +0.006 _ 0.067 max 0.038 0.200 0.004 0.050 0.055 0.024 0.004r 0.008r 0.089 0.010r 1 B C D1 E1 F1 4 3 5 2 G1 H1 I Contacts: Gold 11.8 µinches 0.3 µm minimum over Nickel 50 to 350 µinches 1.27 to 8.89 µm Typical dimensions 1 J1 K1 L1 Not to Scale Center metalized pad on the base is not connected. M1 Pad 1 2 Function no connect Output Enable/Disable Ground (GND) Output Output* Supply Voltage (VCC) Note This pad should be connected to Ground or Supply Voltage to lower the packages thermal resistance. When this pad is not connected the oscillator shall operate. If